Mohamed Hanafy Digital Design Verification Consultant

Mohamedhanafy97@gmail.com +20 (12) 2269 2427

Verification Consulting Services Mentor Graphics

Domain Experience ♦ Deep mathematical & physical backgrounds.

♦ Good knowledge with Mentor’s hardware design and verification tools (TBX, Veloce, Questa Sim, 0-IN, Questa VIP and Certe TB Studio).

♦ Good Knowledge and deep practice with different Emulation techniques.

♦ Good knowledge with SystemVerilog, and Mentor’s supported verification methodologies (OVM & UVM).

♦ Good knowledge with Questa Verification MVC Library. ♦ Good programming skills. ♦ Good knowledge with hardware description languages (VHDL &

Verilog) ♦ Good knowledge with shell scripting and Unix environment. ♦ Good knowledge with both Perl and Tcl scripting languages. ♦ Microcontroller programming skills (especially PIC & ATMEL

Families, with either Assembly & C lang.). Professional Experience and Activities February 2012 – Present, Hardware Verification Consultant,

Consulting Division, Mentor Graphics ♦ Innovation of a new solution to run a DFT test-bench on the emulator,

for an investigation of how to speed up a running TB got from ATPG. Restructuring the automatic test-bench generated from the ATPG

tool, and rewriting synthesizable part for better performance on emulator.

♦ Building a verified synthesizable Checker for DDR4 operations. The Checker has a group of SVA assertions running on both Simulation (Questa) and Emulation (Veloce) to test the functionality of AVAGO controller.

Understanding DDR4 specifications according to JEDEC standard.

Writing System Verilog Assertions for necessary sequence and timing checks of protocol operation.

Writing direct tests to verify the implemented checker in MED DDR4 soft-model environment, and then running on both Questa for Simulation and Veloce for Emulation.

♦ Build UVM-based agents running on Veloce emulator for simulation of ERICSSON communication protocols (CQI, CBI).

Implement synthesizable Bus Functional Models for driver and monitor agents of UVM test-bench.

Professional Experience and Activities ♦ Provide on-site emulation consulting services for ARM Sheffield, UK. ♦ Started PhD program in Computer & Systems Engineering at Ain

Shams University, Cairo, in Nov 2012. Passed the admission exams, and ended all preparatory subjects’

exams with grade 3.57. My research topic is about “Automation of Digital Design

Verification”. Innovated new mining technique to extract design properties

from simulation traces using Python and Microsoft Visual Studio C++.

Submitted new paper with title “Complete Properties Extraction from Simulation Traces for Assertions Auto-Generation” to be published in the 24th North Atlantic Test Workshop NATW that to be handled on May 11-13, 2015.

Targets to finish PhD program by end of the year. ♦ Have good view for TBX/Veloce Mentor Graphics emulation future

flow, the latest solutions, and the probable challenges while attending the MED_ACADEMY_2014.

♦ Have training sessions in TBX/Veloce emulation flow with MED/MCD Mentor guys at Grenoble, France.

♦ Self-training with Mentor’s supported Verification/Emulation tools and methodologies. Implementation of a synthesizable model for SPI protocol, with a co-model verification test-bench running on TBX/Veloce flow.

June 2011 – January 2012, Software Development Engineer, Design Creation and Synthesis Division, Mentor Graphics

♦ Support of FPGA Synthesis tool (Precision) for ALTERA and XILINX Families.

o Description Writing scripts to handle any updates in PS library files. Solving bugs encountered in using PS synthesis tool for

any of the supported families under the different working environments.

o Tools Precision Synthesis Tool. QUARTUS "ALTERA FPGA Synth. and PNR Tool". ISE "XILINX FPGA Synth. and PNR Tool".

o Personal Share Shell Scripting. Perl and Tcl Scripting. Verilog Programming.

o Operating system Linux.

Professional Experience and Activities Windows.

♦ Obtained M. Sc. degree in Computer & Systems Engineering at Ain

Shams University, Cairo, in Jan 2012. The Master's Topic is "Design of a Swarm-search Based Fuzzy Control (SBFC) System to Solve a Path Tracking Problem Presented in Car Auto-parking".

♦ Publications from my research: o Journal Publication: M. Hanafy, Ayman Wahba, Mustafa

Gomaa, M. Taher, “Development of a Technology for Car's Auto-parking Using Swarm Search Based Fuzzy Control System”, Accepted to be Published in the 9th issue (V17 N1, 2012) of the International Journal of Modeling, Identification, and Control (IJMIC) under the INDERSCIENCE PUBLISHERS.

o Conference Publication: M. Hanafy, Ayman Wahba, Mustafa Gomaa, M. Taher, “Path Generation and Tracking for Car Automatic Parking Employing Swarm Algorithm”, Published in the IEEE Seventh International Conference on Computer Engineering and Systems (ICCES' 2011).

Sep 2006 – Apr 2007 & Oct 2009 – May 2011, Al-Shorouk Academy, Al-Shorouk, Egypt

♦ Assistant Lecturer at the Communication, Computer, & Electronics dept. of Al-Shorouk Academy, that has recently become one of the leading high educational institutes in Egypt. The subjects I instructed there: o Automatic Control Systems. o Discrete-Time Systems Control. o Fuzzy Control & PLC. o Introduction for Computer System. o Systems Analysis. o C/C++ Programming Languages.

May 2007 – Sep 2009, Military Service as Air Surveillance Officer, Egyptian Air Defense Armed Forces

Education M. Sc. in Computer & Systems Engineering at Ain Shams University, Cairo,

Egypt 2012. B. Sc. in Computer & Systems Engineering at Ain Shams University, Cairo, Egypt 2006. Grade: Very Good with honor degree (83.23%). Excellent graded Graduation Project: Manufacturing player robots to compete in ROBOCON 2006 contest.