monolithic pixel sensors
DESCRIPTION
Monolithic pixel sensors. Ivan Peri ć. Introduction – classification of CMOS sensors. Pixel type Simple pixels (no particle detection in pixel, analog output, rolling shutter readout) Intelligent pixels (particle detection in pixel, digital output, zero-suppressed readout) Technology - PowerPoint PPT PresentationTRANSCRIPT
Seminar at University of Geneva, November 6 th, 2013 1
Monolithic pixel sensors
Ivan Perić
Seminar at University of Geneva, November 6 th, 2013
Introduction – classification of CMOS sensors
2
• Pixel type• Simple pixels (no particle detection in pixel, analog output, rolling shutter readout)• Intelligent pixels (particle detection in pixel, digital output, zero-suppressed readout)• Technology • Standard (CMOS, Opto- or HV-CMOS) or special technology (Hi-resistive CMOS, backside
depleted, SOI) • Bias voltage • Low (charge collection: diffusion based, sensor: epi layer)• High (charge collection: drift based, sensor: depleted layer)
Seminar at University of Geneva, November 6 th, 2013
Introduction – classification of CMOS sensors
3
• Simple pixels• CMOS pixel sensors• Standard MAPS• Intelligent pixels• INMPAS• TWELL MAPS• Depleted MAPS with intelligent pixels• HVCMOS (Hi-Res CMOS included)• Espros MAPS• T3 MAPS• SOI
LV MAPS(Epi Layer)
HV MAPS(Delpeted Layer)
Standard (HV-) or Opto-CMOS
Standard MAPS (“MIMOSA-type”)TWELL MAPS
HVCMOS,T3
Special technology INMAPS SOI,Espros
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Commercial CMOS monolithic pixel sensors
Seminar at University of Geneva, November 6 th, 2013
CMOS monolithic sensors
• The original application of CMOS sensors – consumer electronics• Imaging sensors for digital cameras and mobile phones• Improvements are necessary for HEP
Phone with 41 M pixel sensor, 1.4um pixel size
Seminar at University of Geneva, November 6 th, 2013
Commercial imaging sensors
• Imaging sensors for digital cameras and mobile phones
Canon 120 M pixels CMOS, 2 µm pixel size
29 mm
Seminar at University of Geneva, November 6 th, 2013
MOS technology
• MOS Technology – Integrated circuit technology based on Metal Oxide Semiconductor field effect transistors
Silicon p type
n type region “diffusion”
„Metal“ Electrode Insulator
Samsung 32nm process
Seminar at University of Geneva, November 6 th, 2013
PN junction
• The simplest building element – PN junction• N-diffusion – potential minimum for electrons• P-substrate –potential barrier for electrons
Silicon n type Silicon p type
Free electrons
Seminar at University of Geneva, November 6 th, 2013
PN junction
• Reversely biased – large depleted layer• Detector mode
Silicon n type Silicon p type
+
Depleted
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PN junction as sensor of radiation
• PN junction as sensor• 1. step - ionization
Atoms
Photons or particles
IonisationFree e-
Seminar at University of Geneva, November 6 th, 2013
PN junction as sensor of radiation
• PN junction as sensor• 2. step – charge collection• Two possibilities for charge collection – drift (through E-force) and by diffusion (density gradient)
Atoms
Collection of electrons
Seminar at University of Geneva, November 6 th, 2013
PN junction as sensor of radiation
• PN junction as sensor• 3. step – charge to voltage conversion• Collection of the charge signal leads to the potential change
AtomsPotential change
Seminar at University of Geneva, November 6 th, 2013
CMOS pixel
• Pixel sensor in MOS technology
N-type regionDiffusion (shallow)
Or well (deep)
Sensor-junctionMOS FET
Sensor-junction
MOS FET
Gate
Seminar at University of Geneva, November 6 th, 2013
CMOS pixel
• N in P diode acts as sensor element – signal collection electrode
N-type regionDiffusion (shallow)
Or well (deep)
Sensor-junctionMOS FET
Sensor-junction
MOS FET
Gate
Seminar at University of Geneva, November 6 th, 2013
CMOS pixel
• Charge generated by ionization is collected by the N-diffusion• This leads to the potential change of the N-diffusion• The potential change is transferred to transistor gate – it modulates the transistor current
N-type regionDiffusion (shallow)
Or well (deep)
Sensor-junctionMOS FET
Sensor-junction
MOS FET
Gate
Seminar at University of Geneva, November 6 th, 2013
Rolling shutter readout
• Readout principle: Many pixels (usually one row) share one readout line• Additional MOSFET used as switch• The readout lines are connected to the electronics at the chip periphery that does signal
processing
A
AAAAA
SwitchSwitch
Pixel i+1Pixel iPeriphery of the chip
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CMOS monolithic pixel sensors for particle tracking
Seminar at University of Geneva, November 6 th, 2013
CMOS sensors for particle tracking
• Can CMOS structure be used for detection of high energy particles in particle tracking?• Yes, but fill factor is an issue – ratio of the sensitive versus insensitive area
Detected Not detected
Charge collection by drift
Absorbed by electronics
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Fill-factor
• Partial signal collection in the regions without E-field
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Fill-factor
• Partial signal collection in the regions without E-field
Recombination
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Overview
• Partial signal collection in the regions without E-field
Recombination
Seminar at University of Geneva, November 6 th, 2013
Overview
• Partial signal collection in the regions without E-field
Charge collection by diffusion
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Fill-factor
• Partial signal collection in the regions without E-field
Charge collection by diffusion
Seminar at University of Geneva, November 6 th, 2013
Fill-factor
• In the case visible light imaging, the insensitive regions do not impose a serious problem• Light can be focused by lenses• Exposure time can be increased• In the case of particle tracking, any insensitive region should be avoided
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CMOS pixel sensor with 100% fill factor
• MOS sensor with 100% fill-factor• Based on epi-layer• Monolithic active pixel sensor - “MAPS”
Lightly p-doped epi-layer
Heavily p-doped P-well
N-diffusion or N-well
MOS FETNMOS
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CMOS pixel sensor with 100% fill factor
• Ionization in the epi-layer• Charge collection by diffusion
N-diffusion or N-well
Particle
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MAPS
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CMOS pixel sensor with 100% fill factor - MAPS
MAPS
NMOS transistor in p-well N-well (collecting region)Pixel i
Charge collection (diffusion)
P-type epi-layer
P-type substrate Energy (e-)
Seminar at University of Geneva, November 6 th, 2013
MAPS
• Many institutes are developing MAPS, for instance: IPHC Strasbourg (PICSEL group)• Family of MIMOSA chips• Applications:, STAR-detector (RHIC Brookhaven), Eudet beam-telescope and ALICE inner
tracker upgrade
http://www.iphc.cnrs.fr/Monolithic-Active-Pixel-Sensors.html
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MAPS
http://www.iphc.cnrs.fr/Monolithic-Active-Pixel-Sensors.html
Ultimate chip for STARMIMOSA 26 for Eudet telescope
• MIMOSAs are based on rolling shutter RO but use more complex pixel electronics• Continuous reset and double correlated sampling
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Charge collection & technology studies – simple demonstrators
Production
MimoStar3
MimoTEL Imager10µ Imager12µ
Mimosa16 Mimosa16
Latchup ADC ADC MyMap
TestStruct
Real size prototype - yield studiesReticule 2x 2 cm 2006
Data compression - digitizationSara 2006Suze 2007
Final circuits – sub-blocs integration
Mimosa22
2008
Pixel Array
DiscriminatorsZero Suppression
Bias Readout
2007
1999
MAPS
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Advanced CMOS pixel sensors with intelligent pixels
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Frame readout
- Simple pixels- Signal and leakage current is
collected- No time information is attached to
hits- The whole frames are readout Small pixels Low power consumption Slow readout
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Sparse readout
6
9
9
3
6
9
9
3
- Intelligent pixels- FPN is tuned inside pixels- Leakage current is compensated- Hit detection on pixel level- Time information is attached to hits Larger pixels Larger power consumption Fast (trigger based) readout
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Intelligent pixel
LatchComparatorCR-RC
4-bit tune DACReadout bus
CSA
Bus driver
RAM
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Sparse readout
Sparse readout
Rolling shutter readout
Reset
Comp. out
Sensor
RO enable
Comp. out
Sensor
Seminar at University of Geneva, November 6 th, 2013
CMOS electronics
• Two transistor types n-channel NMOS and p-channel PMOS are needed for the realization of complex circuits
Silicon p type
Silicon n type
„Metal“ ElectrodeInsulator
Silicon n type
Silicon p type
„Metal“ ElectrodeInsulator
NMOS PMOS
NMOS
PMOS
Free e-
Holes
Holes
Seminar at University of Geneva, November 6 th, 2013
CMOS electronics
• Example: A good voltage amplifier can only be realized with CMOS
Silicon p type
Silicon n type
„Metal“ ElectrodeInsulator
Silicon n type
Silicon p type
„Metal“ ElectrodeInsulator
NMOS PMOS
NMOS
PMOS
Free e-
Holes
Seminar at University of Geneva, November 6 th, 2013
MAPS structure with CMOS pixel electronics
• If PMOS transistors are introduced, signal loss can happen
NMOS transistor in p-well
N-well (collecting region)
Pixel i
P-type epi-layer
P-type substrate Energy (e-)
MAPS with a PMOS transistor in pixel
PMOS transistor in n-well
Signal collectionSignal loss
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Advanced structures: INMAPS
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INMAPS
NMOS shielded by a deep p-wellPMOS in a shallow p-well
N-well (collecting region)
Pixel
P-doped epi layer
INMPAS
• Deep P-layer is introduced to shield the PMOS transistors from epi layer• No charge loss occurs• This is not a CMOS standard process• Only one producer so far: Tower Jazz
Seminar at University of Geneva, November 6 th, 2013
Overview
• INMAPS Tower Jazz process is gaining popularity in particle physics community• /ALICE inner tracker)• It was originally developed by the foundry and the Detector Systems Centre, Rutherford Appleton
Laboratory
2 Megapixels, large area sensorDesigned for high-dynamic range X-ray imaging40 µm pixel pitch1350 x 1350 active pixels in focal planeAnalogue readoutRegion-of-Reset setting140 dB dynamic range20 frames per second
FORTIS chip
http://dsc.stfc.ac.uk/Capabilities/CMOS+Sensors+Design/Follow+us/19816.aspx
Seminar at University of Geneva, November 6 th, 2013
Overview
• Detector Systems Centre, Rutherford Appleton Laboratory – some examples
http://dsc.stfc.ac.uk/Capabilities/CMOS+Sensors+Design/Follow+us/19816.aspx
Wafer scale 120 x 145 mm chip for medical imaging
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TWELL - MAPS
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TWELL MAPS
Triple-well MAPS
Deep n-well 2. n-wellP-well
NMOS PMOS
Pixel
Epi-layer Diffusion
Energy (e-)
Signal lossSignal collection
• Collection electrode is a deep n-well• To avoid crosstalk, secondary n-well is used for digital electronics• Rely on diffusion, implemented in low voltage CMOS processes• Collaboration: INFN Pisa, Pavia, Trieste, Padova, Torino, Bologna
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TWELL MAPS• APSEL Chips for B-factories
The APSEL4D MAPS chip bonded to the chip carrier.
Schematic drawing of the full Layer0 made of 8 pixel modules mounted around the beam pipe with a pinwheel arrangement.
“Thin pixel development for the SuperB silicon vertex tracker”, NIMA vol. 650, 2011
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Fast CMOS detectors based on drift charge collection:detectors in HVCMOS-processes and the CMOS
processes with a high resistive wafer
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Drift based detector: HVMAPS• HVMAPS rely on the charge collection by drift• Fast charge collection – high radiation tolerance• The key is the use of a high voltage n-well in a relatively highly doped substrate• Pixel electronics is embedded in the n-well• Two concepts:• High Ohmic Monolithic Pixels - LePIX – relies on a special CMOS process with high resistive
substrate (CERN, Geneve)• HVCMOS (or smart diode arrays - SDAs) – use a commercial HVCMOS process
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HVCMOS detectors (smart diode arrays)
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P-Substrate
Depleted
“Smart” Diode
n-Well
Pixel
“Smart diode” Detector
Drift Energy (e-)
• Smart diode array
SDA
Seminar at University of Geneva, November 6 th, 2013
SDA
• Collected charge causes a voltage change in the n-well.• This signal is sensed by the amplifier – placed in the n-well.
PMOS
N-well
NMOS
DS
G
holes
electrons
P-well
P-substrate
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SDA
• Collected charge causes a voltage change in the n-well.• This signal is sensed by the amplifier – placed in the n-well.
P-substrate
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SDA
P-substrate
• Collected charge causes a voltage change in the n-well.• This signal is sensed by the amplifier – placed in the n-well.
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Intelligent pixel
ComparatorCR-RC
CSA
N-well
AC coupling
3.3 V
-50 V
P-substrate
Seminar at University of Geneva, November 6 th, 2013 55
Intelligent pixel
ComparatorCR-RC
CSA
N-well
AC coupling
3.3 V
-50 V
P-substrate
Seminar at University of Geneva, November 6 th, 2013 56
Intelligent pixel
ComparatorCR-RC
CSA
N-well
AC coupling
3.3 V
-50 V
P-substrate
Seminar at University of Geneva, November 6 th, 2013 57
Intelligent pixel
ComparatorCR-RC
CSA
N-well
AC coupling
3.3 V
-50 V
P-substrate
Seminar at University of Geneva, November 6 th, 2013 58
Intelligent pixel
ComparatorCR-RC
CSA
N-well
AC coupling
3.3 V
-50 V
P-substrate
Seminar at University of Geneva, November 6 th, 2013 59
Intelligent pixel
ComparatorCR-RC
CSA
N-well
AC coupling
3.3 V
-50 V
P-substrate
Seminar at University of Geneva, November 6 th, 2013 60
Intelligent pixel
ComparatorCR-RC
CSA
N-well
AC coupling
3.3 V
-50 V
P-substrate
Seminar at University of Geneva, November 6 th, 2013
3D layout of a “smart diode”
40 µm
3D layout generated by GDS2POV software
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Applications
• Mu3e experiment at PSI and ATLAS upgrade option
5 m
m
62
Mu3e prototype chip
4.4m
m
ATLAS prototype chip
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Special monolithic technologies
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Espros
64
N-type
P-diffusion
Depleted
Ohmic connection
P-wellN-well
• Espros – semiconductor company in Switzerland
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Espros
65
HV
N-type depleted
N-well
P-diffusion
No ohmic connection
P-well
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Espros
66
P-wellN-well
HV
N-type depleted
P-diffusion
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T3-MAPS
67
P-well
T3-well
P-substrate
• T3-MAPS rely on a special option in IBM 130nm technology
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• Thank you!