Motivation for ODSA & Fit into OCP

Dharmesh Jani (DJ)OCP Co-chair and Open Ecosystem LeadFacebook

ODSA

OCP continues to evolve and grow

DataCenter

TripletRack

Battery Cabinet

Freedom Servers

Spitfire Server (AMD)

PowerSupply

Windmill (Intel)

Watermark (AMD)

Mezzanine Card V1

Knox

GroupHug

Open Rack V1

Winterfell

Open Rack V2

Mezzanine Card V2

ColdStorage

Micro Server (Panther)

Wedge

Honey Badger

Leopard

Wedge100

Big Sur

SixPack

Yosemite

Lightning

Backpack

TiogaPass

YosemiteV2

Wedge100S

BryceCanyon

BigBasin

BluRay

TwinLake

OCPNIC3.0

2011 2012 2013 2014 2015 2016 2017 2018

BigBasin V2

Open Accelerator Module

2019

FAV3

Minipack

Minilake

DataCenter

DATA CENTERS

SYSTEMS

SUB-SYSTEMS

MODULES

OCP Accelerator

Module

CWDM4-OCP

Open Domain-Specific Architecture (ODSA) OPEN

CLOSED

WIDETARGETED

CHIPLET APPROACH

Open Domain-Specific Architectures

Architecture

Optimized (Cost and Power)

CPU/GPU Combo

CPU Cores Combo

ODSA: Natural Next Step for OCP

DataCenter

TripletRack

Battery Cabinet

Freedom Servers

Spitfire Server (AMD)

PowerSupply

Windmill (Intel)

Watermark (AMD)

Mezzanine Card V1

Knox

GroupHug

Open Rack V1

Winterfell

Open Rack V2

Mezzanine Card V2

ColdStorage

Micro Server (Panther)

Wedge

Honey Badger

Leopard

Wedge100

Big Sur

SixPack

Yosemite

Lightning

Backpack

TiogaPass

YosemiteV2

Wedge100S

BryceCanyon

BigBasin

BluRay

TwinLake

OCPNIC3.0

2011 2012 2013 2014 2015 2016 2017 2018

BigBasin V2

Open Accelerator Module

2019

FAV3

Minipack

Minilake

DataCenter

DATA CENTERS

SYSTEMS

SUB-SYSTEMS

MODULES

2020

SUB-MODULESCOMPONENTS ODSA

CWDM4-OCP

DataCenter

TripletRack

Battery Cabinet

Freedom Servers

Spitfire Server (AMD)

PowerSupply

Windmill (Intel)

Watermark (AMD)

Mezzanine Card V1

Knox

GroupHug

Open Rack V1

Winterfell

Open Rack V2

Mezzanine Card V2

ColdStorage

Micro Server (Panther)

Wedge

Honey Badger

Leopard

Wedge100

Big Sur

SixPack

Yosemite

Lightning

Backpack

TiogaPass

YosemiteV2

Wedge100S

BryceCanyon

BigBasin

BluRay

TwinLake

OCPNIC3.0

2011 2012 2013 2014 2015 2016 2017 2018

BigBasin V2

Open Accelerator Module

2019

FAV3

Minipack

Minilake

DataCenter

DATA CENTERS

SYSTEMS

SUB-SYSTEMS

MODULES

2020

SUB-MODULESCOMPONENTS ODSA

CWDM4-OCP

ODSA: Natural Next Step for OCP

OPEN

CLOSED

WIDENARROW

CHIPLET APPROACH

Open Domain-Specific Architectures

Architecture

Optimized (Power and Cost)

CPU/GPU Combo

CPU Cores Combo

Start at the beginning…

data source: https://goo.gl/bb6wZW

Moore’s Law: A remarkable journeySERVER

Motivation

….remarkable journey is described by Moore’s Law, Intel co-founder Gordon Moore’s 1967 prediction that the number of transistors we can pack into a microchip would double every 18-24 months.

50 years of exponential growth!!

All exponentials must end…SERVER

Motivation

“…the nature of exponentials is that you push them out and eventually disaster happens”

Some end sooner than others…Dennard’s Law that says as transistors shrink, they get faster, use less power and get cheaper…ended about 10 years back!

data source: https://goo.gl/bb6wZW

Gordon Moore also said…

Cambrian Explosion of Workloads

Early Compute Era

Standard Computation HPC Computation

Standard Computation

Standard Computation

Graphics Computation

Modern Computation

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AI and Machine-learning and data-heavy workloads have exploded in past 5 years and will diversify as new

applications are discovered constantly…

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Late Precambrian

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Bio-Diversity Exploded from single cells into multi-cell organisms during the Cambrian explosion; all

major phylla were established in this transition

Metazoans

All images from Creative Commons

Domain-Specific Architectures

Logic Disaggregation

Improve yield and simplify/relax design requirements

IO Disaggregation

Right functionality in right silicon node

PROVEN EXISTING BUSINESS MODELS

[L. Su, IEDM’17]

CHIPLET VS MONOLITHICS

DIE COST 1X DIE COST 0.59X

I/O

CPU

L1

I/O

CPU

L1 I/O

CPU

L1

I/O

CPU

L1

CPU CPU

CPUCPU

I/O I/O

I/O I/O

L1 L1

L1 L1

CPU

CPU

CPU CPU

CPU

CPU

CPU CPU

Open Domain-Specific Architecture (ODSA) OPEN

CLOSED

WIDETARGETED

CHIPLET APPROACH

Open Domain-Specific Architectures

Architecture

Optimized (Cost and Power)

CPU/GPU Combo

CPU Cores Combo

ODSA Goal: Chiplet Marketplace

PCIe SerDesXSR, Kandou,.. BoW Parallel

AIB, HBM,…

PIPE Interface Adapter Common Abstraction

PCIe Link Layer

SATAC

CIX

Inter-ChipletLink Layer

Intra-ChipletLink Layer

Routing

CacheCoherent

Non-Coherent ISF

Pack

age

aggr

egat

ion

Stac

k

Die

dis

aggr

egat

ion

Stac

k

Inter-chiplet PHY and packaging options

CXL

Tile

Lin

k

Organic substrateInterposers/bridges

HOST

STORAGE

NET

WO

RK

X8 PCIe G3 (64Gbps)40G Ethernet optical

40G Ethernet copper

NFP

FPGA

CPUF

F

QSFP 40G

QSFP 40G

MTP

MTP

F

F

QSFP 40G

QSFP 40G

MTP

MTPDRAM

DRAM

F

F

F

F

PCIe x4 Gen3

ChipletMarketplace

ODSA ActivitiesOCP Form Factors drive Power,I/O

Footprint, Performance

Multi-technologyODSA stack

Reference architectures for:Networking, Storage,Inferencing, Training,Video and Image processing

Business, ToolsWorkflow to assembleProduct

Growth of ODSA

7 10

35

52

65

85

0

10

20

30

40

50

60

70

80

90

OCT DEC JAN MAR JUN SEPT

Cumulative Company Count

0

20

40

60

80

100

120

140

160

180

Jan March June Sept

Attendance in ODSA Events

Source: OCP ODSA Survey

ODSA: A New Server Sub-Project

Extending Moore’s Law:• Domain-Specific Architectures: Programmable ASICs to accelerate high-intensity

workloads (e.g. Tensorflow, Network Flow Processor, Antminer…• Chiplets: Build complex ASICs from multiple die, instead of as monolithic devices, to

reduce development time/costs and manufacturing costs.

Open Domain-Specific Architecture: An architecture to build domain-specific products • Today: All multi-chiplet products are based on proprietary interfaces• Tomorrow: Select best-of-breed chiplets from multiple vendors• Incubating a new group, to define a new open interface, build a PoC

Specifications

SERVER

The Tip of the Spear “Opportunity”

0

100

200

300

400

500

600

2018 2019 2020 2021 2022 2023 2024

Wireless Communications Consumer Electronics Wired Communications

Computing & Data Storage Industrial Electronics Automotive Electronics

SoC SAM by Market Segment

© 2019 IHS Markit

SoC

s bu

ilt w

ith C

hipl

ets

$(M

)

Excludes embedded x86 MPUs marketed as SoCs. Includes Configurable SoCs from PLD Vendors.Source: IHS Markit

Independent research from IHS Markit

Four use cases for chipletsSoCsMPUGPUPLDs

Six Verticals (wireless, wireline, consumer, computing, industrial, automotive)

SoCs shown on the right. Immediate opportunity for an open interface – the tip of the spear.

The End Game

0

500

1,000

1,500

2,000

2,500

3,000

3,500

2018 2019 2020 2021 2022 2023 2024Computing & Data Storage Wired CommunicationsWireless Communications Consumer ElectronicsIndustrial Electronics

Overall Chiplet SAM by Market SegmentAg

greg

ate

Proc

esso

r Mar

ket

built

with

Chi

plet

s $(

M)

0

10,000

20,000

30,000

40,000

50,000

60,000

2020 2025 2030 2035Computing & Data Storage Wired CommunicationsWireless Communications Consumer ElectronicsIndustrial Electronics Automotive Electronics

Extended Chiplet SAM by market segment

Aggr

egat

e Pr

oces

sor M

arke

t bui

lt w

ith C

hipl

ets

$(M

)

An open interface has a huge opportunity

Initially dominated by compute uses case, other market segments grow to dominate

Please Help! Join a WorkstreamJoin Interface/Standards:(Mark Kuemerle/Ramin Farjad/Robert Wang/David Kehlet)

DevelopPackaging + Socket, Dev Board

Provide FPGA IP

Provide ODSA chiplets

Provide PHY technology

Join the PoC, Build fast:(Quinn Jacobson/Jawad Nasrullah/Jayaprakash Balachandran)

Join Business, IP and workflow:(Sam Fuller/Dharmesh Jani)

Develop software Define test andassembly workflow

Provide Chiplet IP

Workstream contact information at the ODSA wiki

Define ArchitecturalInterface

Active ProjectsProject Objective Organizations Participating Recent Results Upcoming Milestones Needs

PHY Analysis PHY requirementsPHY analysisCross-PHY abstraction (PIPE)

Alphawave, AnalogX, Aquantia, Avera Semi, Facebook, Intel, Kandou, Netronome, zGlue,

PHY Analysis paper(published at Hot Interconnect)

PIPE abstraction

BoW Interface No technology license fee, easy to port inter-chiplet interface spec

Aquantia, Avera Semi, Netronome

BoW Interface proposal(published at Hot Interconnect)

BoW specification 0.7End September, 2019

Test chips, Chiplet library supporting interface

Prototype product that integrates existing die from multiple companies into one package

Achronix, Cisco, Netronome, NXP, Samtec, Sarcina, zGlue,Macom, Facebook

Decomposable design flow. Committed schedule End user End user participation~30% funding is open

Chiplet design exchange

Open chiplet physical description format. Ayar, NXP, zGlue, Draft spec ZEF Exchange format draft specification

Link and Network Layer

Interface and implementations –requirements and proposals

Achronix, Avera Semi, Intel, Netronome, NXP, Xilinx

Multi-chiplet test Test requirements for an open-chipletinterface

Chiplet monitoring Monitoring infrastructure for chipletoperation

Business workflow Formalize learnings from prototype effort

Wiki: https://www.opencompute.org/wiki/Server/ODSA, meet Fridays at 8 AM Pacific Time. Please join us.

Engineers from: Achronix, AnalogX, ASE, Avera Semi, Ayar, Cisco, Facebook, Ferric, Intel, Kandou, Macom, Marvel, Netronome, NXP, On Semi, Samtec, Sarcina, Synopsys, Xilinx, zGlue

IF YOU WANT TO GO FAST, GO ALONEIF YOU WANT TO GO FAR, GO TOGETHER

AFRICAN PROVERB