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FreescaleUser’s Guide
Document Number:MPC560XBMCBUG
Rev. 0, 08/2012
Contents
© Freescale, Inc., 2012. All rights reserved.
1 About This BookThis document describes the design of the MPC560xB Controller Board, which is targeted for rapid development of motor control applications.
To locate any published updates for this document, refer to the world-wide web at: http://www.freescale.com/.
2 IntroductionThe MPC560xB Controller Board is designed to drive a 3-phase BLDC motor, enabling implementation of motor control techniques:
• Sensorless:
— Back-EMF signal sensing using an MCU ATD converter module
— Back-EMF zero-cross signal monitoring
• Sensor based:
— Hall sensor signal monitoring
1 About This Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22.2 MPC560xB Board Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . 32.3 Board Jumper Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.4 Board LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Interface Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.1 Power Supply J700. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.2 UNI3 Interface J800 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.3 MC33937A Interface J801 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.4 Hall Sensor Interface JP600 . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.5 LIN Bus Connectors J702 & J703. . . . . . . . . . . . . . . . . . . . . . . 113.6 MainCAN and AuxCAN connectors J701 & J900 . . . . . . . . . . . 123.7 USB Connectivity J300 & J301. . . . . . . . . . . . . . . . . . . . . . . . . 123.8 Header J302 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.9 Header J303 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.10 Header J304 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143.11 Headers J305 & J306 Analog Inputs . . . . . . . . . . . . . . . . . . . . 143.12 Header J307 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163.13 Header J802 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Design Consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174.1 MPC560xB Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174.2 Power Supplies and Voltage Reference . . . . . . . . . . . . . . . . . . 204.3 Board Fault Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204.4 Hall Sensor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.5 Analog Signal Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234.6 UNI-3 PFC-PWM Signal (Power Factor Correction) . . . . . . . . . 234.7 UNI-3 Brake Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234.8 MainCAN and AuxCAN Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.9 LIN bus interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246 Board Set-up Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Appendix A References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Appendix B Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Appendix C MPC560xB Controller Board Schematic . . . . . . . . . . . . . . . . . . 27
MPC560xB Controller Board User’s Guideby: Bretislav ZuczekAutomotive and Industrial Solutions Group
MPC560xB Controller Board User’s Guide, Rev. 0
Introduction
Freescale2
The on-board UNI-3 interface enables control of the BLDC motor power stage.
The LIN and CAN communication interfaces connect the board to the other automotive network nodes.
The USB interface is targeted at FreeMASTER PC-based application control.
The MPC560xB Controller Board can be assembled with other members of the MPC560xB microcontroller family. See Table 1 for device compatibility.
2.1 FeaturesThe MPC560xB Controller Board features are as follows:
• MPC560xB microcontroller, 144 LQFP package
• JTAG interface for MCU code download and debugging
• System-basis chip MC33905D
• Motor control interface:
— UNI-3
— MC33937A predriver
— Hall sensors
• Connectivity interface:
— 2 x LIN
— 2 x CAN
— USB interface
• LEDs:
— Power-on indicators
— Phase A, B, C PWM control signals
— Phase A, B, C zero-cross
— Hall sensor outputs
— Faults monitoring
— SBC safe mode
— User application
— Serial communication
• Controls:
— Two general-purpose push buttons
Table 1. Device compatibility
Device Functionality Package Note
MPC5604B With restrictions 144LQFP missing ADC1
MPC5605B Complete 144LQFP
MPC5606B Complete 144LQFP default assembled
Introduction
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 3
— Two general-purpose switches
• Pin headers for MCU peripheral access.
• Power plug 2.1mm connector.
2.2 MPC560xB Board ArchitectureThe MPC560xB Controller Board contains the basic building blocks are depicted in Figure 1. The block color differentiates a block function:
• Blue — MCU and application software download, and the debug interface
• Green — Motor control related hardware
• Red — Board power supply and connectivity
• Violet — Application control
Figure 1. MPC560xB Controller Board Block Diagram
The board is supplied by VBAT voltage in the range of 8V to 18V. The MC33905 provides 5V to the HALL interface. The MCU and on-board logic are supplied by MCU_5V, depending on the assembled SBC version. The board is populated with the 5V SBC version by default.
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SPI
SBC
MC33905D
HALL HW
FaultLogic HW
USBHW
Analogfilters
HA
LLC
ON
CAN_AUX CONUSB CON
CAN_AUXHW
CAN CON
PW
RC
ON
2x LIN CON
UN
I3C
ON
MC
3393
7C
ON
GPIOLeds, Switches& Buttons
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JTAG CON
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ANALOG HDR
PWM HDR
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MPC560xB Controller Board User’s Guide, Rev. 0
Introduction
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The MCU generates two PWM signals for each phase. The Fault logic triggers the DC-bus undervoltage and DC-bus overcurrent faults, and forces PWM signals to safe OFF states. For the circuitry behaviour, see Section 4.3, “Board Fault Management.
The user can control the application using the push buttons and switches, USB interface (RS232), CAN and LIN buses.
The JTAG interface is present on-board to enable the download and debugging of MCU code.
For the on-board block location, see Figure 2.
Figure 2. MPC560xB Controller Board Block Location
2.3 Board Jumper Configuration
See Table 2 and Figure 3 for proper jumper configuration.
Introduction
MPC560xB Controller Board User’s Guide, Rev. 0
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Table 2. MPC560xB Board Configuration
Jumper Selector Function Connections
J704 J705
MAIN CAN MAIN CAN bus termination:- 120R, closed (default)
- without termination, open
closed
J901 J902
AUX CAN MAIN CAN bus termination:- 120R, closed (default)
- without termination, open
closed
J706 LIN1 LIN_1 master / slave mode selection:- Master, closed
- Slave, open (default)
open
J707 LIN2 LIN_2 master / slave mode selection:- Master, closed
- Slave, open (default)
open
J708 MC33905Ddebug mode
Set MC33905D SBC to debug mode:- ON, closed (default)
- OFF, open
closed
J709 MC33905DFail-Safe mode
Set MC33905D SBC to Fail-Safe mode:- ON, closed
- OFF, open (default)
open
J710 REF_JMP Change reference supply voltage for ADCs:- 3.2 V closed (default)
- 4.1 V open
closed
J201 EMIOS_JMP External jumper to interconnect EMIOS0_CH7 and EMIOS1_CH25 signals
closed
J202 BOOT selection MPC560xB boot from internal Flash. open
J301 USB LinFlex6 TxD & RxD connection to opto-isolated USB interface 1–2 closed3–4 closed
J600 HALL0 / ZCA HALL_0 input signal is connected to EMIOS0_CH8 1–2 open
UNI-3 BEMFZCA input signal is connected to EMIOS0_CH8 2–3 closed
J601 HALL1 / ZCB HALL_1 input signal is connected to EMIOS0_CH9 1–2 open
UNI-3 BEMFZCB input signal is connected to EMIOS0_CH9 2–3 closed
J602 HALL2 / ZCC HALL_2 input signal is connected to EMIOS0_CH10 1–2 open
UNI-3 BEMFZCC input signal is connected to EMIOS0_CH10 2–3 closed
R811 DCBV Voltage DC-bus Voltage signal from UNI-3 is connected to ADC01_P7 populated
R812 DCBI Current DC-bus Current signal from UNI-3 is connected to ADC01_P8 populated
R813 BEMFA UNI-3 Phase A Back-EMF Voltage is connected to ADC01_P4 populated
R814 BEMFB UNI-3 Phase B Back-EMF Voltage is connected to ADC01_P5 populated
R815 BEMFC UNI-3 Phase C Back-EMF Voltage is connected to ADC01_P6 populated
MPC560xB Controller Board User’s Guide, Rev. 0
Introduction
Freescale6
R816 TEMP UNI-3 Temperature signal is connected to ADC01_P9 populated
R817 SERIAL UNI-3 Serial signal is connected to GPIO A[12]. populated
R818 BRAKE UNI-3 Brake output signal is connected to GPIO A[4]. populated
R819 PFC UNI-3 PFC signal is connected to EMIOS1_CH0 populated
R820 PFC_EN UNI-3 PFC Enable signal is connected to GPIO A[13] populated
R821 PFC_ZC UNI-3 PFC Zero current signal is connected to EMIOS1_CH1 populated
Table 2. MPC560xB Board Configuration (continued)
Jumper Selector Function Connections
Introduction
MPC560xB Controller Board User’s Guide, Rev. 0
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Figure 3. MPC560xB Controller Board Jumper Position and Default Setting
2.4 Board LEDs
The Table 3 displays the on-board LEDs. For on-board LED locations, see Figure 2.
MPC560xB Controller Board User’s Guide, Rev. 0
Interface Description
Freescale8
3 Interface DescriptionThe following chapters summarize the on-board connectors and headers pin-outs, signal meanings and MCU pin assignments.
3.1 Power Supply J700The MPC560xB Controller Board can be supplied either by using the 2.1 mm DC power plug J700 or the UNI-3 connector (J800, pin 19).
The controller board provides 5V for a Hall interface and 5V for on-board logic. Both voltages are generated by the MC33905D SBC. Proper operation is monitored by LEDs D518, for the supply voltage +5VDC & +5VA, and D519, for the supply voltage 5V_MCU, see Table 3.
Table 3. On-board LEDs
LED Signal Name Description
D518 MCU_5V +5V MCU and peripheral power supply
D519 +5V +5V auxiliary power supply
D706 /SAFE MCZ33905 safe pin state (ON — SBC in safe mode)
D500 PWM0 Phase A0 top switch signal (ON — High Level)
D512 PWM1 Phase B0 bottom switch signal (ON — High Level)
D501 PWM2 Phase A1 top switch signal (ON — High Level)
D513 PWM3 Phase B1 bottom switch signal (ON — High Level)
D502 PWM4 Phase A2 top switch signal (ON — High Level)
D514 PWM5 Phase B2 bottom switch signal (ON — High Level)
D503 FAULT0 DC-bus undervoltage indicator
D504 FAULT1 DC-bus overcurrent indicator
D515 HALL0/ZCA Hall 0 / Zero-cross Phase A signal (ON — High Level)
D516 HALL1/ZCB Hall 1 / Zero-cross Phase B signal (ON — High Level)
D510 HALL2/ZCC Hall 2 / Zero-cross Phase C signal (ON — High Level)
D509 G_ERR General error indicator (ON — High Level)
D506 PB[0] User LED 1 (ON — High Level)
D507 PC[10] User LED 2 (ON — High Level)
D508 PC[11] User LED 3 (ON — High Level)
D511 PF[9] User LED 4 (ON — High Level)
D517 PF[8] User LED 5 (ON — High Level)
D505 PB[1] User LED 6 (ON — High Level)
D300 CBUS1 USB transmit data indicator
D301 CBUS0 USB receive data indicator
Interface Description
MPC560xB Controller Board User’s Guide, Rev. 0
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The board is designed to operate in the voltage range from 8V to 18V. The board is protected against a reverse battery.
3.2 UNI3 Interface J800The Unified Interface Version 3 (UNI-3) defines the interface between the MPC560xB Motor Controller Board and the BLDC motor power stage.
The list of UNI-3 signals is as follows:
• Control signals:
— PWM phase A, B, C top and bottom switches control
— Brake signal control
— Power Factor Correction (PFC)
• Monitor signals
— DC-bus voltage
— DC-bus current
— Phase A, B, C current
— Zero-cross signals
— Back-EMF phase A, B, C
— Temperature monitoring
• Power Supply 12V
• Serial line — a bidirectional communication line between the Controller Board and Power Stage
The Table 4 defines the UNI-3 pin-out and pin assignment to the MCU.
Table 4. UNI-3 Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 PWM0 EMIOS0_CH[1] Phase A top switch control (H -> Turn OFF) Digital output
3 PWM1 EMIOS0_CH[2] Phase A bottom switch control (H -> Turn ON) Digital output
5 PWM2 EMIOS0_CH[3] Phase B top switch control (H -> Turn OFF) Digital output
7 PWM3 EMIOS0_CH[4] Phase B bottom switch control (H -> Turn ON) Digital output
9 PWM4 EMIOS0_CH[5] Phase C top switch control (H -> Turn OFF) Digital output
11 PWM5 EMIOS0_CH[6] Phase C bottom switch control (H -> Turn ON) Digital output
2, 4, 6, 8, 10 Shield — PWM signals shield(grounded on the power stage side only)
—
12,13 GND_D — Digital power supply ground —
14, 15 +5V DC — +5V digital power supply —
17, 18 AGND — Analogue power supply ground —
19 +12/+15V DC — Analogue power supply —
16,20, 23,24,25, 27, 28,37
NC — Not connected —
MPC560xB Controller Board User’s Guide, Rev. 0
Interface Description
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3.3 MC33937A Interface J801When using a Freescale 3-phase Low-Voltage Power Stage [1], the phase top and bottom switches are controlled by the MC33937A pre-driver. The device is configured by the SPI, see Table 5.
21 VDCBUS ADC0/1_P[7] DC-bus voltage sensing, 0V – 3.3V Analog input
22 IDCBUS ADC0/1_P[8] DC-bus current sensing, 0V – 3.3V Analog input
26 TEMP ADC0/1_P[9] Analogue temperature 0V – 3.3V Analog input
29 BRAKE_CONT PA[4] DC-bus brake control Digital output
30 SERIAL PA[12] Serial interface Digital bidirectional
31 PFC EMIOS1_CH[0] Power factor correction PWM Digital output
32 PFCEN PA[13] Power factor correction enable Digital output
33 PFCZC EMIOS1_CH[1] Power factor correction zero-cross Digital input
34 ZCA EMIOS0_CH[12] Phase A Back-EMF zero-cross Digital input
35 ZCB EMIOS0_CH[14] Phase B Back-EMF zero-cross Digital input
36 ZCC EMIOS0_CH[15] Phase C Back-EMF zero-cross Digital input
38 Back-EMF_A ADC0/1_P[4] Phase A Back-EMF voltage sensing Analog input
39 Back-EMF_B ADC0/1_P[5] Phase B Back-EMF voltage sensing Analog input
40 Back-EMF_C ADC0/1_P[6] Phase C Back-EMF voltage sensing Analog input
Table 5. MC33937A Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 NC — Not connected. —
2 NC — Not connected —
3 MC33937_EN PA[14] Device enable Digital output
4 MC33937_OC PF[11] Overcurrent Digital input
5 MC33937_/RST PF[10] Reset Digital output
6 MC33937_INT PF[13] Interrupt Digital input
7 MC33937_SOUT DSPI[4]_SIN SPI Input data Digital input
8 MC33937_SCK DSPI[4]_SCLK SPI clock Digital output
9 MC33937_CS DSPI[4]_CS0 Chip-select Digital output
10 MC33937_SIN DSPI[4]_SOUT SPI output data Digital output
Table 4. UNI-3 Signal Description
Interface Pin Signal Name MCU Signal Description Direction
Interface Description
MPC560xB Controller Board User’s Guide, Rev. 0
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3.4 Hall Sensor Interface JP600When developing the sensor based BLDC application, the Hall sensors are used to determine the actual motor rotor sector. Connect the motor Hall sensors outputs to JP600 following the instructions in Table 6, and watch the signal levels on the on-board LEDs as in Table 2, Table 3.
3.5 LIN Bus Connectors J702 & J703The system basis chip MC33905D LIN transceiver is used as an on-board LIN interface hardware. The LIN node can be configured to either the Master or Slave mode, see Table 2.
Table 7 and Table 8 show the LIN connector’s pin-out and pin assignment to the MCU.
Table 7. LIN_1 J702 Signal Description
Table 6. Hall Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 +5Vdc — +5V sensor supply voltage —
2 GND — Ground —
3 HALL0 EMIOS0_CH[12] HALL0 sensor output Digital input
4 HALL1 EMIOS0_CH[14] HALL1 sensor output Digital input
5 HALL2 EMIOS0_CH[15] HALL 2 sensor output Digital input
6 NC — Not connected —
Interface Pin Signal Name MCU Signal Description Direction
1 GND — Ground —
2 VSUP — Power Supply —
3 GND — Ground —
4 LIN LIN[4]RX LIN[4]TX
LIN bus Digital bidirectional
Table 8. LIN_2 J703 Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 GND — Ground —
2 VSUP — Power Supply —
3 GND — Ground —
4 LIN LIN[0]RX LIN[0]TX
LIN bus Digital bidirectional
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Interface Description
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3.6 MainCAN and AuxCAN connectors J701 & J900The system basis chip MC33905D CAN transceiver is used as the main CAN hardware interface. The on-board jumpers J704, J705 enable node termination, with impedance of 120R, see Table 2.
An auxiliary CAN interface is provided by the MC33902 transceiver. The on-board jumpers J900, J901 enable node termination, with impedance of 120R, see Table 2.
Table 9 and Table 10 show the CAN connector’s pin-out and pin assignment to the MCU.
Table 9. MainCAN J701 Signal Description
Table 10. AuxCAN J900 Signal Description
3.7 USB Connectivity J300 & J301The USB line is used for board communication with the PC, when using for example, the Freescale FreeMASTER tool [3] to control the user application. The interface uses a B-type connector and it is isolated from the board environment. See Table 11 for the pin description and pin assignment to the MCU.
Header J301 enables USB communication or can be used for LINFlex_6 signals and power supply pins access. For more details see Table 12.
Table 11. J300 USB Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 CANH CAN[4]RX CAN[4]TX
CAN bus H Differential bidirectional
2 CANL CAN[4]RX CAN[4]TX
CAN bus L Differential bidirectional
3 GND — Ground —
4 NC — Not connected —
Interface Pin Signal Name MCU Signal Description Direction
1 CANH CAN[1]RX CAN[1]TX
CAN bus H Differential bidirectional
2 CANL CAN[1]RX CAN[1]TX
CAN bus L Differential bidirectional
3 GND — Ground —
4 NC — Not connected —
Interface Pin Signal Name MCU Signal Description Direction
1 VBUS — USB Power Supply —
2 D- LIN[6]RX LIN[6]TX
Data – Digital bidirectional
Interface Description
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Table 12. J301 USB communication enable
NOTEPay attention to not short out pins 5 and 6.
3.8 Header J302The connectivity expansion header J302 contains the LINFlex_7 and DSPI_3 signals, see Table 13.
Table 13. J302 Signal Description
3.9 Header J303Header J303 is primarily dedicated to connecting the external analogue multiplexer hardware which allows expansion of up to 8 additional ADC channels. For multiplexer channels decoding, MA[x] signals are used. Multiplexed channels are connected to the ADC0_X[3] input. In other cases, the header J303 pins can be used as general purpose I/O. See a detailed description in Table 14.
3 D+ LIN[6]RX LIN[6]TX
Data + Digital bidirectional
4 GND_USB — USB Ground —
Header pins Jumper settings Description
1+2 On (default)Off
Enable SCI transmitDisable SCI transmit
3+4 On (default)Off
Enable SCI receiveDisable SCI receive
5 GND Power Supply Ground
6 MCU_5V Power Supply MCU_5V
Interface Pin Signal Name MCU Signal Description Direction
1 HDR_LINFL_RX LIN[7]_RX LINFlex Receive Data Digital input
2 HDR_LINFL_TX LIN[7]_TX LINFlex Transmit Data Digital output
3 HDR_SPI_CS0 DSPI[3]_CS0 Serial Peripheral Interface Chip Select Digital output
4 HDR_SPI_SOUT DSPI[3]_SOUT Serial Peripheral Interface Output Digital output
5 HDR_SPI_SIN DSPI[3]_SIN Serial Peripheral Interface Input Digital input
6 HDR_SPI_SCK DSPI[3]_SCK Serial Peripheral Interface Clock Digital output
7 GND — Ground
8 +5VDC — +5V Digital Power Supply
Interface Pin Signal Name MCU Signal Description Direction
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Interface Description
Freescale14
Table 14. J303 Signal Description
3.10 Header J304Monitoring the PWM signal and FAULT signal is possible using J304. The Table 15 summarizes the header pin-out.
Table 15. J304 Signal Description
3.11 Headers J305 & J306 Analog InputsThe MPC560xB includes 2 ADC modules, ADC_0 with 10-bit resolution and ADC_1 with 12-bit resolution with 0 Vref common mode conversion range, see Section 4.2, “Power Supplies and Voltage Reference.” Both ADCs are supplied from the voltage reference.
• Internally multiplexed channels
— 16 precision channels shared between 10-bit and 12-bit ADCs
— 3 standard channels shared between 10-bit and 12-bit ADCs
— 5 dedicated standard channels on 12-bit ADC
— Up to 29 dedicated standard channels on 10-bit ADC
Interface Pin Signal Name MCU Signal Description Direction
1 HRD_PH[8]_MA0 PH[8]/MA[0] General purpose pin / External MPX channel decoder
Digital I/O
2 HRD_PH[7]_MA1 PH[7]/MA[1] General purpose pin / External MPX channel decoder
Digital I/O
3 HRD_PH[6]_MA2 PH[6]/MA[2] General purpose pin / External MPX channel decoder
Digital I/O
4 HRD_PH[5] PH[5] General purpose pin Digital I/O
5 HRD_PH[4] PH[4] General purpose pin Digital I/O
6 HRD_ANX[3] PB[15]/ADC0_X[3] Externally multiplexed analogue input IO / Analog input
7 GND — Ground
8 +5VDC — +5V Digital Power Supply
Interface Pin Signal Name MCU Signal Description Direction
1 PWM_AT EMIOS0_CH[1] Phase A top switch control Digital output
2 PWM_AB EMIOS0_CH[2] Phase A bottom switch control Digital output
3 PWM_BT EMIOS0_CH[3] Phase B top switch control Digital output
4 PWM_BB EMIOS0_CH[4] Phase B bottom switch control Digital output
5 PWM_CT EMIOS0_CH[5] Phase C top switch control Digital output
6 PWM_CB EMIOS0_CH[6] Phase C bottom switch control Digital output
7 FAULT0 EIRQ[18] DC-bus Voltage fault signal Digital input
8 FAULT1 EIRQ[7] BC-bus Current fault signal Digital input
Interface Description
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 15
• Externally multiplexed channels
— Internal control to support generation of external analogue multiplexer selection
— 4 internal channels optionally used to support externally multiplexed inputs, providing transparent control for additional ADC channels
— Each of the 4 channels supports as many as 8 externally multiplexed inputs (ANX3 available on the controller board only)
External analogue signals can be connected through headers J305, J306, see Table 16 and Table 17.
Table 16. J305 Signal Description
Table 17. J306 Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 AN0_S PA[14] Standard channel (ADC0/ADC1) Analog input
2 AN1_S PF[10] Standard channel (ADC0/ADC1) Analog input
3 AN2_S PF[11] Standard channel (ADC0/ADC1) Analog input
4 AN3_P PF[13] Precision channel (ADC0/ADC1) Analog input
5 AN4_P DSPI[4]_SCK Precision channel (ADC0/ADC1) Analog input
6 AN5_P DSPI[4]_SIN Precision channel (ADC0/ADC1) Analog input
7 AN6_P DSPI[4]_SOUT Precision channel (ADC0/ADC1) Analog input
8 AN7_P DSPI[4]_CS Precision channel (ADC0/ADC1) Analog input
9 AN8_P Precision channel (ADC0/ADC1) Analog input
10 AN9_P Precision channel (ADC0/ADC1) Analog input
11 AN10_P Precision channel (ADC0/ADC1) Analog input
12 AN11_P Precision channel (ADC0/ADC1) Analog input
13 GNDA Ground –
14 +5VA +5V analog supply voltage –
Interface Pin Signal Name MCU Signal Description Direction
1 ANA0 PA[14] Standard channel (ADC0) Analog input
2 ANA1 PF[10] Standard channel (ADC0) Analog input
3 ANA2 PF[11] Standard channel (ADC0) Analog input
4 ANA3 PF[13] Standard channel (ADC0) Analog input
5 ANA4 DSPI[4]_SCK Standard channel (ADC0) Analog input
6 ANA5 DSPI[4]_SIN Standard channel (ADC0) Analog input
7 ANA6 DSPI[4]_SOUT Standard channel (ADC0) Analog input
8 ANA7 DSPI[4]_CS Standard channel (ADC0) Analog input
9 ANA8 Standard channel (ADC0) Analog input
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Interface Description
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3.12 Header J307Header J307 allows control signals monitoring of the MC33937A, see Table 18.
Table 18. J307 Signal Description
3.13 Header J802Header J802 is usable for external measurement and monitoring of UNI3 signals, important for the motor control application, see Table 19.
Table 19. J802 Signal Description
10 ANA9 Standard channel (ADC0) Analog input
11 ANA10 Standard channel (ADC0) Analog input
12 NC Not connected Analog input
13 GNDA Ground –
14 +5VA +5V analogue supply voltage –
Interface Pin Signal Name MCU Signal Description Direction
1 MC33937_EN PA[14] MC33937 Device Enable Digital output
2 MC33937_/RST PF[10] MC33937 Device Reset Digital output
3 MC33937_OC PF[11] MC33937 Overcurrent indication Digital input
4 MC33937_INT PF[13] MC33937 Interrupt Digital input
5 MC33937_SCK DSPI[4]_SCK MC33937 Serial Peripheral Interface Clock Digital output
6 MC33937_SIN DSPI[4]_SIN MC33937 Serial Peripheral Interface Input Digital output
7 MC33937_SOUT DSPI[4]_SOUT MC33937 Serial Peripheral Interface Output Digital input
8 MC33937_CS DSPI[4]_CS MC33937 Serial Peripheral Interface Chip Select Digital output
Interface Pin Signal Name MCU Signal Description Direction
1 BEMFB — Phase B Back-EMF voltage
2 BEMFC — Phase C Back-EMF voltage
3 BEMFA — Phase A Back-EMF voltage
4 PFCZC — Power factor correction Zero-cross
5 PFC — Power factor correction PWM
6 BRAKE — DC-bus brake control signal
7 PFCEN — Power factor correction enable signal
8 SERIAL — Serial interface
9 TEMP — MC33937A Temperature
Interface Pin Signal Name MCU Signal Description Direction
Design Consideration
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 17
4 Design ConsiderationThis chapter provides additional information on the functional blocks of the MPC560xB Motor controller board.
4.1 MPC560xB FeaturesThe Qorivva MPC560xB family of 32-bit microcontrollers is the latest achievement in integrated automotive body application controllers. It belongs to an expanding family of automotive-focused products designed to address the next wave of body electronics applications within the vehicle. The advanced and cost-efficient host processor core of the MPC560xB automotive controller family complies with the Power Architecture embedded category. It operates at speeds of up to 64 MHz and offers high performance processing optimized for low power consumption.
The availability of up to two Enhanced Modular Input/Output Subsystem modules (eMIOS) with enhanced timer capabilities, up to two Analogue-to-Digital Converters (ADC) modules, and a Cross Triggering Unit (CTU) makes the MPC560xB microcontrollers suitable for BLDC motor control applications.
10 DCBV — DC-bus voltage
DCBI — DB-bus current
GND — Ground
Table 20. Supported MPC560xB device comparison(144 LQFP package)
FeatureDevice
MPC5604B MPC5605B MPC5606B
CPU e200z0h
Execution speed Up to 64MHz
Code Flash 512 KB 768 KB 1 MB
Data Flash 64 KB
RAM 48 KB 64 KB 80 KB
eMIOS_0 28 ch, 16-bit 32 ch, 16-bit
eMIOS_1 28 ch, 16-bit 32 ch, 16-bit
ADC_0 36 ch, 10-bit 15 ch, 19 ch shared, 10-bit 15 ch, 19 ch shared, 10-bit
ADC_1 No 5 ch, 19 ch shared, 12-bit 5 ch, 19 ch shared, 12-bit
CTU Yes
eDMA No 16 channel
SCI (LINFlex) 4 6
Interface Pin Signal Name MCU Signal Description Direction
MPC560xB Controller Board User’s Guide, Rev. 0
Design Consideration
Freescale18
SPI (DSPI) 3 5
IIC 1
CAN (FlexCAN) 6
Debug JTAG
Table 20. Supported MPC560xB device comparison(144 LQFP package)
FeatureDevice
MPC5604B MPC5605B MPC5606B
Design Consideration
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 19
The device block diagram is shown in Figure 4. A detailed description of the MCU can be found in the datasheet or reference manual.
Figure 4. MPC5607B Family Block Diagram
MPC560xB Controller Board User’s Guide, Rev. 0
Design Consideration
Freescale20
4.2 Power Supplies and Voltage ReferenceThe MPC560xB Controller Board can be supplied from two main power supply inputs. The first one uses
a 2.1 mm DC power plug and the second one uses the UNI-3 connector. Which one is more suitable depends on the application type. The controller board provides a +5V DC-voltage regulation for the HALL sensor interface, LED indicators and a fault logic circuit, MCU_5V for MCU + supporting logic, +5VA to supply external analogue modules and to provide the reference voltage for the ADC module. Power applied to the MPC560xB Controller Board is indicated by a power-on LED. The block diagram is shown in Figure 5.
Figure 5. Power supply
4.3 Board Fault ManagementFaults can be processed either by MCU software or by the on-board hardware.
To detect error states very quickly, the MPC560xB Controller Board provides two adjustable comparators and a fault logic circuit to force a disconnection of PWM signals from the MCU. The FAULT0 signal indicates an undervoltage state on DC-bus. The error level can be adjusted by trimmer R805. The FAULT1 signal indicates an overcurrent state on DC-bus and the error level can be adjusted by trimmer R810. The fault logic circuit is enabled by default and can be disabled by setting MCU port pin A[15] low. Before starting the motor control application, the fault logic circuit must be set to the default state by generating a positive pulse on the FLT_RESET signal (MCU port pin G[0]). The working principle can be seen in Figure 6.
MC33905D
* Adj.Reference
VDDVSup1
VAUX
UNI3
+15V Supply
Externalpower supply
VSense
Vsup2
MCU_5V
* Note: Defalt value of Voltage reference is 3.2V
+5VDC
VREF
+5VA
Design Consideration
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 21
Figure 6. Fault Management Hardware
4.4 Hall Sensor InterfaceThe Hall sensor interface is used for the BLDC sensor based motor control application. The Hall sensors are used to determine the actual motor rotor sector.
The on-board interface provides the 5V power supply voltage to supply the sensors. The Hall interface inputs are designed to support an open collector as well as push-pull Hall sensors outputs, see Figure 7. A single pole RC low-pass filter is present to reduce the signal noise.
For a detailed JP600 connector signal description, see Table 6.
PWM0_OUT
PWM1_OUT
PWM2_OUT
PWM3_OUT
PWM4_OUT
PWM5_OUT
PWM4_IN
PWM5_IN
PWM0_IN
PWM1_IN
PWM2_IN
PWM3_IN
FAULT0
FAULT1
FLT_EN
FLT_RESET
FLT0_SIG
FLT1_SIG
+5Vdc
GND_D
GND_D
+5Vdc
+5Vdc
GND_D
GND_D
+5Vdc
+5Vdc
GND_D
+5VdcHI-SIDE
LOW-SIDE
Q
Q'
Q'
Q
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U1001B
MC74ACT08DG
4
5
6
U1000C
MC74ACT32DG
9
10
8
GND
VCC
U1000A
MC74ACT32DG
1
2
3
14
7
VCC
GND
U1004A
74LVC2G02DCUR
1
2
7
84
U1001D
MC74ACT08DG
12
13
11
VCC
GND
U1003A
74LVC2G02DCUR
1
2
7
84
U1005B
SN74LVC2G00DCUR
5
6
3
U1000D
MC74ACT32DG
12
13
11
U1000B
MC74ACT32DG
4
5
6
U1003B
74LVC2G02DCUR
5
6
3
VCC
GND
U1005A
SN74LVC2G00DCUR
1
2
7
84
U1004B
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5
6
3
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GND
U1001A
MC74ACT08DG
1
2
3
14
7
U1001C
MC74ACT08DG
9
10
8
MPC560xB Controller Board User’s Guide, Rev. 0
Design Consideration
Freescale22
Figure 7. Hall Sensor Interface
The Figure 8 shows the Hall sensor signal alignment to the BLDC motor Back-EMF signal. The Hall sensors detect the rotor flux, so their actual state is not influenced by stator current. The Hall effect outputs in BLDC motors divide the electrical revolution into three equal sections of 120°. In this so-called 120° configuration, the Hall states 111 and 000 never occur.
Based on the Hall sensor signal, the BLDC motor commutation table is developed. An example is shown in Figure 9. The right-hand side of the table shows the Hall sensors signal, while the left side the applied phase voltage.
Figure 8. BLDC Motor Back-EMF and Hall Sensor Signal Alignment
Design Consideration
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 23
Figure 9. Example of BLDC Motor Commutation
4.5 Analog Signal SensingThe analog input signals listed in Figure 10, Table 16, and Table 17 are connected to the analogue to digital converters through the RC filters. The time constant of RC filter is set with respect to the input signal bandwidth.
Figure 10. Analog Sensing Circuit
4.6 UNI-3 PFC-PWM Signal (Power Factor Correction)The PFC-PWM signal is used to control a power stage circuit such as a PFC or a power DC-DC converter (when available). These signals are connected to the MPC560xB controller. For more details, see Table 21.
4.7 UNI-3 Brake SignalThe brake signal output is used to control the DC-bus resistor switch. It is controlled via GPIO A[4].
Table 21. UNI-3 PFC-PWM Signals
Signal MPC5606B signal UNI-3 pin
PFC-PWM EMIOS1_CH0 31
PFC_ENABLE GPIO A[13] 32
PFC_ZERO_CROSS EMIOS1_CH1 33
MPC560xB Controller Board User’s Guide, Rev. 0
Electrical Characteristics
Freescale24
4.8 MainCAN and AuxCAN BusThe FlexCAN module is a communication controller implementing the CAN protocol according to the CAN 2.0B protocol specification, which supports both standard and extended message frames. A number of Message Buffers (32) is also supported. Please refer to the MPC560xB reference manual for a detailed description. The Freescale system basis chip MCZ33905D with one CAN is used as the main CAN hardware interface, and the Freescale chip MCZ33902 is used as the auxiliary hardware interface. Jumpers (J704, J705) and (J900, J901) define the middle or end node.
4.9 LIN bus interfacesThe LINFlex (Local Interconnect Network Flexible) controller interfaces the LIN network and supports the LIN protocol versions 1.3, 2.0 and 2.1, and J2602 in both Master and Slave modes. Please refer to the MPC560xB reference manual for a detailed description. The Freescale system basis chip MC33905D, with two LIN bus physical interfaces, provides an additional possibility for connection. Both the LIN_1 and LIN_2 interfaces can be configured as master or slave by jumpers (J706, J707).
5 Electrical CharacteristicsThe electrical characteristics in Table 22 apply to an operation at 25 °C.
1—12V power supply, MCU without software
6 Board Set-up GuideThe board is designed to be supplied either by the UNI-3 interface or by using the on-board J700 connector, with a power supply voltage from 8 to 18V. When using the board as a stand-alone EVB, connect the power supply to J700. In the case of board operation with the power stage, it is recommended to supply the board using the UNI-3 interface.
The MPC560xB Controller Board is designed for operation with the Freescale MC33937A based 3-Phase low-voltage power stage; see Figure 11. The complete 3-phase BLDC Sensor / Sensorless Development Kit can be ordered at http://www.freescale.com/AutoMCDevKits.
Table 22. Electrical Characteristics
Characteristic Symbol Min Typ Max Units
Power supply Voltage VDC 8 12 18 V
Current consumption(1) ICC 40 mA
Input Voltage Range VIN 0 — 5 V
Input Voltage Range Hall and MC33937 interface VIN 0 — 5 V
Board Set-up Guide
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 25
Figure 11. 3-Phase BLDC Sensor / Sensorless Development Kit
MPC560xB Controller Board User’s Guide, Rev. 0
References
Freescale26
Appendix A References1. 3-phase Low-Voltage Power Stage, www.freescale.com/AutoMCDevKits
2. MPC5607B Family Reference Manual, MPC5607BRM Rev. 7.1, 6 June 2011
3. FreeMASTER Run-time Debugging Tool, www.freescale.com/FREEMASTER
4. MPC560xB documentation is available at the Freescale website www.freescale.com
Appendix B AcronymsTable 23. Acronyms
Acronyms Description
ADC Analog to Digital Converter
BEMF Back Electromotive Force
BLDC Brushless DC Motor
CAN Controller Area Network
LIN Local Interconnect Network
MCU Microcontroller Unit
PC Personal Computer
PWM Pulse Width Modulation
SBC System Basis Chip
EVB Evaluation Board
USB Universal Serial Bus
MPC560xB Controller Board Schematic
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 27
Appendix C MPC560xB Controller Board Schematic
MPC560xB Controller Board User’s Guide, Rev. 0
MPC560xB Controller Board Schematic
Freescale28
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MPC560xB Controller Board Schematic
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 29
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Fre
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FC
P:
FIU
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PU
BI:
SC
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71
57
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F:
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MP
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Mo
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1
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C
MPC560xB Controller Board User’s Guide, Rev. 0
MPC560xB Controller Board Schematic
Freescale30
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
JTAG
IN
TERF
ACE
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IRCU
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8
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9
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10
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11
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C0_S
12
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C0_S
13
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C0_S
14
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C0_S
15
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5
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6
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7
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5]
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5
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6
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C01_P
7
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C01_P
8
AD
C01_P
9
AD
C01_P
10
33937_E
N
33937_/R
ST
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T
33937_O
C
33937_C
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33937_S
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OU
T
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
es
ca
le S
em
ico
nd
uc
tor
RC
SC
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C560X
B C
on
tro
ller
Bo
ard
A3
Monday, A
ugust 29, 2011
uC
on
tro
lle
r
Bre
tisla
v Y
ucyek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
es
ca
le S
em
ico
nd
uc
tor
RC
SC
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C560X
B C
on
tro
ller
Bo
ard
A3
Monday, A
ugust 29, 2011
uC
on
tro
lle
r
Bre
tisla
v Y
ucyek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
es
ca
le S
em
ico
nd
uc
tor
RC
SC
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C560X
B C
on
tro
ller
Bo
ard
A3
Monday, A
ugust 29, 2011
uC
on
tro
lle
r
Bre
tisla
v Y
ucyek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
R200
1.0
M
J202
1 2
J203
1 2
J204
HD
R_2X
7
12
34
56
78
910
11
12
13
14
J201
12
C205
0.4
7U
F
C203
22P
F
C214
0.1
UF
C211
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UF
C210
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UF
C213
0.1
UF
C209
0.1
UF
+C
216
10U
F
U503
MP
C5606B
F1M
LQ
6
EX
TA
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PA
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0U
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16
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MI/W
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PA
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IRQ
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DC
1_S
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90
PA
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0U
C[4
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S0_1/L
IN5R
X/W
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PA
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X118
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0U
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X119
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IRQ
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DC
1_S
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104
PA
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PIO
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0U
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4]/E
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BS
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X105
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0U
C[9
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S2_1/F
AB
106
PA
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0U
C[1
0]/S
DA
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2T
X/A
DC
1_S
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107
PA
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1]/S
CL/E
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X/A
DC
1_S
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108
PA
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0U
C[2
8]/C
S3_1/E
IRQ
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IN_0
45
PA
[13]/G
PIO
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T_0/E
0U
C[2
9]
44
PA
[14]/G
PIO
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CK
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S0_0/E
0U
C[0
]/E
IRQ
[4]
42
PA
[15]/G
PIO
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S0_0/S
CK
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0U
C[1
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KU
P[1
0]
40
PB
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PIO
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AN
0T
X/E
0U
C[3
0]/LIN
0T
X0
31
PB
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PIO
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0U
C[3
1]/W
KU
P[4
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0R
X/L
IN0R
X32
PB
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X/S
DA
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0]
144
PB
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1]/S
CL/W
KU
P[1
1]/LIN
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X1
PB
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72
PB
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DC
0_P
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DC
1_P
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[21]
75
PB
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DC
0_P
[2]/A
DC
1_P
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PIO
[22]
76
PB
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DC
0_P
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DC
1_P
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PIO
[23]
77
PB
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PIO
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SC
32K
_X
TA
L/W
KU
P[2
5]/A
DC
0_S
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DC
1_S
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53
PB
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PIO
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SC
32K
_E
XT
AL/W
KU
P[2
6]/A
DC
0_S
[1]/A
DC
1_S
[5]
52
PB
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PIO
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KU
P[8
]/A
DC
0_S
[2]/A
DC
1_S
[6]
54
PB
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PIO
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0U
C[4
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S1_0/A
DC
0_X
[0]
83
PB
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PIO
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0U
C[5
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S2_0/A
DC
0_X
[1]
85
PB
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PIO
[30]/E
0U
C[6
]/C
S3_0/A
DC
0_X
[2]
87
PB
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PIO
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0U
C[7
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S4_0/A
DC
0_X
[3]
89
PC
[0]/G
PIO
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DI
126
PC
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PIO
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DO
121
PC
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PIO
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CK
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AN
4T
X/D
EB
UG
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IRQ
[5]
117
PC
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PIO
[35]/C
S0_1/M
A[0
]/D
EB
UG
[1]/E
IRQ
[6]/C
AN
1R
X/C
AN
4R
X116
PC
[4]/G
PIO
[36]/E
1U
C[3
1]/D
EB
UG
[2]/E
IRQ
[18]/S
IN_1/C
AN
3R
X131
PC
[5]/G
PIO
[37]/S
OU
T_1/C
AN
3T
X/D
EB
UG
[3]/E
IRQ
[7]
130
PC
[6]/G
PIO
[38]/LIN
1T
X/E
1U
C[2
8]/D
EB
UG
[4]
36
PC
[7]/G
PIO
[39]/E
1U
C[2
9]/D
EB
UG
[5]/LIN
1R
X/W
KU
P[1
2]
37
PC
[8]/G
PIO
[40]/LIN
2T
X/E
0U
C[3
]/D
EB
UG
[6]
143
PC
[9]/G
PIO
[41]/E
0U
C[7
]/D
EB
UG
[7]/W
KU
P[1
3]/LIN
2R
X2
PC
[10]/G
PIO
[42]/C
AN
1T
X/C
AN
4T
X/M
A[1
]28
PC
[11]/G
PIO
[43]/M
A[2
]/W
KU
P[5
]/C
AN
1R
X/C
AN
4R
X27
PC
[12]/G
PIO
[44]/E
0U
C[1
2]/E
IRQ
[19]/S
IN_2
141
PC
[13]/G
PIO
[45]/E
0U
C[1
3]/S
OU
T_2
142
PC
[14]/G
PIO
[46]/E
0U
C[1
4]/S
CK
_2/E
IRQ
[8]
3
PC
[15]/G
PIO
[47]/E
0U
C[1
5]/C
S0_2/E
IRQ
[20]
4
PD
[0]/G
PIO
[48]/W
KU
P[2
7]/A
DC
0_P
[4]/A
DC
1_P
[4]
63
PD
[1]/G
PIO
[49]/W
KU
P[2
8]/A
DC
0_P
[5]/A
DC
1_P
[5]
64
PD
[2]/G
PIO
[50]/A
DC
0_P
[6]/A
DC
1_P
[6]
65
PD
[3]/G
PIO
[51]/A
DC
0_P
[7]/A
DC
1_P
[7]
66
PD
[4]/G
PIO
[52]/A
DC
0_P
[8]/A
DC
1_P
[8]
67
PD
[5]/G
PIO
[53]/A
DC
0_P
[9]/A
DC
1_P
[9]
68
PD
[6]/G
PIO
[54]/A
DC
0_P
[10]/A
DC
1_P
[10]
69
PD
[7]/G
PIO
[55]/A
DC
0_P
[11]/A
DC
1_P
[11]
70
PD
[8]/G
PIO
[56]/A
DC
0_P
[12]/A
DC
1_P
[12]
71
PD
[9]/G
PIO
[57]/A
DC
0_P
[13]/A
DC
1_P
[13]
78
PD
[10]/G
PIO
[58]/A
DC
0_P
[14]/A
DC
1_P
[14]
79
PD
[11]/G
PIO
[59]/A
DC
0_P
[15]/A
DC
1_P
[15]
80
PD
[13]/G
PIO
[61]/C
S0_1/E
0U
C[2
5]/A
DC
0_S
[5]
84
PD
[14]/G
PIO
[62]/C
S1_1/E
0U
C[2
6]/A
DC
0_S
[6]
86
PD
[15]/G
PIO
[63]/C
S2_1/E
0U
C[2
7]/A
DC
0_S
[7]
88
RE
SE
T21
VSS_HV_ADC073
VSS_HV_ADC181
VSS_HV118
VSS_HV220
VSS_HV349
VSS_HV499
VSS_HV5122
VSS_LV122
VSS_LV247
VSS_LV3125
XT
AL
48
PE
[0]/G
PIO
[64]/E
0U
C[1
6]/W
KU
P[6
]/C
AN
5R
X10
PE
[1]/G
PIO
[65]/E
0U
C[1
7]/C
AN
5T
X12
PE
[2]/G
PIO
[66]/E
0U
C[1
8]/E
IRQ
[21]/S
IN_1
128
PE
[3]/G
PIO
[67]/E
0U
C[1
9]/S
OU
T_1
129
PE
[4]/G
PIO
[68]/E
0U
C[2
0]/S
CK
_1/E
IRQ
[9]
132
PE
[5]/G
PIO
[69]/E
0U
C[2
1]/C
S0_1/M
A[2
]133
PE
[6]/G
PIO
[70]/E
0U
C[2
2]/C
S3_0/M
A[1
]/E
IRQ
[22]
139
PE
[7]/G
PIO
[71]/E
0U
C[2
3]/C
S2_0/M
A[0
]/E
IRQ
[23]
140
PE
[8]/G
PIO
[72]/C
AN
2T
X/E
0U
C[2
2]/C
AN
3T
X13
PE
[9]/G
PIO
[73]/E
0U
C[2
3]/W
KU
P[7
]/C
AN
2R
X/C
AN
3R
X14
PE
[10]/G
PIO
[74]/LIN
3T
X/C
S3_1/E
1U
C[3
0]/E
IRQ
[10]
15
PE
[11]/G
PIO
[75]/E
0U
C[2
4]/C
S4_1/L
IN3R
X/W
KU
P[1
4]
17
PE
[12]/G
PIO
[76]/E
1U
C[1
9]/E
IRQ
[11]/S
IN_2/A
DC
1_S
[7]
109
PE
[13]/G
PIO
[77]/S
OU
T_2/E
1U
C[2
0]
103
PE
[14]/G
PIO
[78]/S
CK
_2/E
1U
C[2
1]/E
IRQ
[12]
112
PE
[15]/G
PIO
[79]/C
S0_2/E
1U
C[2
2]
113
PF
[0]/G
PIO
[80]/E
0U
C[1
0]/C
S3_1/A
DC
0_S
[8]
55
PF
[1]/G
PIO
[81]/E
0U
C[1
1]/C
S4_1/A
DC
0_S
[9]
56
PF
[2]/G
PIO
[82]/E
0U
C[1
2]/C
S0_2/A
DC
0_S
[10]
57
PF
[3]/G
PIO
[83]/E
0U
C[1
3]/C
S1_2/A
DC
0_S
[11]
58
PF
[4]/G
PIO
[84]/E
0U
C[1
4]/C
S2_2/A
DC
0_S
[12]
59
PF
[5]/G
PIO
[85]/E
0U
C[2
2]/C
S3_2/A
DC
0_S
[13]
60
PF
[6]/G
PIO
[86]/E
0U
C[2
3]/C
S1_1/A
DC
0_S
[14]
61
PF
[7]/G
PIO
[87]/C
S2_1/A
DC
0_S
[15]
62
PF
[8]/G
PIO
[88]/C
AN
3T
X/C
S4_0/C
AN
2T
X34
PF
[9]/G
PIO
[89]/E
1U
C[1
]/C
S5_0/W
KU
P[2
2]/C
AN
2R
X/C
AN
3R
X33
PF
[10]/G
PIO
[90]/C
S1_0/L
IN4T
X/E
1U
C[2
]38
PF
[11]/G
PIO
[91]/C
S2_0/E
1U
C[3
]/W
KU
P[1
5]/LIN
4R
X39
PF
[12]/G
PIO
[92]/E
1U
C[2
5]/LIN
5T
X35
PF
[13]/G
PIO
[93]/E
1U
C[2
6]/W
KU
P[1
6]/LIN
5R
X41
PF
[14]/G
PIO
[94]/C
AN
4T
X/E
1U
C[2
7]/C
AN
1T
X102
PF
[15]/G
PIO
[95]/E
1U
C[4
]/E
IRQ
[13]/C
AN
1R
X/C
AN
4R
X101
PG
[0]/G
PIO
[96]/C
AN
5T
X/E
1U
C[2
3]
98
PG
[1]/G
PIO
[97]/E
1U
C[2
4]/E
IRQ
[14]/C
AN
5R
X97
PG
[2]/G
PIO
[98]/E
1U
C[1
1]/S
OU
T_3
8
PG
[3]/G
PIO
[99]/E
1U
C[1
2]/C
S0_3/W
KU
P[1
7]
7
PG
[4]/G
PIO
[100]/E
1U
C[1
3]/S
CK
_3
6
PG
[5]/G
PIO
[101]/E
1U
C[1
4]/W
KU
P[1
8]/S
IN_3
5
PG
[6]/G
PIO
[102]/E
1U
C[1
5]/LIN
6T
X30
PG
[7]/G
PIO
[103]/E
1U
C[1
6]/E
1U
C[3
0]/W
KU
P[2
0]/LIN
6R
X29
PG
[8]/G
PIO
[104]/E
1U
C[1
7]/LIN
7T
X/C
S0_2/E
IRQ
[15]
26
PG
[9]/G
PIO
[105]/E
1U
C[1
8]/S
CK
_2/W
KU
P[2
1]/LIN
7R
X25
PG
[10]/G
PIO
[106]/E
0U
C[2
4]/E
1U
C[3
1]/S
IN_4
114
PG
[11]/G
PIO
[107]/E
0U
C[2
5]/C
S0_4
115
PG
[12]/G
PIO
[108]/E
0U
C[2
6]/S
OU
T_4
92
PG
[13]/G
PIO
[109]/E
0U
C[2
7]/S
CK
_4
91
PG
[14]/G
PIO
[110]/E
1U
C[0
]/LIN
8T
X110
PG
[15]/G
PIO
[111]/E
1U
C[1
]/LIN
8R
X111
PH
[0]/G
PIO
[112]/E
1U
C[2
]/S
IN_1
93
PH
[1]/G
PIO
[113]/E
1U
C[3
]/S
OU
T_1
94
PH
[2]/G
PIO
[114]/E
1U
C[4
]/S
CK
_1
95
PH
[3]/G
PIO
[115]/E
1U
C[5
]/C
S0_1
96
PH
[4]/G
PIO
[116]/E
1U
C[6
]134
PH
[5]/G
PIO
[117]/E
1U
C[7
]135
PH
[6]/G
PIO
[118]/E
1U
C[8
]/M
A[2
]136
PH
[7]/G
PIO
[119]/E
1U
C[9
]/C
S3_2/M
A[1
]137
PH
[8]/G
PIO
[120]/E
1U
C[1
0]/C
S2_2/M
A[0
]138
PH
[9]/G
PIO
[121]/T
CK
127
PH
[10]/G
PIO
[122]/T
MS
120
VDD_BV24
VDD_HV_ADC074
VDD_HV_ADC182
VDD_HV119
VDD_HV251
VDD_HV3100
VDD_HV4123
VDD_LV123
VDD_LV246
VDD_LV3124
+C
215
10U
F
C204
22P
F
C202
0.1
UF
C212
0.1
UF
C208
0.1
UF
C207
0.1
UF
R201
0
R203
100
C206
0.1
UF
Y200
8M
Hz
12
MPC560xB Controller Board Schematic
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 31
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
Isola
tion B
arr
ier
VD
D_U
SB
GN
D
GN
D
VD
D_U
SB
GN
D_U
SB
MC
U_5V
GN
D_U
SB
GN
D_U
SB
GN
D_U
SB
VD
D_U
SB
GN
D_U
SB
GN
D
MC
U_5V
GN
D
+5V
dc
GN
DA
GN
DA
GN
D
+5V
dc
+5V
dc
MC
U_5V
GN
DA
GN
D
+5V
dc
LIN
FL6_T
X
LIN
FL6_R
X
LIN
FL7_T
X
SP
I3_S
OU
TS
PI3
_C
S0
SP
I3_S
CK
SP
I3_S
IN
LIN
FL7_R
X
+5V
A+
5V
A
PH
6_M
A2
+5V
dc
MC
U_5V
AN
9_P
AN
3_P
AN
5_P
AN
7_P
AN
0_S
AN
11_P
AN
10_P
AN
4_P
AN
6_P
AN
8_P
AN
A1
AN
A0
AN
A3
AN
A5
AN
A7
AN
A9
AN
A2
AN
A4
AN
A6
AN
A8
PW
MA
0
PW
MA
1
PW
MA
2
PW
MB
0
PW
MB
1
PW
MB
2
FA
ULT
0F
AU
LT
1
PH
4
PH
5
PH
7_M
A1
PH
8_M
A0
AN
X3
AN
1_S
AN
2_S
AN
A10
+5V
A
33937_E
N33937_/R
ST
33937_IN
T33937_O
C
33937_C
S
33937_S
CK
33937_S
OU
T
33937_S
IN
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
escale
Sem
ico
nd
ucto
r R
CS
C
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C5
60
XB
Co
ntr
oll
er B
oa
rd
A3
Monday, A
ugust 29, 2011
HE
AD
ER
S
Bre
tisla
v Z
uczek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
escale
Sem
ico
nd
ucto
r R
CS
C
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C5
60
XB
Co
ntr
oll
er B
oa
rd
A3
Monday, A
ugust 29, 2011
HE
AD
ER
S
Bre
tisla
v Z
uczek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
escale
Sem
ico
nd
ucto
r R
CS
C
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C5
60
XB
Co
ntr
oll
er B
oa
rd
A3
Monday, A
ugust 29, 2011
HE
AD
ER
S
Bre
tisla
v Z
uczek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
D300
YE
LLO
W
A C
R300
1.0
K
C307
0.1
UF
C305
0.1
UF
C303
0.0
1U
F
J301
12
34 6
5
J306 1
2
34
56
78
910
11
12
13
14
12
3 4
+D-D G V
J300
US
B_T
YP
E_B
12 3 4
S1
S2
R304
27
C302
4.7
uF
J305 1
2
34
56
78
910
11
12
13
14
C301
0.1
UF
C306
0.1
UF
R303
27
L300120 O
HM
R301
1.0
K
J302
12
34 6
5 78
J303
12
34 6
5 78
J307
12
34 6
5 78
C304
0.1
UF
C309
0.1
UF
U300
AD
UM
1201
VDD11
VDD28
VIA
7
VIB
3
VO
A2
VO
B6
GND14
GND25
D301
YE
LLO
W
A C
U301
FT
232R
L
VC
CIO
4
VC
C20
US
BD
M16
US
BD
P15
NC
_8
8
RE
SE
T19
NC
_24
24
OS
CI
27
OS
CO
28
3V
3O
UT
17
AGND25
GND17
GND218
GND321
TEST26
TX
D1
RX
D5
RT
S3
CT
S11
DT
R2
DS
R9
DC
D10
RI
6
CB
US
023
CB
US
122
CB
US
213
CB
US
314
CB
US
412
J304
12
34 6
5 78
C308
0.1
UF
C300
0.1
UF
MPC560xB Controller Board User’s Guide, Rev. 0
MPC560xB Controller Board Schematic
Freescale32
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
Pla
ce
filte
rs a
s c
lose
to
th
e D
SP
ch
ip a
s p
ossib
le
Stan
dard
_cha
nnel
s_10
Bit_
ADC
Prec
isio
n_ch
anne
ls_1
2bit
/10B
it_A
DC
Stan
dard
_cha
nnel
s_12
bit/
10Bi
t_AD
C
Exte
rnal
ly_m
ulti
plex
ed_s
tand
ard_
chan
nel_
10Bi
t_AD
CPr
ecis
ion_
chan
nels
_12b
it/1
0Bit
_ADC
AD
C_P
4
AD
C_P
5
AD
C_P
6
AD
C_P
7
AD
C_P
8
AD
C_P
9
AD
C_P
10
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
GN
DA
AD
C0_S
10
AD
C0_S
14
AD
C0_S
12
AD
C0_S
13
AD
C0_S
11
AD
C0_X
3
AD
C0_S
15
AD
C0_S
8
AD
C0_S
9
AD
C0_S
6
AD
C0_S
7
AD
C01_S
0/4
AD
C01_S
1/5
AD
C01_S
2/6
AD
C0_S
5
AD
C01_P
1
AD
C01_P
0
AD
C01_P
3
AD
C01_P
2
AN
5_P
AN
6_P
AN
7_P
AN
8_P
AN
0_S
AN
1_S
AN
2_S
AD
C01_P
12
AD
C01_P
14
AD
C01_P
11
AD
C01_P
13
AN
3_P
AN
9_P
AN
4_P
AN
10_P
AD
C01_P
15
AN
11_P
AN
A0
AN
A1
AN
A2
AN
A3
AN
A4
AN
A5
AN
A6
AN
A7
AN
A8
AN
A9
AN
A10
AN
X3
AD
C01_P
5
AD
C01_P
7
AD
C01_P
6
AD
C01_P
4
AD
C01_P
8
AD
C01_P
9
AD
C01_P
10
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
escale
Sem
ico
nd
ucto
r R
CS
C
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C560X
B C
on
tro
ller
Bo
ard
A3
Monday, A
ugust 29, 2011
AD
C_F
ILT
ER
S
Bre
tisla
v Z
uczek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
escale
Sem
ico
nd
ucto
r R
CS
C
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C560X
B C
on
tro
ller
Bo
ard
A3
Monday, A
ugust 29, 2011
AD
C_F
ILT
ER
S
Bre
tisla
v Z
uczek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
escale
Sem
ico
nd
ucto
r R
CS
C
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C560X
B C
on
tro
ller
Bo
ard
A3
Monday, A
ugust 29, 2011
AD
C_F
ILT
ER
S
Bre
tisla
v Z
uczek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
C412
2200P
F
C403
2200P
F
R437
120.0
R402
120.0
R408
120.0
R441
120.0
R439
120.0
C413
2200P
F
C442
82pF
C440
82pF
R427
120.0
R434
120.0
C405
2200P
F
R401
120.0
C429
82pF
R426
120.0
C434
82pF
R400
120.0
C428
82pF
R407
120.0
R413
120.0
R429
120.0
C406
2200P
F
C427
82pF
R406
120.0
R431
120.0
C408
2200P
F
C433
82pF
R428
120.0
C401
2200P
F
C443
82pF
C441
82pF
R430
120.0
R411
120.0
C407
2200P
F
C432
82pF
C410
2200P
F
C435
82pF
R433
120.0
R414
120.0
R436
120.0
R435
120.0
R410
120.0
R404
120.0
C439
82pF
C431
82pF
R405
120.0
C411
2200P
F
R440
120.0
C409
2200P
F
C438
82pF
R432
120.0
C414
2200P
F
R403
120.0
C402
2200P
F
R438
120.0
C437
82pF
C436
82pF
C404
2200P
F
R409
120.0
R412
120.0
C400
2200P
F
MPC560xB Controller Board Schematic
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 33
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
74HC
+5
Vd
c
+5
Vd
c
+5
Vd
c+
5V
dc
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
MC
U_
5V
MC
U_
5V
MC
U_
5V
MC
U_
5V
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
MC
U_
5V
GN
D
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
+5
Vd
c
MC
U_
5V
GN
D
GN
DM
CU
_5
V
+5
Vd
c
MC
U_
5V
F[8
]
F[9
]
PW
MA
0P
WM
B0
PW
MA
1P
WM
B1
PW
MA
2P
WM
B2
FA
UL
T0
FA
UL
T1
SW
BT
N#
1
SW
BT
N#
2
B[0
]
C[1
0]
C[1
1]
H[0
]_G
_E
RR
ZC
_C
RE
SE
T
SW
#1
ZC
_A
ZC
_B
B[1
]
SW
#2
Dra
win
g T
itle
:
Siz
eD
ocu
me
nt
Nu
mb
er
Re
v
Da
te:
Sh
ee
to
f
Pa
ge
Title
:
De
sig
ne
r:
Dra
wn
by:
Ap
pro
ve
d:
Freescale
Sem
ico
nd
ucto
r R
CS
C
1.
ma
je 1
00
9
76
5 6
1 R
ozn
ov p
. R
. C
ze
ch
re
pu
blic,
Eu
rop
e
Th
is d
ocu
me
nt
co
nta
ins in
form
atio
n p
rop
rie
tary
to
Fre
esca
le S
em
ico
nd
ucto
r a
nd
sh
all n
ot
be
use
d f
or
en
gin
ee
rin
g d
esig
n,
pro
cu
rem
en
t o
r m
an
ufa
ctu
re in
wh
ole
or
in p
art
with
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t th
e e
xp
ress w
ritt
en
pe
rmis
sio
n
of
Fre
esca
le S
em
ico
nd
ucto
r.
ICA
P C
lassific
atio
n:
FC
P:
FIU
O:
PU
BI:
SC
H-2
71
57
PD
F:
SP
F-2
71
57
B
MP
C560X
B C
on
tro
ller B
oard
A3
Mo
nd
ay,
Au
gu
st
29
, 2
01
1
LE
Ds &
BU
TT
ON
s
<D
esig
ne
r>
<A
pp
rove
r>
<D
raw
nB
y>
11
1
__
__
X_
__
_
Dra
win
g T
itle
:
Siz
eD
ocu
me
nt
Nu
mb
er
Re
v
Da
te:
Sh
ee
to
f
Pa
ge
Title
:
De
sig
ne
r:
Dra
wn
by:
Ap
pro
ve
d:
Freescale
Sem
ico
nd
ucto
r R
CS
C
1.
ma
je 1
00
9
76
5 6
1 R
ozn
ov p
. R
. C
ze
ch
re
pu
blic,
Eu
rop
e
Th
is d
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me
nt
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nta
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n p
rop
rie
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Fre
esca
le S
em
ico
nd
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nd
sh
all n
ot
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d f
or
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gin
ee
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g d
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n,
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rem
en
t o
r m
an
ufa
ctu
re in
wh
ole
or
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art
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t th
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ress w
ritt
en
pe
rmis
sio
n
of
Fre
esca
le S
em
ico
nd
ucto
r.
ICA
P C
lassific
atio
n:
FC
P:
FIU
O:
PU
BI:
SC
H-2
71
57
PD
F:
SP
F-2
71
57
B
MP
C560X
B C
on
tro
ller B
oard
A3
Mo
nd
ay,
Au
gu
st
29
, 2
01
1
LE
Ds &
BU
TT
ON
s
<D
esig
ne
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pp
rove
r>
<D
raw
nB
y>
11
1
__
__
X_
__
_
Dra
win
g T
itle
:
Siz
eD
ocu
me
nt
Nu
mb
er
Re
v
Da
te:
Sh
ee
to
f
Pa
ge
Title
:
De
sig
ne
r:
Dra
wn
by:
Ap
pro
ve
d:
Freescale
Sem
ico
nd
ucto
r R
CS
C
1.
ma
je 1
00
9
76
5 6
1 R
ozn
ov p
. R
. C
ze
ch
re
pu
blic,
Eu
rop
e
Th
is d
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me
nt
co
nta
ins in
form
atio
n p
rop
rie
tary
to
Fre
esca
le S
em
ico
nd
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r a
nd
sh
all n
ot
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or
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gin
ee
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g d
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n,
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rem
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ctu
re in
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art
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t th
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ritt
en
pe
rmis
sio
n
of
Fre
esca
le S
em
ico
nd
ucto
r.
ICA
P C
lassific
atio
n:
FC
P:
FIU
O:
PU
BI:
SC
H-2
71
57
PD
F:
SP
F-2
71
57
B
MP
C560X
B C
on
tro
ller B
oard
A3
Mo
nd
ay,
Au
gu
st
29
, 2
01
1
LE
Ds &
BU
TT
ON
s
<D
esig
ne
r>
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pp
rove
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raw
nB
y>
11
1
__
__
X_
__
_
D5
12
HS
MG
-C1
70
AC
R5
07
1.0
K
R5
28
1.0
K
R5
09
1.0
K
C5
01
0.1
UF
U5
01
F
MC
74
HC
04
AD
G
13
12
R5
00
4.7
K
U5
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C
MC
74
HC
04
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G
56
D5
11
HS
MG
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70
AC
U5
02
C
MC
74
HC
04
AD
G
56
D5
16
HS
MG
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70
AC
R5
13
1.0
K
U5
00
B
MC
74
HC
04
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G
34
R5
15
1.0
K
D5
09
HS
MG
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70
AC
R5
26
1.8
K
VC
C
GN
D
U5
01
A
MC
74
HC
04
AD
G
12
14 7
R5
20
1.0
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02
HS
MY
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70A
C
D5
06
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MG
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70
AC
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01
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MC
74
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04
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G
34
C5
00
0.1
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17
1.0
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00
HS
MY
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70A
C
D5
05
HS
MG
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70
AC
U5
02
E
MC
74
HC
04
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G
11
10
D5
04
HS
MS
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70A
CR
51
2
1.0
K
R5
05
4.7
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R5
27
4.7
K
R5
01
4.7
K
R5
14
1.0
K
R5
25
1.0
K
C5
02
0.1
UF
SW
50
4
SP
DT
on
-on
20
V
1 3
2
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16
1.0
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SW
50
2
B3
S-1
00
2
1 2
3 4
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50
1
B3
S-1
00
2
1 2
3 4
U5
02
F
MC
74
HC
04
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G
13
12
D5
01
HS
MY
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70A
C
D5
19
HS
MG
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70
AC
R5
22
1.0
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R5
11
1.0
K
U5
00
F
MC
74
HC
04
AD
G
13
12
VC
C
GN
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A
MC
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12
14 7
U5
01
D
MC
74
HC
04
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G
98
D5
08
HS
MG
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70
AC
D5
18
HS
MG
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70
AC
SW
50
0
B3
S-1
00
2
1 2
3 4
VC
C
GN
D
U5
02
A
MC
74
HC
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G
12
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U5
01
C
MC
74
HC
04
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G
56
U5
00
D
MC
74
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G
98
D5
17
HS
MG
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70
AC
U5
02
B
MC
74
HC
04
AD
G
34
D5
03
HS
MS
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70A
C
U5
01
E
MC
74
HC
04
AD
G
11
10
R5
03
4.7
K
R5
08
1.0
K
R5
04
1.8
K
D5
07
HS
MG
-C1
70
AC
D5
15
HS
MG
-C1
70
AC
D5
14
HS
MG
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70
AC
R5
24
1.0
K
U5
02
D
MC
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04
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1.0
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SW
50
3
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20
V
1 3
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13
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R5
18
1.0
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R5
21
1.0
K
D5
10
HS
MG
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70
AC
R5
02
1.8
K
U5
00
E
MC
74
HC
04
AD
G
11
10
R5
10
1.0
K
R5
23
1.0
K
MPC560xB Controller Board User’s Guide, Rev. 0
MPC560xB Controller Board Schematic
Freescale34
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
+5
Vd
c
GN
D_
D
+5
VD
C
HA
LL
0/Z
CA
HA
LL
1/Z
CB
HA
LL
2/Z
CC
UN
I3_
BE
MF
ZC
A
UN
I3_
BE
MF
ZC
B
UN
I3_
BE
MF
ZC
C
+5
Vd
c
GN
D
GN
D
GN
D
GN
D
+5
Vd
c
+5
Vd
c
+5
Vd
c
GN
DG
ND+5
Vd
c
Dra
win
g T
itle
:
Siz
eD
ocu
me
nt N
um
be
rR
ev
Da
te:
Sh
ee
to
f
Pa
ge
Title
:
De
sig
ne
r:
Dra
wn
by:
Ap
pro
ve
d:
Fre
es
ca
le S
em
ico
nd
uc
tor
RC
SC
1. m
aje
10
09
76
5 6
1 R
ozn
ov p
. R
. C
ze
ch
re
pu
blic, E
uro
pe
Th
is d
ocu
me
nt co
nta
ins in
form
atio
n p
rop
rie
tary
to
Fre
esca
le S
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ico
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r a
nd
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se
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r
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gin
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n, p
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rem
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re in
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ole
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1. m
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MPC560xB Controller Board Schematic
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 35
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
Vref decoupling
3.246V
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MPC560xB Controller Board User’s Guide, Rev. 0
MPC560xB Controller Board Schematic
Freescale36
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
Contr
ol connecto
r fo
r M
C33937 F
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driver.
LM393
UN
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Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
escale
Sem
ico
nd
ucto
r R
CS
C
1. m
aje
1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
reescale
Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
ctu
re in w
hole
or
in p
art
without th
e e
xpre
ss w
ritten p
erm
issio
n
of F
reescale
Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
: S
PF
-27157
B
MP
C5
60
XB
Co
ntr
oll
er
Bo
ard
A3
Monday, A
ugust 29, 2011
UN
I3 In
terf
ace
Bre
tisla
v Z
uczek
<A
ppro
ver>
Bre
tisla
v Z
uczek
111
____
X____
Dra
win
g T
itle
:
Siz
eD
ocum
ent N
um
ber
Rev
Date
:S
heet
of
Page T
itle
:
Desig
ner:
Dra
wn b
y:
Appro
ved:
Fre
escale
Sem
ico
nd
ucto
r R
CS
C
1. m
aje
1009
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1. m
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1009
765 6
1 R
oznov p
. R
. C
zech r
epublic, E
uro
pe
This
docum
ent conta
ins info
rmation p
roprieta
ry to F
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Sem
iconducto
r and s
hall n
ot be u
sed for
engin
eering d
esig
n, pro
cure
ment or
manufa
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re in w
hole
or
in p
art
without th
e e
xpre
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erm
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n
of F
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Sem
iconducto
r.
ICA
P C
lassific
ation:
FC
P:
FIU
O:
PU
BI:
SC
H-2
7157 P
DF
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PF
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MP
C5
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Monday, A
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MPC560xB Controller Board Schematic
MPC560xB Controller Board User’s Guide, Rev. 0
Freescale 37
5 5
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1. m
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1009
765
61 R
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R. C
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rep
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s do
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1009
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61 R
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R. C
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s do
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MPC560xB Controller Board User’s Guide, Rev. 0
MPC560xB Controller Board Schematic
Freescale38
Document Number: MPC560XBMCBUGRev. 008/2012
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