multi-way pipelining for power-efficient ip lookup
DESCRIPTION
MULTI-WAY PIPELINING FOR POWER-EFfiCIENT IP LOOKUP. Author: Weirong Jiang and Viktor K. Prasanna Publisher/Conf .: IEEE GLOBECOM 2008 Speaker: Han-Jhen Guo Date: 2008.12.17. OUTLINE. Background and Related Work Proposed Scheme introduction of proposed scheme - PowerPoint PPT PresentationTRANSCRIPT
MULTI-WAY PIPELINING FOR POWER-EFfiCIENT IP LOOKUP
Author: Weirong Jiang and Viktor K. Prasanna
Publisher/Conf.: IEEE GLOBECOM 2008
Speaker: Han-Jhen Guo
Date: 2008.12.17
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OUTLINE
Background and Related Work Proposed Scheme
introduction of proposed scheme hybrid SRAM/TCAM-based partitioning fine-grained node-to-stage mapping
Performance
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BACKGROUND AND RELATED WORK
Uni-bit trie
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Leaf pushing
Proposed Scheme- Introduction Of Proposed Scheme
Multi-way linear pipeline architecture (P=4)
each pipeline stores a portion of the routing table hybrid SRAM/TCAM-based partitioning scheme
ensure that pipelines contain exactly equal numbers of trie nodes
fine-grained node-to-stage mapping scheme within each pipeline balance the memory distribution over pipeline stages 4
Proposed Scheme- Hybrid SRAM/TCAM-based Partitioning
1. Prefix expansion
initial stride larger, smaller subtries → can help balance the memory
distribution across stages when mapping nodes to stages within a pipeline
more prefix duplication (a prefix may be copied to multiple subtries)
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initial stride (I)
Proposed Scheme- Hybrid SRAM/TCAM-based Partitioning
2. Post-order split ensures that each pipeline contains ceiling of
(total nodes of subtries / number of pipelines) nodes (except the last one pipeline) sort the subtries obtained after prefix expansion in
decreasing order of size
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ceiling of (3+11+1+3) / 2
Proposed Scheme- hybrid SRAM/TCAM-based partitioning
3. Index table implementation
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based on I
remaining subtries
priority(SRAM_B) > priority(SRAM_A)
Proposed Scheme- fine-grained node-to-stage mapping
1) Leaf reduction
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subtries in pipeline 1
after leaf reduction
Proposed Scheme- fine-grained node-to-stage mapping
Eg. of node-to-stage mapping with pipeline 1
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Proposed Scheme- hybrid SRAM/TCAM-based partitioning
Index table implementation
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address of the subtrie’s root in the 1st stage of pipeline
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PERFORMANCE
Node distribution over 8 pipelines results for 16 routing tables
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partitioning scheme achieved a balanced memory allocation among the eight pipelines
PERFORMANCE
Node distribution over 25 stages in the 8-way pipeline architecture
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there were few nodes at the top levels of any subtrie→ unbalanced at first several stages each pipeline
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