multiple-choice questions (mcq ... -...

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 16

Special Exercise for Operating Systems and Computer Networks Page: 1

Lastname, Firstname Matriculation No. Type

MULTIPLE-CHOICE QUESTIONS (MCQ) EXAMINATION

DURATION: 90 MINUTES

Annotation to the assignments and the solution sheet

This is a multiple-choice questions examination, that means:

o Only marked “boxes” in the solution sheet will be evaluated.

o Solution approaches will not be assessed.

o Each sub-part of an assignment can have one or more correct answers. However, if

“None of them” box is marked; all the other marked answers of this subpart will be

disregarded.

o A negative score is not attainable in any sub-task of an assignment.

Note the following points

In addition to the assignment sheet you should obtain a corresponding solution sheet.

Mark the answers only on the solution sheet!! MARKED ANSWERS ON THE ASSIGNMENT SHEET WILL NOT BE CONSIDERED.

You obtain only one exemplar of the assignment sheet.

In case of erroneous entries, ask the supervisors for a new solution sheet.

Only use the writing sheets enclosed in the envelope. Do not use any other paper. If you need more paper, ask the supervisors.

You may use a non-programmable calculator.

Return everything, i.e. assignment sheet, solution sheet and the writing sheets – used and unused. Only exams that are returned completely will be assessed.

FILL YOUR NAME and MATRICULATION NUMBER ON THE ASSIGNMENT SHEET AND THE SOLUTION SHEET!



Demo-Exam SS 16



Assignment 1

Given is a magnetic Hard disk with 6 heads, 3 platters, 80000 cylinders, 100 sectors/track on the innermost 40000 cylinders, 200 on the outermost 40000 cylinders and a sector size of 0.5 KiB.

1.1 Which of the following equals the total hard disk capacity of the before mentioned disk.

A: 33.53 GiB B: 34.33 GiB C: 36.00 GiB

D: 36.86 GiB E: 38.66 GiB F: None of them.

If you couldn’t calculate the disk capacity in 1.1, use SC = 30 GiB for the following question.

1.2 What is the minimal cluster size that is chosen, if you want to format the hard disk from assignment 1.1 with the standard formatting using FAT32?

G: 1 KiB H: 2 KiB I: 4 KiB

J: 8 KiB K: 16 KiB L: None of them.

Consider a UNIX File System with a typical UNIX partition:

Fig. 1-1 Typical Unix partition

This I-Node is capable of 12 direct addressable blocks, single, double and triple indirect addressing. Given a block size of 0.5 MiB and a file length of 512 Bits.

1.3 What file size is addressable directly from the information in the I-node?

M: 768 Byte N: 6 KiB O: 6 MiB

P: 384 MiB Q: 3 TiB R: None of them.

1.4 What file size is addressable by using double indirect blocks with the given i-node?

S: 4 GiB T: 16 GiB U: 512 GiB

V: 16 TiB W: 32 TiB X: None of them.



Demo-Exam SS 16



Assignment 2

The speedup ratio of a cache memory is given by the formula:

mc

m

thth

tS

)1(

Formula. 2-1 Speedup Ratio in Cache Memory

2.1 What is the Speedup-ratio if the access to the memory takes 30 ns, the access to the cache takes 2 ns and the hit ratio is 80%?

A: S = 0.082 B: S = 0.263 C: S = 1.230

D: S = 3.947 E: S = 5.177 F: None of them.

In practice a computer does not utilize all its time to access memory. Instead it also spends some time to perform internal operations which are non-memory reference.

2.2 Determine the average computer cycle time if:

A cache access takes 20 ns.

The hit ratio of a cache hit is 80%.

A cache miss takes additional 100 ns.

The processor spends 50 % of the time to access memory.

An internal operation takes 40 ns.

G: tavg = 30 ns H: tavg = 38 ns I: tavg = 40 ns

J: tavg = 62 ns K: tavg = 70 ns L: None of them.



Demo-Exam SS 16



The CPU generates an address which has the following structure:

Fig. 2-2 Address structure

A cache is usually divided into lines. Assume that a computer has a memory of 2 GiB, a cache of 256 KiB and a cache line can contain 64 Bytes. Consider the following three types of cache mapping for this assignment:

Direct mapped cache

4-way set associative cache

Fully associative cache

2.3 Which of the following statements are true?

M: The number of offset bits is constant.

N: Direct mapped cache has the least amount of offset bits compared to the other two methods.

O: 4-way set associative cache has the least amount of offset bits compared to the other two methods.

P: Fully associative cache has the least amount of offset bits compared to the other two methods.

Q: 4-way set associative cache uses 10 index Bits.

R: 4-way set associative cache uses 11 index Bits.

S: 4-way set associative cache uses 12 index Bits.

T: Fully associative cache uses 0 Tag bits.

U: Fully associative cache uses 15 Tag bits.

V: Fully associative cache uses 25 Tag bits.

W: None of them.



Demo-Exam SS 16



Assignment 3

Figure 3-1 indicates a part of a CPU-cache available for allocation. The memory is divided into segments of fixed size.

M0 M1 M2 M3 M4 M5 M6 M7

8 KiB 12 KiB 4 KiB 14 KiB 11 KiB 9 KiB 23 KiB 15 KiB

Fig. 3-1 Cache memory

Three processes A, B and C want to successively allocate memory in that order, with the respective sizes of:

A = 13 KiB

B = 6 KiB

C = 10 KiB

Note: The memory block (Figure 3-1) and the processes A, B and C are used for assignment 3.1 and 3.2!


A: Next Fit algorithm allocates M3, M0, M1 for the successive requests.

B: Next Fit algorithm allocates M3, M5, M7 for the successive requests.

C: Next Fit algorithm allocates M3, M4, M6 for the successive requests.

D: Worst Fit algorithm allocates M3, M0, M1 for the successive requests.

E: Worst Fit algorithm allocates M6, M7, M3 for the successive requests.

F: Worst Fit algorithm allocates M3, M0, M4 for the successive requests.

G: None of them.

In order to compare the speed of the best fit and next fit algorithm we assume that the CPU can only check one memory segment at a given time. Every check returns the information of the size of the segment and if it is occupied. The CPU will memorize where it stored data, he skips occupied blocks with no time delay. Consider the following times for this assignment:

Time needed to check a memory block: 10 ns

Time needed to compare segment size with required size: 0 ns

Time needed to store a set of data: 5 ns

Time needed to jump to the next segment in the cache: 0 ns



Demo-Exam SS 16




H: Best fit algorithm takes 225 ns to allocate all 3 memory blocks.

I: Best fit algorithm takes 240 ns to allocate all 3 memory blocks.

J: Best fit algorithm takes 255 ns to allocate all 3 memory blocks.

K: First fit algorithm takes 65 ns to allocate all 3 memory blocks.

L: First fit algorithm takes 75 ns to allocate all 3 memory blocks.

M: First fit algorithm takes 85 ns to allocate all 3 memory blocks.

N: None of them.

Given is a Cache memory with an initial total size of 2 MiB. The cache is organized with the buddy system and receives the following 3 successive memory requests:

Program A: 510 KiB

Program B: 191 KiB

Program C: 760 KiB


O: The external fragmentation, after allocating the data from program C, results in 0 KiB

P: The external fragmentation, after allocating the data from program C, results in 256 KiB

Q: The external fragmentation, after allocating the data from program C, results in 512 KiB

R: After all 3 allocations are done, deleting the data from program A will trigger a memory merge.

S: After all 3 allocations are done, deleting the data from program B will trigger a memory merge.

T: After all 3 allocations are done, deleting the data from program C will trigger a memory merge.

U: None of them.



Demo-Exam SS 16



Assignment 4

Consider the following set of processes, with the length of the CPU-burst time given in milliseconds:

Processes Burst Time (ms) Priority Priority Description

P1 6 3 Low P2 3 1 High

P3 2 1 High P4 4 2 Medium P5 7 4

Very Low

Table 4-1 Process Burst times and Priorities

Please Note: Assume that P1 is at the head of the ready queue and P5 is at the tail, and ignore the time for context change.

4.1 Using Round-Robin scheduling algorithm with quantum time of 1 ms, calculate the average waiting time of the processes described in Table 4-1.

A: twait = 8.2ms B: twait = 9.6ms C: twait = 10.6 ms

D: twait = 11.2ms E: twait = 14.4ms F: twait = 15.6 ms

G: None of them

4.2 Using non-preemptive priority scheduling algorithm, calculate the average turn around time of the processes described in Table 4-1. In case of equal priorities, implement Round Robin scheduling algorithm with quantum time of 1 ms.

H: tta = 6.4 ms I: tta = 6.6 ms J: tta = 10.6 ms

K: tta = 10.8 ms L: tta = 11.0 ms M: tta = 12.2 ms

N: None of them



Demo-Exam SS 16



The CPU Efficiency is determined with the following equation:

Equation 4-2 CPU-Efficiency

An interactive request needs a runtime of 400 ns, a process switch takes 40 ns and a quantum is defined to be 200 ns. 4 Processes are running on a workstation using the round robin scheduling algorithm.

4.3 Which, of the following statements are true:

O: The response time, in the worst case scenario, is tresponse = 960 ns.

P: The response time, in the worst case scenario, is tresponse = 1.60 ms.

Q: The response time, in the worst case scenario, is tresponse = 1.92 ms.

R: A quantum of 400 ns results in a higher CPU Efficiency than one of 200 ns

S: A quantum of 100 ns results in a higher CPU Efficiency than one of 200 ns

T: A quantum of 400 ns results in a shorter response time (worst case scenario) than one of 200 ns.

U: A quantum of 100 ns results in a shorter response time (worst case scenario) than one of 200 ns.

V: None of them.



Demo-Exam SS 16



Assignment 5

Two stations: A (sender) and B (receiver) are connected via a point-to-point link to exchange messages. There are 10 frames ready for buffering at Station A and the starting time for every algorithm is at 0 ms.

Fig. 5-1 Network transmission depiction

Consider the following statements for this assignment:

The transmission between the two stations are: tsend = tanswer = 30 ms

The process time between two processes is: tprocess = 10ms

The timeout-time for an unacknowledged frame is: ttimeout = 80ms

The window sizes for the Selective Repeat and Go-back-n algorithms are defined with n = 5.

A retransmission of a frame has a higher priority than the transmission of the next frame in the window (for Selective Repeat algorithm).

Station B knows as soon as a frame arrives if an error occurred or not, without a delay in time.

An ACK or NAK is processed instantaneously at Station A and B meaning that as soon as the information arrives it can be used.



Demo-Exam SS 16




A: The ACK for Frame 4 using Stop-and-wait algorithm arrives 210ms after starting time.

B: The ACK for Frame 4 using Stop-and-wait algorithm arrives 240ms after starting time.

C: The ACK for Frame 4 using Stop-and-wait algorithm arrives 320ms after starting time.

D: The ACK for Frame 4 using Go-back-n algorithm arrives 90ms after starting time.

E: The ACK for Frame 4 using Go-back-n algorithm arrives 110ms after starting time.

F: The ACK for Frame 4 using Go-back-n algorithm arrives 240ms after starting time.

G: The ACK for Frame 4 using Selective Repeat algorithm arrives 90ms after starting time.

H: The ACK for Frame 4 using Selective Repeat algorithm arrives 110ms after starting time.

I: The ACK for Frame 4 using Selective Repeat algorithm arrives 240ms after starting time.

J: None of them.

Now consider that every second frame (Number 2, 4, 6, and so on) that is transmitted from Station A will result in a timeout error, due to a lost frame during transmission. Note that a retransmission also counts as a transmitted frame.

5.2 How many ms after the start of the algorithm will the ACK for frame 4 arrive at Station A using the Stop-and-wait algorithm?

K: 300 ms L: 320 ms M: 360 ms

N: 400 ms O: 440 ms P: None of them.

5.3 How many ms after the start of the algorithm will the ACK for frame 4 arrive at Station A using the Selective Repeat algorithm?

Q: 90 ms R: 170 ms S: 250 ms

T: 330 ms U: 410 ms V: None of them.



Demo-Exam SS 16



Assignment 6

For network transmission, the following network frame structure depicted in Fig. 6-1 is used. The payload has a variable length of n bytes. The length (BL) of the whole network frame (block) cannot be larger than BL, max = 8 KiB.

SOH 4 Charachters STX 64 Bit ETX BCC BCC BCC EOT

Header Payload Block Check

Fig. 6-1 Network Frame Structure

6.1 Which of the following formulas describe(s) the static code efficiency CES of this network frame?

A: )11(

111CES

n B:

OptL,S

B

nCE

C:

L

SB

11nCE

D: 11)(n

nCES

E: None of them.

6.2 Now assume that the payload consists of the character “ETX”, which could be mistaken as trailer information. The following answers enlist the measures that can be implemented in order to distinguish between payload and the transmission protocol information. Which measure/s reduce/s the code efficiency at the least?

F: Adding ESC to ETX G: Adding STT and ETT to ETX

H: Doubling ETX I: None of them.

The transmission rate (bandwith) TR is 30.0 kbit/s. The average number of additional ESC sequences within the payload is 102 Byte/s. Each additional ESC sequence in the payload has a total size of 2 Bytes.

6.3 Calculate the code efficiency for the case of an error-free transmission for a fixed block length of 64 Byte payload (Rounded to the second decimal place).

J: ηCode= 80.00 % K: ηCode= 84.51 % L: ηCode= 85.33 %

M: ηCode= 90.67 % N: ηCode= 93.75 % O: None of them.



Demo-Exam SS 16



Now consider an erroneous transmission. The error bit rates are given as follows:

Single Errors: q1 = 10-4 per Byte.



Higher error rates are not considered.

6.4 Calculate the optimal block length that does not violate the rule for BL,Max , given in this assignment, if the error correction mechanism is able to recognize all errors and correct single and triple errors (Results are to be rounded to the next full Byte [ 0.5 ≥ → 1 | 0.5< → 0]).

P: BytesB OptL 101

115,

Q: BytesB OptL 5325 , R: BytesB OptL 215 ,

S: BytesB OptL 5118 , T: BytesB OptL 199 , U: BytesB OptL

5

, 1011

V: None of them.

Hint: Optimal Block length is the block length that results in a maximum payload transfer rate (given below) under the errorneous transmission.

payloadpreamble trailer

gross

net

tare

Payload transfer rate

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