muon new small wheel stgc-vmm wish-list for vmm2
DESCRIPTION
Muon New Small Wheel sTGC-VMM Wish-list for VMM2. Electronics Workshop - December 2012 Les Houches. VMM as an ASIC for sTGC. In sTGC detector the same VMM works in three modes : Mode for STRIPS. Mode for PADS. Mode for WIRES. Each Mode has its particular requirements. The Wish-List. - PowerPoint PPT PresentationTRANSCRIPT
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Muon New Small WheelsTGC-VMM
Wish-list for VMM2
Electronics Workshop - December 2012Les Houches
12/12/2012Lupu N. Vdovin A.
Technion I.I.T.
Lupu N. Vdovin A. Technion I.I.T. 2
VMM as an ASIC for sTGC
• In sTGC detector the same VMM works in three modes :
1. Mode for STRIPS.2. Mode for PADS.3. Mode for WIRES.• Each Mode has its particular requirements.
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Lupu N. Vdovin A. Technion I.I.T. 3
The Wish-List
The wish list has one single entry :
The VMM should satisfy the requirements for the three modes of operation as an IDEAL Front-End ASIC.
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Lupu N. Vdovin A. Technion I.I.T. 4
The 3 modes characteristics are:
• For Wires :a. The input signal has negative polarity b. The amount of charge is relatively high (0.05-1pc ). We do not have yet direct experience with VMM1 connected to wires.
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Lupu N. Vdovin A. Technion I.I.T. 5
Modes characteristics cont.
• For Strips :a. The input signal has positive polarityb. The amount of charge has a wide range
( 20 fC to 500 fC )c. The output should be a number representing
the charge induced in one strip .d. The precision of the measurement determines
the precision of the calculated position of the event .
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Lupu N. Vdovin A. Technion I.I.T. 6
Modes characteristics cont.
• For Pads:a. The input signal has positive polarity.b. The amount of charge is relatively high
( 50 fC to 500 fC ).c. The output should be a logic pulse used in
building the trigger and the latency should be as short as possible (~ <25 ns) .
d. The time walk should be less than 3 ns. And not dependent of the input value or shape.
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Lupu N. Vdovin A. Technion I.I.T. 7
Some facts of life
• From the brief description of the functionality presented one should be able to derive the required parameters of the IDEAL device .
• In my opinion this approach is not useful and productive at this point in time.
• We have a first prototype the VMM1 and some experience already in using it.
• The second iteration should improve and complement with what is missing in the first.
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Lupu N. Vdovin A. Technion I.I.T. 8
Complements
• Already some additions to the present architecture are agreed upon:
• For the use with strips, the fast conversion of charge to digital with the methods :
i. Fast flash ADC for each channel , non linear, with serial output.
ii. Peak to Time and external Time to Digitaliii. ……. Possible other method.
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Lupu N. Vdovin A. Technion I.I.T. 9
Complements agreed upon or proposed:
• Some new ranges for the Gain. A range with 3.5 mV/fC is required.
a. Some Logic and Internal 10 bits ADC.b. External Trigger.c. Data Readout.d. Possibility of Simultaneous Measurement
and Readout.
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Lupu N. Vdovin A. Technion I.I.T. 10
Corrections and Improvements
• Some corrections are obvious and agreed to be carried-out like:
a. The leakage of the protection diode.b. Variation of Gain with the change in Peaking
Time. c. For positive signals some unexpected results
are troublesome, as shown to some extend in the following slides.
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Lupu N. Vdovin A. Technion I.I.T. 11
The value of the saturation levelat the Monitor Analog output is low and limits the dynamic linear
range
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Signal rate 1kHz , Injected Charge from external pulse generator with 1pF capacitor.
Lupu N. Vdovin A. Technion I.I.T. 12
Channel 3 at the same conditions
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The saturation is at a small difference 40 mV higher
Lupu N. Vdovin A. Technion I.I.T. 13
The Saturation Value changes with the change in Gain. For 7.2 mV/fC is even lower that for 2.24 mV/fC
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Lupu N. Vdovin A. Technion I.I.T. 14
About Saturation
• The question here is which stage in the amplifier is saturating . The shape of the signal at the Analog Monitor Output is normal, quasi-Gaussian as expected , but constant in amplitude and duration.
If so the Discriminator sees a constant signal shape and generates a constant ToT. The same will happened with Peak to Time or Flash ADC.
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Lupu N. Vdovin A. Technion I.I.T. 15
The walk of the Leading edge of the ToT with change of the Input Signal
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0 500 1000 1500 2000 25000
10
20
30
40
50
60
70
Delay between front edges of Input and ToT pulses in ns
Thr 250Thr 350
Input Signal fC
Del
ay n
s
VMM1_1 Ch-2Gain 2.24 mV/fCPeaking Time 25 ns
Lupu N. Vdovin A. Technion I.I.T. 16
The walk of the Leading edge of the ToT with change of the Input Signal
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VMM1-1 Ch-2 Gain 7.2 mV/fC Peaking time 25 ns
Lupu N. Vdovin A. Technion I.I.T. 17
ToT latency dependency of the input charge
• Can this situation be improved ?• This causes a jitter of the output which affects
the trigger timing.
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Lupu N. Vdovin A. Technion I.I.T. 18
When signals are in the linear range the results are good
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VMM1-1 Ch-2
Lupu N. Vdovin A. Technion I.I.T. 19
Response of VMM1 to 2 signals with variable delay between them
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A minimum delay of 150 ns is possible without pileup.
In this case after saturationThe true value of the secondpulse is available only after 2us.
Lupu N. Vdovin A. Technion I.I.T. 20
ToT Dead Time introduced by the saturation of the first pulse . Dead time of 1000 ns and 3000
ns for x2 and x3 signals respectively.
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VMM1-1 Ch-2 Gain 2.24 mV/fC Threshold 250, blue 150 fC, red X2 , green X3
Lupu N. Vdovin A. Technion I.I.T. 21
Saturation of the first pulse creates a dead time bigger than 1000 ns so the second pulse has not a ToT response
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VMM1-1 Ch-3Gain 2.24 mV/fCThr 250Rate 1 kHzFirst pulse 450 fCSecond pulse 150fCFirst pulse response is puttingThe channel in deep saturation
Lupu N. Vdovin A. Technion I.I.T. 22
The list for studies and improvements
• One point that it looks to ask for improving is RECOVERY from SATURATION .
• Is this behavior a result of the provisional fix for the leakage of the protection diode or a feature of the architecture of the analog circuitry ?
• The same for the level of saturation .
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Lorne Levinson 23
VMM digital wish-list• Serial port to read unique-id chip on each chamber• Increment the readout token as it passes each chip so that each ASD will have a
geographical address.• Ability to readout 5 BCIDs in order to do the timing calibration• Configurable delay for BC clock to account for delay in its clock distribution• Redundant scheme for token and readout in case chip dies:
bi-directional self-healing ring• Channel masks: force on, force off. Trigger separate from readout• 12 bit BCID, 8 bit L1Accept counter• Do we want special action on calibrate trigger type• First chip to send data sends header and marks header-done in token.• “where are you? (WRU)” trigger: each chip reports its BCID and geo-address
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Lupu N. Vdovin A. Technion I.I.T. 24
CONCLUSIONS
• Much experience with VMM1 has being gained in working in the lab and in the beam-tests.
• As expected much work is to be done for a useful and successful VMM2.
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Lupu N. Vdovin A. Technion I.I.T. 25
Backups
• Some more examples of behaviors of VMM1 analog circuitry in saturation or different rates of signal.
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ToT Output Delay from the Start of the Input Pulse
12/12/2012 Lupu N. Vdovin A. Technion I.I.T. 26
0 50 100 150 200 250 300 350 400 4500
10
20
30
40
50
60
70
ToT front edge Delay from the Input pulse Start as a func. of Input Charge
ToT delay from Start pulse ns 1khz
ToT delay from Start pulse ns 100khz
Input Charge in fC
Dela
y in
ns
Lupu N. Vdovin A. Technion I.I.T. 27
For one pulse, Threshold as param.
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0 250 500 750 1000 1250 1500 1750 20000
5
10
15
20
25
30
35
40
45
ToT Delay from leading edge of Start pulse dependence of Input Pulse value
ToT delay from Start pulse ns Thr=250ToT delay from Start pulse ns Thr=350
Input Charge value in fC
Dela
y of
ToT
pul
se a
ppea
ranc
e in
ns
VMM1-1 Ch 2Gain 7.2 mV/fCPeaking time 25 ns
Lupu N. Vdovin A. Technion I.I.T. 28
For one pulse
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0 100 200 300 400 5000
50
100
150
200
250
300
350
400
450
500
Analog Peak Amplitude as a function of Input Charge value
Peak (Base to Peak mV) Thr=250Peak (Base to Peak mV) Thr=350
Input Charge in fC
Anal
og P
eak
in m
V
VMM1-1 Ch 2Gain 7.2 mV/fCPeaking time 25 ns
Lupu N. Vdovin A. Technion I.I.T. 29
Two Pulses ToT Leading Edge Delay Thr. 500 for Gain 7.2 mV/fC and first Pulse in
Saturation
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Lupu N. Vdovin A. Technion I.I.T. 30
Signal in linear range VMM1-1 Ch-2
Rate dependency
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Lupu N. Vdovin A. Technion I.I.T. 31
Saturation Level for 2 Rates
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0 50 100 150 200 250 300 350 400 4500
100
200
300
400
500
600
700
800
900
1000
Peak Value as function of Input Charge for 2 Rates 1 and 100 kHz
Peak (Base to Peak mV) at 1khz
Peak (Base to Peak mV) at 100khz
Input Charge fC
Anal
og v
olta
ge a
t Mon
itor O
utpu
t mV
VMM1_1 Ch2Gain 2.24 mV/fCPeaking Time 25 nsThr. 250
Lupu N. Vdovin A. Technion I.I.T. 32
The effect of high signal and high rate
• The analog output of the monitor saturates at ~ 900 mV .
• The delay of ToT from start is about the same.
• Thresholds 250• A change in the biasDue to High Rate ?
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Lupu N. Vdovin A. Technion I.I.T. 33
Effect of saturation on the shape of single input pulse
• The shape of the analog output does not change
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Lupu N. Vdovin A. Technion I.I.T. 34
Dependence of the Analog Output of the Delay between to pulses
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The recovery from saturationas well as the amplification of the second pulse is a problem
Lupu N. Vdovin A. Technion I.I.T. 35
Effect of saturation on double pulse response of VMM1-1 Ch3
• Gain 2.24 mV/fC Rate 100kHz First pulse ~300 fCSecond ~ 150 fCThe amplitude of the second outputis smaller by ~ 100 mV than it should be.12/12/2012
Lupu N. Vdovin A. Technion I.I.T. 36
VMM1An ASIC for Micropattern Detectors
• An ideal shape for the shaper of ToT, to reducethe WALK when usedwith pads fortiming.
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