mwc-system expander implementation using filter banks midterm presentation
DESCRIPTION
MWC-System Expander Implementation using Filter Banks MidTerm Presentation. Raz Lifshitz 052856721 Assaf Bismut 300316684 Supervisors: Deborah Cohen Professor Yonina Eldar. System Structure – Part I. MWC - Analog Component. MWC - Analog Component. - PowerPoint PPT PresentationTRANSCRIPT
MWC-System
Expander Implementation using Filter Banks
MidTerm Presentation
Raz Lifshitz 052856721Assaf Bismut 300316684
Supervisors: Deborah CohenProfessor Yonina Eldar
System Structure – Part I
MWC - Analog Component
• Input: The sparse signal (original signal)• Output: M digital channels
MWC - Analog Component
System Structure – Part II
MWC - DSP
• The DSP is digital component• Input: M digital channels• Output: The final recovered signal
DSP
Project TargetPreventing burden on hardware Trading channels for sampling rate
The main issue: In order to reconstruct the original signal, M equations are necessary, where every equation is represented by a physical channel. M must fulfill: M>2N, where N is the number of bands of the original signal.Thus, the burden on hardware becomes significant.
The solution: For reducing hardware overload, we will combine some channels (Q channels) into one channel. The trade off will be in the sampling rate in the end of the MWC (multiplied by Q).For separating back the channels, we will use the Expander.
Goals
• Main Goal:– Implement the expander unit using filter banks
• Sub goals:– Learn the principles of the Sub Nyquist theory and
MWC system– Understand the theory of polyphase, including using
FFT in the output of the polyphase instead of adder.– Implement the changes in the Expander– Compare the performance between the old
implementation and the new implementation
Expander – General Description
Expander
Yi[n] M
channels
Yi,Q[n] Q*M
channels
For example, Q=3, in the Frequency domain:
Expander
Yi[n]Yi,1[n]
Yi,2[n]Yi,3[n]
Expander ImplementationOld
implementationNew
implementation
Polyphase - Theory
• Given FIR Filter order N:•
• The filter can be written by:
• Or:
The result is M decimated filters
How the FFT will serve the purpose of the Expander??
How the FFT will serve the purpose of the Expander??
The main idea is to implement q Band Pass filters, while every one is:
And H0 is the main LPF.
• H0 can be written as a sum of its polyphase parts:
Set it to the Hk (z) phrase (the wanted filter):
DFT of (P0,P1….Pq-1 )
• The final implementation of the Expander is:
Advantages of the new implementationNew implementation Old implementation
The decimation is executed before the filter:
The decimation is executed after the filter
Shorter filters
Shorter delaysThe FFT outputs are synchronized
Every multiplier has different delay -> low synchronization between the channels
Low execution time High execution time
For every channel required q polyphase filters, (which eqvivalent to one LPF in the old
imp’), and one FFT unit .
For every channel (from M) required q LPF’s, and q multipliers.
MATLAB – Code FlowchartStart.mSet the basic parameters
mwcSimolator.m GenerateAnalogSignal.m
MWC_SubNyquistSample.m
MWC_DigitalProccess.m
Calculate_Support.m
RecoverSupport.m
Each time the simulator is being use it:Generate a random signal according to the basic parameters it receive from start.mSample the generated signal – in a subnyquist rateExpend each channel into Q channelsCalculate and recover the support of the sampled signal. Recover Support also return success.
MWC_DigitalProccess.m
For each channel MFor each factor q
Multiple the signal from channel M, with a current exponent Move it through LPF (Not decimated)Decimate the output from the LPFLocate the signal in the current line of the output Matrix
For each channel MReshape The signal and the filterFilter each line of the signal matrix with the suitable Link of the filter matrix (separately) Move the filtered signal through an FFT/IFFT Meaning execute FFT\IFFT for each columnLocate the calculated Matrix (q lines) in the outputMatrix (q*M lines)
X[0]
X[1]
……
X[q-1]
……………
X[q]
X[q+1]
……
X[2q-1]
……………
Reshape example
Original implementation
New implementation
Current status
MWC_DigitalProccess.m
Original Implementation
New Implementation
Comparison
Output - Debugging Output - DebuggingOutput - mwcSimolator.m Debugging
InputmwcSimulator.m
Simulation example
q HardwareChannels SBR fmax [GHz] B [MHz] N
5 4 'SBRspecial' 2.4608 19.5 6
General Basic Parameters'
The result of the simulation
refSupport is the support of the original signalSupport is the support of the sampled signal.A success is when refSupport is contained in Support
Performance metrics
Software Simulation• Execution time• Hardware burden
Hardware Simulation• Over sampling rate• Synchronization with mixing sequences
Gantt chart until final presentation:
End time Task
Coding and debugging the implementation of the expander:
End of June Implement the ployphase conversion End of June Implement the connection to the FFT End of June Connect the module to the MWC envBeginning of August Verify the output of the module is as
expected from it .Beginning of August Compare the performance of the new module
and the old module, as described above
End of august Writing the project book