netfpga - an open network development platform

15
1 Presented by: Andrew W. Moore (University of Cambridge) [email protected] MSN2008 http://NetFPGA.org (some slides courtesy John W. Lockwood) NetFPGA - an open network development platform

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1

Presented by:

Andrew W. Moore (University of Cambridge)[email protected]

MSN2008

http://NetFPGA.org(some slides courtesy John W. Lockwood)

NetFPGA - an open network development platform

2

FPGA

Memory

1GE

1GE

1GE

1GE

What is the NetFPGA?

PCI

CPU Memory

NetFPGA Board

PC with NetFPGA

NetworkingSoftwarerunning on a standard PC

A hardware acceleratorbuilt with Field Programmable Gate Arraydriving Gigabit network links

3

Introduction

Don’t think of this as an FPGA thing, just as programmable hardware.

Who uses the NetFPGA• Educators• Students• Researchers

How they use the NetFPGA1. To run the Router Kit2. To build modular reference designs

• IPv4 router• 4-port NIC• Ethernet switch, …

3. To create new networking systems

4

FPGA

Memory

1GE

1GE

1GE

1GE

How is the NetFPGA Used?

User-space development, 4x1GE line-rate forwarding

PCI

CPU Memory

OSPF BGP

My Protocoluser

kernelRouting

Table

IPv4Router

1GE

1GE

1GE

1GE

FwdingTable

PacketBuffer

“Mirror”

Usage #1

5

Network Serversrunning email andweb services

InternetGateway

Network of NetFPGARouters

Clusters of PCs and Workstations accessing serversand running Peer-to-Peer applications

Gigabit EthernetLinks

How to use a NetFPGA in a Network?

6

FPGA

Memory

1GE

1GE

1GE

1GE

Building Modular Router Modules

PCI

CPU Memory

Usage #2

NetFPGA Driver

Java GUIFront Panel(Extensible)

PW-OSPF

In QMgmt

IPLookup

L2Parse

L3Parse

Out QMgmt

1GE

1GE

1GE

1GE

Verilog modules interconnected by FIFO interfaces

MyBlock

VerilogEDA Tools

(Xilinx, Mentor, etc.)

1. Design2. Simulate3. Synthesize4. Download

1. Design2. Simulate3. Synthesize4. Download

7

FPGA

Memory

1GE

1GE

1GE

1GE

Creating new systems

PCI

CPU Memory

Usage #3

NetFPGA Driver

1GE

1GE

1GE

1GE

My Design

(1GE MAC is soft/replaceable)

VerilogEDA Tools

(Xilinx, Mentor, etc.)

1. Design2. Simulate3. Synthesize4. Download

1. Design2. Simulate3. Synthesize4. Download

8

Try the NetFPGA at a Tutorial

http://netfpga.org/tutorials.htmlNext Tutorial : September 15-16, 2008 in Cambridge

9

NetFPGA in the Classroom

• Stanford University– EE109 “Build an Ethernet Switch”

• Undergraduate Course for all EE students

– CS344 “Building an Internet Router”• http://cs344.stanford.edu

• Rice University– Network Systems Architecture

• http://comp519.cs.rice.edu

• University of Cambridge (starting 2009/2010)

– Masters Course “Building an Internet Router”• based largely on the cs344 model

10

softwarehardware

SwitchingForwarding

Table

RoutingTable

Routing Protocols

Management& CLI

ExceptionProcessing

InteroperabilityBuild basic router Routing Protocol(PWOSPF)

Integrate with H/W

Emulatedh/w in VNS

RoutingTable

Routing Protocols

Management& CLI

ExceptionProcessing

Emulatedh/w in VNS

RoutingTable

Routing Protocols

Management& CLI

ExceptionProcessing

Emulatedh/w in VNS

RoutingTable

Routing Protocols

Management& CLI

ExceptionProcessing

Command Line Interface

1 2 3 4 5 6

• Innovate and add!• Presentations• Judges

4-port non-learningswitch

4-port learningswitch

IPv4 routerforwarding path

Integrate with S/W Interoperability

SwitchingForwarding

Table

Learning EnvironmentModular design

Testing

CS344 Milestones

Final Project

11

The NetFPGA.org Community

http://netfpga.org/

12

Conclusions

• Reconfigurable Hardware Platforms– Enable implementation of wire-speed

programmable network nodes

• NetFPGA enables research and teaching at– Network Level– System level– Circuit level

• NetFPGA available:– worldwide for research and teaching

13

NetFPGA Platform

Major Components– Interfaces

• 4 Gigabit Ethernet Ports• PCI Host Interface

– Memories• 36Mbits Static RAM• 512Mbits DDR2 Dynamic RAM

– FPGA Resources• Block RAMs• Configurable Logic Block (CLBs)• Memory Mapped Registers

14

NetFPGA Hardware

15

NetFPGA Block Diagram

NetFPGA platform

1GE

M

AC

1GE

M

AC

1GE

M

AC

1GE

M

AC

Virtex II-Pro 50 FPGA withuser-defined network logic* Hardware specified with

- Verilog source code- Pre-generated cores

* Software written for - Embedded PowerPCs - Soft core processors

(Microblaze, LEON ..)

18Mb

SR

AM

1GE

P

HY

1GE

P

HY

1GE

P

HY

1GE

P

HY

FPGA w/provided infrastructure

64MB

DD

R2

SD

RA

M

Linux OS - NetFPGA Kernel driverHostcomputer

User-defined software networking applications

Four G

igabit Ethernet Interfaces

18Mb

SR

AM

FIFOpacketbuffers

Control, PCIInterface

3 Gb

SA

TA

Board-B

oard Interconnect