new power sources manufacturers association - specialty silicon … · 2018. 9. 11. · specialty...
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© Copyright 2014-2017 CALY Technologies. All rights reserved. PROPRIETARY www.caly-technologies.com
CALY TechnologiesSpecialty Silicon Carbide (SiC) DevicesAdvanced Protection and Power Electronics
SAN ANTONIO – TEXAS , March 4-8, 2018
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Reliability and Ruggedness : How to Address these
Challenges in Wide Bangap Semiconductor Devices
1- WBG DEVICE FAILURE MECHANISM
2 - CLASSICAL SOA APPROACH
3 - ADVANCED ELECTRO-THERMAL MODELING
APPLIED TO SiC Current Limiting Devices (CLD)
4 - CONCLUSION
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WBG devices (tables typical failure mechanism versus device)
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- HOW TO INSURE A HIGH RELIABILITY OF A WBG DEVICE ?
▪ Robust Device Design and fabrication
• Layout, fabrication process adaptation (metal, oxide, cleaning ..)
• Identification of SiC devices weaknesses : max. voltage & temperature range, critical
operating modes (SC, avalanche, cycling, latch-up…)
• Process and devices optimization
▪ Standard (JEDEC, AEC, MIL) and specific characterization, device burn-in
-> RECOMMENDATIONS TO END-USER (application notes)
BUT NOT ENOUGH !!!!
Electrical Application Engineers are always
pushing devices out of their specifications
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SOA Diagram Limits• RDS(on) limit (orange line),
• Maximum current limit (magenta line),
• Maximum power and thermal instability
limit (black line)
• Breakdown voltage limit (green line).
The SOA diagram is determined for a constant case temperature of Tc=25°C and
various square-pulse width durations.
Not possible to get the device temperature in UIS for example.
Device paralleling mismatch not predictable
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SOA Square-pulse determination generally does not
account for self heating
- The Safety Operation Area is a useful tool but not fully enable
predicting possible failures
- Need to add package temperature and device dynamic
electrothermal effects.
The proposed Electrothermal Spice model has been developed in
a view to estimate the maximal Channel temperature of a SiC
Current Limiting Device (CLD) in case of fast transients and long
overloads.
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Current Limiting Devices
TYPICAL IV characteristic of a CLD (blue line) and a resistor (red line) Pulsed IV curve (tPULSE=200µs) for different TCASE.
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Typical applications- e-fuse, current source, lightning protection : DC, AC, Pulsed
Lightning protection
Short-circuit / overcurrent protection
Overvoltage / surge protection
Capacitor pre-charging
Resettable fuse
Battery protections
DC general purpose protection applications
Unidirectional current limitation in AC or DC links
Photovoltaic power plant protection
Constant-current regulation for battery charging or LED driving
TYPICAL LIGHTNING PROTECTION
APPLICATION IMPLEMENTING SiC CLD
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Current Limiting DevicesDynamic response to 1.2/50µs 1kV/500A pulse
-> Issue : power dissipation and temperature increase
-> How to estimate potential device failure ?
> Temperature estimation
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Electro-thermal modeling
LEGEND
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Electro-thermal modeling
CLD electro-thermal model circuit diagram
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SiC CLD Isothermal Modeling
- ISOTHERMAL CHARACTERISATION
▪ Short square voltage pulses for wide temperature range
Isothermal CLD IV curves for different case temperatures ON-state resistance evolution with case temperature @ IDC=100mA
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Packaging + Die Assembly Modeling
▪ Thermal impedance extraction
▪ RC network translation
Thermal impedance extraction procedure
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Experimental Validation
- 1.2/50µs 900V/450A pulse,
Comparison of SiC CLD response to a 900V 1.2/50µs waveform.
INPUT PULSE VOLTAGE CLD CURRENT AVERAGE CHANNEL TEMPERATURE
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CLD New SOA Representation
- From I=f(V,tPULSE) to V=f(TCASE,tPULSE) diagram
]
Maximal pulse voltage depending on :
- Case temperature
- Pulse duration (square pulse)
A CLD should be able to sustain Short-Circuit
Square pulses :
▪ VPULSE=200V ; tPULSE=100µs ; TCASE=125°C
▪ VPULSE=600V ; tPULSE=10µs ; TCASE=175°C
NEW SOA REPRESENTATION FOR SQUARE
PULSE (TO247 package)
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Short-circuit pulse simulation
- VPULSE = 200V ; tPULSE=100µs ; TCASE=125°C
Simulated maximal temperature lower than 450°C
CLD SHOULD BE ABLE TO SUSTAIN SUCH A STRESS
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Experimental validation : repetitive short circuit stress.
VPULSE=200V
TPULSE=100µs
TCASE=125°C
NO FAILURE AFTER 30 000 PULSES
50µs
I50us
Imax
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Short-circuit pulse simulation
- VPULSE = 600V ; tPULSE=10µs ; TCASE=175°C
Simulated maximal temperature lower than 500°C
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Experimental validation : repetitive short circuit stress.
NO FAILURE AFTER 83 000 PULSES
VPULSE=600V
TPULSE=10µs
TCASE=175°C
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Failure prediction using SOA.
- VPULSE=600V; TCASE=175°C : 200µs < tFAILURE < 300µs
Simulated maximal temperature HIGHER THAN 780°C
METAL MELTING TEMPERATURE EXPECTED
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Failure prediction using SOA.
- VPULSE=600V; TCASE=175°C : tFAILURE = 275µs
FAILURE AS PREDICTED BY SOA FOR 600V SQUARE PULSE
tFAILURE = 275µs
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More Complex Simulations Possible
- DO160 CLASSIFICATION▪ W3 Level 3 : (600V/24A)
▪ W4 Level 4 : (750V/150A)
▪ W5 Level 4 : (750V/750A)
Simulated parameters :
Inrush current
CLD voltage
Channel temperature TCH
NO FAILURE if Channel temperature : TCH<600°C
Depends on device packaging (models for SMB, TO247 …)
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An accurate device modeling has been carried out using Thermal
Finite Element and Spice simulation, for several packaging solutions.
This model has been experimentally validated using square pulses
and 1.2/50µs voltage surge waveforms (up to 1.2kV).
Repetitive short circuit stresses have also been performed on a group
of devices to corroborate the SOA diagram derived from this model.
USERS ABLE TO EVALUATE DEVICE PERFORMANCE IN AN
APPLICATION AND TO ESTIMATE MAXIMAL CHANNEL TEMPERATURE
AND KEEP VALUE BELOW MAXIMAL RECOMMENDED
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