Number Representation

Part 2Little-Endian vs. Big-Endian Representations

Floating Point Representations

ECE 645: Lecture 5

Required Reading

Endianness, from Wikipedia, the free encyclopediahttp://en.wikipedia.org/wiki/Endianness

Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware DesignChapter 17, Floating-Point Representations

Little-Endian vs. Big-Endian Representation of

Integers

Little-Endian vs. Big-Endian Representation

A0 B1 C2 D3 E4 F5 67 8916

LSBMSB

MSB = A0

B1

C2D3

E4F5

67LSB = 89

Big-Endian Little-Endian

LSB = 89

0

MAX

67

F5E4

D3C2

B1MSB = A0

address

Little-Endian vs. Big-Endian Camps

Big-Endian Little-Endian

0

MAX

address

MSB

LSB

. . .

LSB

MSB

. . .

Motorola 68xx, 680x0 Intel

IBM

Hewlett-PackardDEC VAX

Internet TCP/IP

Sun SuperSPARC

Bi-Endian

Motorola Power PC

Silicon Graphics MIPS

RS 232

AMD

Origin of the termsLittle-Endian vs. Big-Endian

Jonathan Swift, Gulliver’s Travels

• A law requiring all citizens of Lilliput to break their soft-eggs

at the little ends only

• A civil war breaking between the Little Endians and

the Big-Endians, resulting in the Big Endians taking refuge on

a nearby island, the kingdom of Blefuscu

• Satire over holy wars between Protestant Church of England

and the Catholic Church of France

Little-Endian vs. Big-Endian

Big-Endian Little-Endian

• easier to determine a sign of the number

• easier to compare two numbers

• easier to divide two numbers

• easier to print

• easier addition and multiplication of multiprecision numbers

Advantages and Disadvantages

Pointers (1)

89

67

F5E4

D3C2

B1

A0

Big-Endian Little-Endian

0

MAX

address

int * iptr;

(* iptr) = 8967; (* iptr) = 6789;

iptr+1

Pointers (2)

89

67

F5E4

D3C2

B1

A0

Big-Endian Little-Endian

0

MAX

address

long int * lptr;

(* lptr) = 8967F5E4; (* lptr) = E4F56789;

lptr + 1

Floating Point Representations

The ANSI/IEEE standard floating-point number representation formats

Short (32-bit) format

Long (64-bit) format

Sign Exponent Significand

8 bits, bias = 127, –126 to 127

11 bits, bias = 1023, –1022 to 1023

52 bits for fractional part (plus hidden 1 in integer part)

23 bits for fractional part (plus hidden 1 in integer part)

Originally IEEE 754-1985.Superseded by IEEE 754-2008 Standard.

Table 17.1 Some features of the ANSI/IEEE standard floatingpoint number representation formats

00 01 7F FE FF7E 800 1 127 254 255126 128

–126 0 +127–1 +1

Decimal codeHex code

Exponent value

f = 0: Representation of 0f 0: Representation of denormals, 0.f 2–126

f = 0: Representation of f 0: Representation of NaNs

Exponent encoding in 8 bits for the single/short (32-bit) ANSI/IEEE format

1.f 2e

Exponent Encoding

Fig. 17.4 Denormals in the IEEE single-precision format.

The IEEE 754-2008 standard includes five rounding modes:

Round to nearest, ties away from 0 (rtna)

Round to nearest, ties to even (rtne) [default rounding mode]

Round toward zero (inward)

Round toward + (upward)

Round toward – (downward)

Rounding Modes

Round to Nearest Number

Fig. 17.7 Rounding of a signed-magnitude value to the nearest number.

Rounding has a slight upward bias.

Consider rounding (xk–1xk–2 ... x1x0 . x–1x–2)two to an integer (yk–1yk–2 ... y1y0 . )two

The four possible cases, and their representation errors are:

x–1x–2 Round Error 00 down 0 01 down –0.25 10 up 0.5 11 up 0.25

With equal prob., mean = 0.125For certain calculations, the probability of getting a midpoint value can be much higher than 2–l

rtn(x)

–4

–3

–2

–1

x –4 –3 –2 –1 4 3 2 1

4

3

2

1

rtna(x)

Directed Rounding: Motivation

We may need result errors to be in a known direction

Example: in computing upper bounds, larger results are acceptable, but results that are smaller than correct values could invalidate the upper bound

This leads to the definition of directed rounding modesupward-directed rounding (round toward +) and downward-directed rounding (round toward –)(required features of IEEE floating-point standard)

Directed Rounding: Visualization

Fig. 17.12 Upward-directed rounding or rounding toward +.

Fig. 17.6 Truncation or chopping of a 2’s-complement number (same as downward-directed rounding).

up(x)

–4

–3

–2

–1

x –4 –3 –2 –1 4 3 2 1

4

3

2

1

chop(x) = down(x)

–4

–3

–2

–1

x –4 –3 –2 –1 4 3 2 1

4

3

2

1

Requirements for Arithmetic

Results of the 4 basic arithmetic operations (+, , , ) as well as square-rooting must match those obtained if all intermediate computations were infinitely precise

That is, a floating-point arithmetic operation should introduce no more imprecision than the error attributable to the final rounding of a result that has no exact representation (this is the best possible)

Example:(1 + 21) (1 + 223 )

Rounded result 1 + 21 + 222 Error = ½ ulp

Exact result 1 + 21 + 223 + 224

New IEEE 754-2008 StandardBasic Formats

New IEEE 754-2008 StandardBinary Interchange Formats