numerical study on some improvements in the passive

NUMERICAL STUDY ON SOME IMPROVEMENTS INTHE PASSIVE COOLING SYSTEM OF A RADIO BASESTATION BASE ON MULTISCALE THERMALMODELING METHODOLOGY–PART I: CONFIRMATIONOF SIMPLIFIED MODELS

Chao Wei1, Zhao-Jun Liu2, Zeng-Yao Li1, Zhi-Guo Qu1,Ya-Ling He1, and Wen-Quan Tao11Key Laboratory of Thermo-Fluid Science and Engineering of MOE, Schoolof Energy and Power Engineering, Xi’an Jiaotong University, Xi’an, Shaanxi,P. R. China2Beijing Institute of Space Long March Vehicle, Beijing, P. R. China

Passive cooling schemes, such as natural convection, are the most reliable heat dissipation

apprpaches for electronic equipment. Some times, the highest temperature of the printed cir-

cuit board (PCB), rather than the highest of chips, is very much concern because of some

technological reasons. In order to reduce the maximum PCB temperature, this article analyze

the PCB temperature distribution by multiscale simulation. A top-to-down approach is

adopted in order to reveal the details of temperature distribution of some interested local pos-

ition. In the top-to-down approach, the system level simulation by a not-too-fine grid system is

the key to obtain a reliable solution. In order to reach such a goal each component of the PCB

should be reasonably simplified. The thermal analysis method is proposed to simplify the com-

ponents, and the implementation details are provided for three types of components. In the

companion article, the settlement of boundary conditions from the data of system level simu-

lation and several improvements in heat transfer by numerical simulation will be presented.

1. INTRODUCTION

With performance improvement and size reduction of electronic devices, theirpower dissipation level and power density significantly increase, which leads to amore deteriorated temperature environment affecting their performance and servicelife. More effective heat dissipation techniques are highly required, and thermalmanagement has already become one of the key aspects for ensuring the perfor-mance and reliability of high power components. This article mainly focuses on

Received 5 February 2013; accepted 21 June 2013.

This work was supported by the National Natural Science Foundation of China (grant number

51136004), and the National Key Basic Research Program of China (973 Program) (G2011CB707203).

Address correspondence to Wen-Quan Tao, Key Laboratory of Thermo-Fluid Science and

Engineering of MOE, School of Energy and Power Engineering, Xi’an Jiaotong University, Xi’an,

Shaanxi 710049, P.R.China. E-mail: [email protected]

Color versions of one or more of the figures in the article can be found online at

www.tandfonline.com/unht.

Numerical Heat Transfer, Part A, 65: 844–862, 2014

Copyright # Taylor & Francis Group, LLC

ISSN: 1040-7782 print=1521-0634 online

DOI: 10.1080/10407782.2013.826082

844

improvements of the passive cooling performance of a printed circuit board (PCB) ofa radio base station (RBS).

Passive cooling schemes, such as natural convection, are the most common heatdissipation approaches in electronic equipment. Compared with active heat dissi-pation techniques, such as forced air convection, thermoelectric cooling, and watercooling, these are simpler and do not depend on external action, such as, power,water, or other resources to maintain the cooling function. Therefore, the passivecooling mode always has better reliability and longer service life. It is very suitablefor electronic devices such as a RBS and light emitting diode (LED) lamp, whichare required to serve for long-term unattended duty. On the other hand, passive cool-ing is usually characterized by low heat flux. Thus, it is especially necessary andimportant to explore potential ways to enhance passive cooling.

Three related papers published since 2004 are briefly introduced as follows.Chiriac and Lee [1] investigated several system level variables in a general packet radioservice (GPRS) mobile telephone, including the PCB thermal-via distribution, powermanagement package designs, and enclosure convection and thermal interactionamong packages. Osone [2] investigated the thermal performance of a power semicon-ductor module used in mobile communication systems, and found that the thickness ofthe semiconductor substrate, the thickness of themulti-layer PCB, the thermal conduc-tivity of the bonding material under the semiconductor substrate, and misalignment ofthermal vias between each layer of PCB were the most important factors affecting thethermal resistance of the module. Recently, Moon et al. [3] discussed various passivethermal management schemes for a high power component in a handheld electronicdevice, and evaluated the effects of different passive thermal solution options.

The above-mentioned researches all focus on low power electronic equipment(mobile phone) whose power is lower than 10W. Recent development of RBSrequires much higher power input, at the order of 100W, with the passive coolingtechniques. Therefore, a more detailed thermal analysis approach is required in orderto reveal any potential and ways to guarantee reliability of component with highpower input. The recently-developed multiscale simulation is such an approach.

The flow and heat transfer of cooling air in the electronic device has multiscalecharacteristics in nature [4, 5]. That is, the geometric dimensions of the solid bodies

NOMENCLATURE

g acceleration of gravity, m=s2

Gr�

modified Grashof number,

Gr� ¼ gbQL4=(kn2)

L characteristic length, m

P fluid pressure, Pa

Q heat flux, W=m2

S/ generalized source term

T temperature, �Cu, v, w velocity components in x, y, z

directions, m=s

U velocity vector (u, v, w), m=s

x, y, z Cartesian coordinates

b thermal expansion coefficient, K�1

e/ specified small value for determining

convergence

k fluid thermal conductivity, W=(m �K)

n fluid kinematic viscosity, m2=s

q density, kg=m3

C/ generalized diffusion coefficient

/ general variable

Subscripts

1 external condition

max maximum value

/ general variable

IMPROVEMENTS IN PASSIVE COOLING SYSTEM–PART I 845

or surfaces encountered by cooling air flow cover several orders, frommeters of a cabi-nets to millimeters of a ball grid. However, the flow and heat transfer processes at dif-ferent geometric levels have the same governing equations, Navier-Stokes (NS) eq.and energy eq.; hence, according to reference [6] it belongs to the multiscale system.

It is stated in reference [6] that the multiscale problems in heat transfer and fluidflow may be classified into two categories: multiscale system and multiscale process.For the multiscale process, the heat transfer and fluid flows at different geometriclevels are governed by different governing equations and solved by different numeri-cal methods. For such a mutiscale problem, numerical solutions are conducted in dif-ferent regions and then information exchange at the interfaces between differentscales. The key is how to transform the macroscopic solutions to the mesoscale ormicroscale solutions. Such transformation is a reconstruction process in which lessinformation is transformed to more information. For the multiscale system, Refer-ences [4] and [5] proposed a top-to-down sequential multilevel simulation methodwith increasing fineness of grids. By such a multiscale thermal analysis approach,one can reveal the flow and heat transfer details for the component of location ininterest with acceptable computational resources requirement (and this feature willbe further demonstrated here); thus, this solution approach will be adopted andfurther developed. For the simplicity of presentation, this solution approach will becalled multiscale thermal model in the following presentation.

In this study, the system thermal design of an outdoor radio base station (RBS)with a total power input of 132.5W, which is named LPP by the manufacturer, isnumerically investigated and its key parameters are optimized by means of the com-mercial software ICEPACK. In this article, the establishing method of simplifiedcompact model in system level model is discussed, and influence of different bound-ary conditions on the results of calculation are studied. Finally, multiscale models atthree levels of the RBS are discussed and established for investigating temperaturedistribution of tiny (approximately 10�2 mm size) structure in package. Designand optimization of passive thermal management schemes based on multiscalemodel of LPP will be discussed in the companion article.

2. PROBLEM DESCRIPTION

A schematic diagram of the configuration and working environment of theRBS are shown in Figure 1(a). The RBS works outdoor. As shown there the PCB ofthe RBS is clung to a heat sink, all chips are located on the other side of the PCB,and an electromagnetic compatibility (EMC) shield is used to cover the PCB and chips.A sun shield is installed outside of the heat sink for obstructing solar radiation.

The details of the heat sources studied are first described as follows, which arecopied from a practically RBS in usage. The total power generation of the RBS is132.5W, and heat sources of RBS are the PCB and the chips on it. The positionsand power generation of the chips can be seen in Figure 1(b). It should be noted thatthe PCB power of 15.6W is from other distributed heat sources set up on the entirePCB and is assumed uniformly distributed over PCB for the convenience of simula-tion. The main power elements have three kinds of package, i.e, A-type, B-type, andC-type, as shown in the figure (types A, B, and C are named by the authors for theconvenience of presentation). The A-type package includes the encapsulations of

846 C. WEI ET AL.

20W chip and 17W chip within a small outline integrated circuit package (SOIC).The chips of 60W and 3.6W are of a B-type element structure which are RF powerfield effect transistors, whose packaging and connection mode will be discussed insection 5.2. The 60W chip is the largest power generation chip studied, and its heatflux is up to 3.33� 105W=m2, which provides the biggest challenge in the passivethermal management in this study. The 5.3W chip and two 5.5W chips are connec-ted with the heat sink through holes of PCB, which belong to the C-type elementconfiguration in Figure 1(b).

3. BRIEF DESCRIPTION OF MULTISCALE THERMAL MODELING

The calculation procedure of the multiscale model is shown in Figure 2. Atfirst, a compact and somewhat simplified model at system level for components isbuilt up, and calculation results of the compact model are verified by the detailedmodel of the component to ensure that differences in results of the two models weresmall enough. This implies that the simplified compact model could be used to sub-stitute a detailed model in the system level simulation in order that a not-too-fine

Figure 1. Schematic diagram of the RBS. (a) Configuration and working state of the RBS, and (b) heat

dissipation on the PCB.


grid system may be used for the system level simulation. After confirming thereliability of the system model computation of system level model is carried out.Then, the component level model, which contains more structural details of thecomponent, should be built, including the specification of the computational domainof the component level. After the computational domain is determined, thermalinformation at the component domain boundary is extracted from the numericalresults of the system level simulation, and mapped to component level model asboundary conditions to carry on calculation of component level model. From thenumerical results of the component model, further refining of the computationdomain may be conducted for a smaller region until the smallest target in interesthas been revealed in detail. It should be noted that from numerical aspects thetwo major issues for the numerical simulation of the multiscale system are 1) theestablishment of the simplified compact model of the components, and 2) the bound-ary conditions extraction. Since the information for boundary condition of the nextlevel simulation is based on the system level simulation with a not-too-fine grid sys-tem, it is of crucial importance that the numerical results predicted at the system levelare accurate enough to guarantee the correctness of the extracted information of forthe boundary conditions of the nest level simulation. For the second issue, a differentcombination of the results of the system-level (or previous level) simxulation may beused to offer different kinds of boundary conditions for the next level simulation,i.e., first kind, partially second type, and third type.

This article focuses on the establishment of simplified compact componentmodels for the each type of chips, shown in Figure 2, and different combinationsof the extracted boundary conditions will be numerically tested to find the best setup of the boundary condition from the aspects of numerical stability and solutionaccuracy. In the companion article, the results of the multiscale simulations willbe presented in detail in conjunction with the system optimization and enhancementsof heat transfer for different parts of the board.

In the following presentation, the establishment of the system level model willbe presented in detail, including the establishment of the simplified compact compo-nent models for the three types of chips. Then, numerical test results for different

Figure 2. Calculation procedure of the multiscale thermal modeling method.

848 C. WEI ET AL.

boundary condition extractions will be presented. Finally, some conclusions will bepresented.

4. SYSTEM LEVEL MODEL ESTABLISHMENT

4.1. Physical Model

A system level model includes the main parts of RBS. For reducing grid numberand saving computing resources, the following assumptions are made for the physicalmodel. (1) Apart from the three types of heat sources, the rest of the PCB is taken as asmooth plate with pre-specified thermal conductivity; (2) the air flow is considered tobe incompressible; and (3) the heat transfer process is in steady state and all thermo-physical properties are constant, except the air density in the gravitational term,which will be modeled by the Boussinesq assumption [7]. The thermophysical proper-ties of components of the RBS provided by the manufacturer are listed in Table 1.

4.2. Mathematical Formulation

4.2.1. Governing equations. For the problem at hand the natural convectiveheat transfer, conduction in the PCB and radiation heat transfer, have to be takeninto account simultaneously, making the problem to be a complicated conjugate one.

According to the above assumptions, the governing equations for theconvective-conductive heat transfer may be expressed as follows [8]

div qU/ð Þ ¼ div C/grad/� �

þ S/ ð1Þ

where / is a general variable, which can represent the following solved variables: u, v,w, and T; C/ is the generalized diffusion coefficient; and S/ is the generalized sourceterm.

Because the radiative heat transfer plays an important role when the device iscooled by natural convection, the radiative heat transfer is taken into account inthe numerical simulation. The air is assumed to be non-participating in the radiation,and all of the solid surfaces including chips, PCB, EMC cover, heat-sink, andsun-shield are assumed to be gray and diffuse. The surface to surface radiation modelin Icepak [9] has been used here. The net radiative heat transfer rate is taken as theadditional sources applied only to the cells adjacent to the interface of gas and solid.The derivation and implement process of the additional sources can be found inreferences [10–13].

4.2.2. Numerical method. The above governing equations are discretized bythe finite-volume method [8, 14]. The coupling between pressure and velocity isimplemented by the SIMPLE algorithm. The convection term is discretized by thesecond-order upwind difference scheme, and the diffusion term is discretized by thecentral difference scheme. Mesh generation and numerical calculation are performedby the commercial CFD software Icepack [9].

4.2.3. Boundary condition specification. Boundary conditions are an indis-pensable part for the mathematical solution of the governing equations. Theoretically,


the problem at hand is the natural convection in an infinite space. Practically, we canonly simulate a finite large enough space. The outer boundary of such a space is calledpseudo outer boundary and its specifications at different boundaries are set up asfollows (see Fig. 1(a)):P¼ 101325Pa,T¼T1¼ 55�C; u¼ 0, v¼ 0 (at upper and lowerboundary); v¼ 0, w¼ 0 (at left and right boundary); u¼ 0, w¼ 0 (at the front and rearboundary). The power input of each chip is given to the corresponding numericalmodel as its source term.

The numerical simulation is conducted for the entire computational domain,with the solid region being treated as a fluid with infinite viscosity. To achieve it,the harmonic mean method is used to determine the diffusion coefficient at the con-trol volume interface. The thermal conductivity at the different material regionsshould adopt individual values to keep the heat flux continuum at the interface while

Table 1. Thermophysical properties of components of the RBS

No. Component

Thermal

conductivity

(W=(m �K))

Component

type Remark

1 EMC cover 205 System level Extruded aluminum

2 Heatsink 205 System level Extruded aluminum

3 Sun shiled 0.55 System level Plastic

4 PCB Tangential of

board: 20normal

of board: 1

System level

5 TIM 1.5 System level

6 Die 180 SOIC

7 Mold component 0.8 SOIC

8 Die attach pad 170 SOIC

9 Substract 0.35 SOIC

10 Lead 10.5 SOIC Nickel-iron alloy (Alloy-42)

11 Exposed pad 387.6 SOIC Copper

12 Solder 50.2 SOIC Pb50% Sn50%

13 Solder mask 387.6 SOIC Copper

14 Copper pad 387.6 SOIC Copper

15 Die 180 RF transistor

16 Copper clad 387.6 RF transistor Copper

17 Gate lead and drain

lead

10.5 RF transistor Nickel-iron alloy (Alloy-42)

18 Integrated capacitor 148 RF transistor

19 MOS capacitor 65 RF transistor

20 Flange 230 RF transistor Proprietary copper-tungsten

(CuW)

21 Arrary of

bonding-wires

313 RF transistor

22 Ceramic substract 15 RF transistor

23 Mold component 0.8 RF transistor

24 Magnetic core 80 Planer tranformer Mn-Zn Power ferrite

Material

25 Printed circuit

winding

1 Planer tranformer

26 Screw 177 Planer tranformer

850 C. WEI ET AL.

the heat capacity of fluid is used for all the fluid and solid regions, because the nom-inal diffusion coefficient in the energy equation is k=cp, rather than itself k [15].

During the iterative solution process, if the relative deviation between two con-secutive iterations is less than the specified small value e/, the iteration is consideredconverged

max j/ni;j;k � /n�1

i;j;k j j/ni;j;kj

.� �< e/ ð2Þ

where / represents the variables u, v, w, and T; and e/ is equal to 10�5 and 10�9 forvelocity and temperature, respectively.

4.2.4. Turbulence model. In order to reveal whether the flow is laminar orturbulent, some preliminary evaluation was conducted. According to references [16,17], the Grashof number is the criterion to judge whether a natural convection flow isturbulence or not. For electronic cooling the thermal boundary condition of the PCBCommon approximated is uniformly heated surface [18], and the following modifiedGrashof number should be used

Gr� ¼ gbQL4

kn2ð3Þ

where g is the acceleration of gravity, b is thermal expansion coefficient, Q is heatflux, L is the characteristic length which takes the value of heat sink length, k isthe fluid thermal conductivity, and n is the fluid kinematic viscosity.

The modified Grash of numbers of the RBS is within the transition range of3� 109�Gr

� � 2� 1010; therefore, a j-e turbulent model is used.

4.2.5. Computational domain determination. As indicated above,because the RBS work outdoors, and around the device there is enough space forair flow and heat transfer to be developed. From heat transfer theory, this is thenatural convection in an infinite space [16, 17]. However, in the numerical simulation

Figure 3. Computational domain verification. (a) top view and (b) side view.


only a finite but large computational domain can be accepted. From a numericalsimulation point of view the apprppriate computational domain should be in sucha condition that the numerical results are almost independent of its size and itsfurther expansion leads to a negligible effect on the numerical results. Five differentcomputational domains are tested to study their influence on the highest temperaturein PCB. Figure 3 shows schematically the computational domain, and Table 2 showsthe numerical results.

Tmax in Table 2 is the maximum temperature of the PCB. When the compu-tational domain is larger than the case of Lx¼Lz¼L and Ly¼ 2L, the maximumtemperature in PCB does not change significantly. Thus, in our simulationLy¼ 2L and Lx¼Lz¼L are adopted. For this preliminary simulation, a grid sys-tem with 587,626 grids was used, and the PCB was simplified by a vertical platewith the same height =width; the total power input was uniformly distributed overthe PCB.

5. SIMPLIFIED COMPACT SYSTEM LEVEL MODEL ESTABLISHMENT

A simplified compact system level model establishment is very importantbecause the numerical results from this model serve for the boundary condition ofthe sub-level model. Therefore, establishment of such model must be careful, andreference [19] proposed a multi-layer compact modeling approach, which attemptsto eliminate the small length scales associated with modeling the details of thepackage by merging layers or materials together and using models with length scalescomparable to those required by the system level CFD simulation.

In this article, we propose the resistance network analysis method to establishthe compact model. First different heat transfer paths of the component are specifiedby resistance network analysis, and a comparison between thermal resistances of thedifferent heat transfer path is made. From the comparison the heat transfer pathwith predominated resistance can be identified the other paths can be ignored. Thensimulations are conducted for the simplified model, and the detailed model of thecomponent under the same condition and numerical results are compared for verify-ing the accuracy and precision of the simplified model. If the agreement between thetwo simulations is not satisfied, the compact model should be refined until satisfac-tory agreement is obtained. In the following, such a practice will be described indetail for the three types of chips.

Table 2. Influence of computational domain on Tmax of PCB

Item Biggest Bigger Adopted Smaller Smallest

Definition Lx�¼Lxþ¼ 4L Lx�¼Lxþ¼ 2L Lx�¼Lxþ¼L Lx�¼Lxþ¼L=2

Lx�¼Lxþ¼L=4

Ly�¼Lyþ¼ 6L Ly�¼Lyþ¼ 3L Ly�¼Lyþ¼ 2L Ly�¼Lyþ¼L

Ly�¼Lyþ¼L=2

Lz�¼Lzþ¼ 4L Lz�¼Lzþ¼ 2L Lz�¼Lzþ¼L Lz�¼Lzþ¼L=2

Lz�¼Lzþ¼L=4

Tmax(�C) 86.79 86.80 86.82 86.84 86.88

852 C. WEI ET AL.

5.1. Simplified Compact Model of 20 W SOIC Chip

The A-type chip of SOIC package is shown in Figure 4a, where 36 leads onboth sides of the package are welded with pads on the PCB. Because the SOIC pack-age is plastic, which is not beneficial to heat dissipate because of its low thermal con-ductivity, the exposed pad (EP) package is applied for enhancing heat dissipation bydirectly conducting heat from the chip to PCB via holes perforated in the region ofPCB clung to the chip for enhancing heat dissipation.

A compact model of component of 20W SOIC chip is established according toheat transfer path analysis, shown in Figure 4b, where most of the details of thepackage are represented. There are two major heat transfer paths: the first path

Figure 4. Heat transfer analysis of SOIC chip. (a) Physical map of SOIC, (b) heat transfer path analysis,

and (c) thermal resistance network model.


shows heat from the die is conducted to the thermal via though exposed pad, then tothe heat sink; the second path shows heat from the die is conducted through a leadframe and leads on both sides of package, conducted to PCB through a solder mask,then spreads to ambient by heatsink. The thermal resistances of the two heat transferpaths are analyzed in detail in the appendix of this article.

According to estimation, total thermal resistance of second path is more than109.18�C=W, which is 49.3 times the first path because the two heat transfer pathsare in parallel, as shown in Figure 4c; the second heat transfer path can be neglected.Structure simplification of the package is conducted according to the above analysis:those parts which provide minor thermal resistance will be neglected, and the majorthermal resistance parts will also be simplified with the principle of equivalent resist-ance. For example, the complicated thermal via structure is merged into a block struc-ture, and a uniform effective thermal conductivity based on the volume average isadopted for the merged volumes. Finally, the simplified compact model of SOIC isestablished as shown Figure 5a. To verify the good agreement of temperature distri-bution of the simplified compact model and the original compact model, numericalsimulations are performed for the two models as shown in Figure 5b For the twoproblems, the same governing equation, numerical method, and turbulence model

Figure 5. Establishment and validating of compact model of SOIC chip. (a) Simplified compact model

of SOIC chip, (b) boundary condition of verification of simplified model, and comparation of simplified

compact model and detailed model of SOIC chip.

854 C. WEI ET AL.

presented above are used and boundary conditions similar to the actual workingconditions are applied as shown in Figure 5b. Simulation results of the temperaturedistributions are shown in Figure 5(c). It can be seen that temperature distributionsare good agreement, with the largest difference being no more than 1�C. This provesthat the simplified compact model has high accuracy and can be used in the systemlevel model.

Figure 6. Heat transfer analysis of RF transistor. (a) Physical map, (b) installation method, and (c) heat

transfer path analysis, and (d) thermal resistance network model.


5.2 Simplified Compact Model of 60 W RF Transistor

RF transistor is B-type of chip (Figure 6(a)). When installing, the transistor isconnected with a copper clad on PCB by drain pin and gate pin, and flange of thetransistor is attached to the heat sink by two clamps and screws through a prefabri-cated hole of PCB, as showed in Figure 6(b).

A simplified compact model of transistor is established though thermal resist-ance analysis. In this case, there are two major heat transfer paths, as shown inFigure 6(c). Path one: heat from die is conducted to heatsink though flange andthermal interface material (TIM); and path two: heat from die is conducted to PCBthough ceramic substrate and pins, then is transferred to heatsink.

According to the above approximate estimation, total thermal resistance ofsecond path is more than 165.30�C=W, which is 403 times the first path, so thesecond heat transfer path can be neglected for the two heat transfer paths being inparallel, as shown in Figure 6(d). Finally, the simplified compact model of transistoris shown in Figure 7(a). The boundary conditions for the preliminary verification is

Figure 7. Establishment and validating of compact model of RF transistor. (a) Simplified compact model

of RF transistor, (b) boundary condition of verification computing, and (c) comparation of simplified

compact model and detailed model of RF transistor.

856 C. WEI ET AL.

similar to the actual working conditions shown in Figure 7(b); calculation results areshown in Figure 7(c). It can be seen that temperature contours in PCB around thetransistor of the two results is in good agreement, and the largest temperature differ-ence is no more than 1�C, which proves that the simplified compact model has highaccuracy and can be used in the system level model.

5.3 Simplified Compact Model of 5.3 W Planar Transformer

The planar transformer is a C-type of chip (Figure 8(a)). There are three trans-formers on PCB which have the same structure, and the power of two is 5.5W; theother one is 5.3W. The 5.3W transformer, which is nearer the large power compo-nent, is selected to conduct component level model establishment.

Thermal resistance analysis for this component is shown in Figure 8(b); thereare two major heat transfer paths. In path one, heat from die is conducted to heatsink though ferrite core; and path two, heat from die is conducted to PCB thoughprinted circuit winding, then is transferred to heat sink.

The approximate thermal resistance analysis shows that the total thermalresistance of the second path is more than 87.96�C=W, which is about 90 times

Figure 8. Heat transfer analysis of RF transistor. (a) Physical map and composition, (b) heat transfer path

analysis, and (c) thermal resistance network model.


the first path. Because the two heat transfer paths are in parallel, the second heattransfer path can be neglected. Finally, the simplified compact model of the trans-former is established according to the above analysis (Figure 9a). Verification ofthe simplified model is conducted with boundary conditions similar to the actualworking conditions as shown in Figure 9b. The simulated temperature distributionsare shown in Figure 9c. It can be seen that the two temperature distributions in PCBare in good agreement, with the largest difference being no more than 1�C, whichverifies the reliability of the simplified compact model of the transformer.

6. CALCULATION RESULTS OF SYSTEM LEVEL MODEL

6.1. Grid Independence Verification

First, the grid-independence of the numerical solution is examined. Several gridsystems have been tested in 0.45, 0.59, and 0.81 million cells, and corresponding

Figure 9. Establish and validate of compact model of planer transformer. (a) Simplified compact model of

planer transformer, (b) boundary condition of verification computing, and (c) comparison of the simplified

compact model and detailed model of planer transformer.

858 C. WEI ET AL.

differences of maximum temperature of PCB are within 1%, which indicates that thepredicted results are nearly independent of further increase in grid density. Furthersystem simulations are carried out on a mesh with approximately 0.59 million cells.

6.2. Results of System Level Simulation

Calculation results of the system level model is shown in Table 3 and Figure 10.The interface of the component and PCB is the weaknesses of reliability, so themaximum temperature of the interface is adopted as research parameters inTable 3. In order to verify the correctness and accuracy of multiscale thermal model-ing methodology and the simplified model in the system level, the test data providedby the manufacturers are also listed in the table. The relative error can be expressedby the following

d ¼ Tm � Tref

Tref� 100%

where Tm is the results of the system scale calculation, and Tref is the test data. It canbe seen that the maximum the relative error is 1.01%, which proves correctness and

Table 3. Comparison between calculated results and test data in system level analysis

Item

Calculated results

of

system level mode

Test

data

Relative

error

(%)

Tmax of the interface of A-type chip (�C) 84.88 84.03 1.01

Tmax of the interface of B-type chip (�C) 84.76 83.99 0.92

Tmax of the interface of C-type chip (�C) 80.12 80.09 0.04

Figure 10. Calculation result of system level model.


accuracy of multiscale thermal modeling methodology and the simplified model inthe system level.

7. CONCLUSIONS

In the top-to-downmultiscale simulation approach, the simulation results of thesystem level with a not-too-fine grid system is of crucial importance because the simu-lation results will be extracted for the boundary conditions of the next level simula-tion. In this article, a method of establishing a simplified compact model for thesystem level simulation is proposed and the details of its implementation are pro-vided. Based on the thermal resistance analysis method, any component can be effec-tively simplified by keeping the major heat transfer path and neglecting the minor heattransfer paths. Preliminary simulation of the simplified model and the original com-pact model should be performed to verify the reliability of the simplified model. Thepractices for the three types of components conducted here show that the proposedapproach is feasible and effective. In the companion article, the settlement of bound-ary condition for the next level simulation and multiscale simulation of the PCB inconjunction with some enhancement techniques will be presented

REFERENCES

1. V. Chiriac and T.-Y. Tom Lee, Thermal Evaluation of Power Amplifier Modules andRF Packages in a Handheld Communicator System, 2004 Inter Society Conference onThermal Phenomena, Las Vegas, NV, June 1–June 4, pp. 557–563, 2004

2. Y. Osone, Thermal Design of Power Semiconductor Modules for Mobile CommunicationSystems, #TIMA Editions=THERMINIC Nice, Cote d’Azur, France, 27–29 September,2006.

3. S. W. Moon, S. Prstic, C. P. Chiu, Thermal Management of a Stacked-Die Package in aHandheld Electronic Device using Passive Solutions, IEEE Trans. on Components andPackaging Technologies, vol. 31, no. 1, pp. 204–210, 2008.

4. Q. Nie and Y. Joshi, Multiscale Thermal Modeling Methodology for ThermoelectricallyCooled Electronic Cabinets, Numer. Heat Transfer A, vol. 53, no. 3, pp. 225–248, 2008.

5. L. Tang and Y. Joshi, A Multi-Grid Based Multi-Scale Thermal Analysis Approach forCombined Mixed Convection, Conduction, and Radiation Due to Discrete Heating,ASME J. of Heat Transfer, vol. 127, 18–26, 2005.

6. Y. L. He and W. Q. Tao, Multiscale Simulations of Heat Transfer, and Fluid FlowProblems, ASME J. of Heat Transfer, vol. 134, 031018, 2012.

7. D. D. Gray and A. Giorgin, The Validity of the Boussinesq Approximation for Liquidsand Gases, Int. J. of Heat Mass Transfer, vol. 19, pp. 545–551, 1976.

8. W. Q. Tao, Numerical Heat Transfer, 2nd ed., p. 5, 96–99, 195–251, Xi’an Jiaotong

University Press, Xi’an, 2001.9. Icepak 4.3 Documentation, Fluent Inc., 2006.

10. W. Q. Tao and W. Li, A Numerical Scheme for Heat Conduction Problems InvolvingRadiation Exchange, within Solution Domains, J. of Xi’an Jiaotong University, vol. 19,no. 3, pp. 65–76, 1985. (In Chinese.)

11. M. Yang, Y. Q. Wang, Y. H. Fu, and W. Q. Tao, A Numerical Method for CoupledConduction and Convection Heat Transfer with Surface Radiation, J. of Xi’an JiaotongUniversity, vol. 26, no. 2, pp. 26–32, 1992. (In Chinese.)

860 C. WEI ET AL.

12. C. Y. Zhao and W. Q. Tao, Natural Convections in Conjugated Single and DoubleEnclosures, Heat Mass Transfer, vol. 3, no. 3, pp. 175–182, 1995.

13. L. P. Li, Z. G. Wu, Z. Y. Li, Y. L. He, and W. Q. Tao, Numerical Thermal Optimizationof the Configuration of Multi-Holed Clay Bricks used for Constructing Building Walls bythe Finite Volume Method, Int. J. of Heat Mass Transfer, vol. 51, pp. 3669–2682, 2008.

14. S. V. Patankar, Numerical Heat Transfer and Fluid Flow, McGraw-Hill, New York, 1980.15. Z. G. Qu, W. Q. Tao, and Y. L. He, Three Dimensional Numerical Simulation on

Laminar Heat Transfer and Fluid Flow Characteristics of Strip Fin Surfaces withX-Arrangement of Strips, ASME J. Heat Transfer, vol. 126, no. 4, pp. 697–707, 2004.

16. S. M. Yang and W. Q. Tao, Heat Transfer, 4th ed., p. 263, Higher Education Press,Beijing, 2006.

17. A. Bejan, Heat Transfer, p. 365, John Wiley and Sons, New York, 1996.18. E. M. Sparrow, L. K. Carlson, Local and Average Natural Convection Nusselt Numbers

for A Uniformly Heated, Shrouded or Unshrouded Horizontal Plate, Int. J. Heat MassTransfer, vol. 29, pp. 369–380, 1986.

19. Q. Nie, Experimentally Validated Multiscale Thermal Modeling of Electric Cabinets,Ph.D. Dissertation G. W. Woodruff School of Mechanical Engineering, Georgia Instituteof Technology, Atlanta, Georgia, USA, 2008.

20. C. Wei, Z. J. Liu, Z. Y. Li. Z. G. Qu, and W. Q. Tao, Numerical Study on Some Improve-ments in the Passive Cooling System of a Radio Base Station, Numer. Heat Transfer A,Vol. 52, no. 2, pp 319–35, 2012.

APPENDIX

The resistance network calculations performed here are illustrated by theresistance network calculations of 20W SOIC chip.

As shown in Figure 4(b), the thermal resistances of the two heat transfer pathsof 20W SOIC chip are analyzed as follows.

First path:

. Thermal resistance of exposed pad is as follows.

Rpad ¼ dAk

¼ 0:4� 10�3

13:2� 6:1� 10�6 � 387:6¼ 0:01�C=W

. Exposed pad connect with thermal via soldering; thermal resistance of soldering isas follows.

Rsolder ¼dAk

¼ 0:2� 10�3

13:2� 6:1� 10�6 � 50:2¼ 0:05�C=W

. Thermal resistance of thermal via is as follows.

Rvia ¼dAk

¼ RSingle via=The number of vias ¼

1:2� 10�3

p� 0:252 � 0:2252ð Þ � 10�6 � 387:6=ð11� 5Þ ¼ 1:51�C=W


. Thermal resistance of (thermal interface materials) (TIM) is as follows.

RTIM1 ¼dAk

¼ 0:2� 10�3

23� 9� 10�6 � 1:5¼ 0:64�C=W

Total thermal resistance of the first path R1¼ 2.21�C=W.Second path:

. Thermal resistance of lead frame Rlead frame is as follows.

Rlead frame ¼dAk

¼ 1:1� 10�3

21:9� 0:2� 10�6 � 10:5=2 ¼ 11:96�C=W

. Thermal resistance of leads Rlead is as follows.

Rlead ¼ RSingle lead=The number of leads

¼ 2:94� 10�3

0:4� 0:2� 10�6 � 10:5=36 ¼ 97:22�C=W

862 C. WEI ET AL.

numerical study on some improvements in the passive

Documents