on the design of iterative codes for magnetic recording channel · pdf fileon the design of...

On the Design of Iterative Codes for Magnetic Recording Channel

Greg Burd, Panu Chaichanavong, Nitin Nangare, Nedeljko Varnica12/07/2006

2

Outline

• Two classes of Iterative architectures• RS-plus Iterative architecture

– Code design methodology– Examples– Simulations results

• RS-less Iterative architecture– Code parameters– Simulations results

• Concluding remarks

3

Iterative Architecture Classes

• There are two type of Iterative architectures suitable for application in magnetic recording channel

– RS-plus iterative architecture. Concatenation of outer RS ECC code with inner iterative code

– RS-less iterative architecture. A strong Iterative code is the only ECC that provides data reliability.

4

RS-plus Iterative Architecture Class

10-bitRS ECCencoder

Iterative Code

encoder

10-bitRS ECCdecoder

Iterative Code

decoder

Channel

SOVA

Outer iteration

Inner iteration

512 bytes

RS ECC SER is the ultimate measure of performance

5

RS-less Iterative Architecture Class

Iterative Code

encoder

Iterative Code

decoder

Channel

SOVA

Outer iteration

Inner iterationIterative Word ER is

the ultimate measure of performance

6

RS-plus Iterative Architecture

• Desirable Inner Iterative Code Characteristics– Iterative code has to have symbiotic relationship with outer

RS ECC decoder. Error signature at the output of iterative decoder is very important: must not have any long error bursts (here burst length is measured in RS ECC symbols) at the output of iterative code.

– This favors use of “weaker” iterative codes as components of RS-plus iterative architecture.

• In this presentation we consider two RS-plus Iterative architectures based on

– Interleaved Single-Bit Parity Code (ISPC)– Turbo Product Code (TPC-SPC)

7

ISPC

RS ECCencoder

interleaverParity bits

MUXn

parity

Channel

RS ECCdecoder

Min-SumIterative

Codedecoder

SOVA

kk

n1+

dmin=2

1x per outer iteration

3 outer iterations

20

n/20

8

TPC-SPC

RS ECCencoder

interleaver

MUXn

parityParity bits

Parity bits

RS ECCdecoder

Min-SumIterative

Codedecoder

SOVA

Channel

3x per outer iteration

5 outer iterations

33

34

dmin=4

9

RS ECC Setting for RS-plus Iterative Architecture

• For RS-plus iterative architecture, it is important to achieve good redundancy allocation between outer RS ECC decoder and inner Iterative decoder.

– In practice, the choice of RS ECC correction power is primarily driven by necessity to handle long TA’s and media defects.

– For RS Iterative architecture, iterative code is not strong enough to handle TA’s and media defects, therefore this task falls onto outer RS ECC code.

• The following two slides shows the performance of RS-plus iterative code with RS ECC optimized for defect handling, t=24 symbols.

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14 15 16 17 18 19 2010

-4

10-3

10-2

10-1

100

SNR

SyE

R

Perp. channel, NPV=[4,7,1], UBD=1.1, jitter=90%, RS-plus Iterative Architecture

SOVA, RS(t=24)SPC 60/61, RS(t=24)ISPC, RS(t=24)TPC-SPC, RS(t=24)

Performance of RS-plus Iterative Architecture With Random Noise

• TPC-SPC gains ~3.0 dB over 60/61 SPC @ SyER=3-e4

• ISPC gains 1.0 dB over 60/61 SPC @ SyER=3e-4

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15.8 16 16.2 16.4 16.6 16.8 17 17.2 17.4 17.610

-6

10-5

10-4

10-3

10-2

10-1

100

SNR

SE

R


SOVA, RS(t=24)SPC 60/61, RS(t=24)ISPC, RS(t=24)TPC-SPC, RS(t=24)


• TPC-SPC gains 0.2dB over 60/61 SPC @ SER=1-e5

• ISPC gains 0.1 dB over 60/61 SPC @ SER=1e-5

12


• RS-plus Iterative architecture often performs better with weaker outer RS ECC code (correction power in low teens) in random noise environment.

• The following two slides shows the performance of RS-plus iterative code with RS ECC optimized for random errors, t=12 symbols.

• In practice, reducing RS ECC correction power is not a viable option since defects are relatively frequent in the existing drives.

13

14 15 16 17 18 19 2010

-5

10-4

10-3

10-2

10-1

100

SNR

SyE

R


SOVA, RS(t=24)SPC 60/61, RS(t=24)ISPC, RS(t=24)TPC-SPC, RS(t=24)TPC-SPC, RS(t=12)


• TPC-SPC +RS(t=12) gains ~3.5dB over 60/61 SPC @ SyER=1-e4

• TPC-SPC + RS(t=12) is 0.5dB better than TPC-SPC + RS(t=24) @SyER=1-e4

14

15 15.5 16 16.5 17 17.510-6

10-5

10-4

10-3

10-2

10-1

100

SNR

SE

R




• TPC-SPC +RS(t=12) gains ~0.7dB over 60/61 SPC+RS(t=24) @ SER=1-e4.

• TPC-SPC code SER curve does not drop as fast as other codes.

15

Performance of RS-plus Iterative Architecture With Media Defects

• Media defect modelWaveformGenerator x +

AWGNnoise

10 ≤≤ α

0 5 0 0 1 0 0 0 1 5 0 0 2 0 0 0 2 5 0 0 3 0 0 0 3 5 0 0 4 0 0 0 4 5 0 0 5 0 0 0- 4 0

- 3 0

- 2 0

- 1 0

0

1 0

2 0

3 0

4 0

B i t I n d e x

FIR

Sam

ples

16

16 16.5 17 17.5 18 18.510

-5

10-4

10-3

10-2

10-1

100

SNR

SE

R

defect length 50 bits, attenuation alpha=0.5Perp. channel, NPV=[4,7,1], UBD=1.1, jitter=90%, RS-plus Iterative Architecture


Performance of RS-plus Iterative Architecture With Media Defects

• All RS-plus iterative codes perform poorly with media defects

• As such these RS-plus codes must not be used in hard drives

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Remarks on RS-plus Iterative Architecture

• While RS-plus iterative codes perform better with weaker outer RS ECC code (t=12) in random noise environment, extremely poor performance of such ECC under media defects rules out the use of RS-plus iterative architecture in conjunction with weak outer RS ECC.

• With strong outer RS ECC (t=24), the gains under random noise are small, 0.2-0.3 dB. Moreover the performance under media defects is still poor and lagging behind the existing detectors.

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Viable RS-plus Iterative Architecture

• Is it possible to find good RS-plus codes that yield improvement under random noise as well as under media defects?

• The answer is yes. The performance of one such code is shown in the next couple of slides

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15.4 15.6 15.8 16 16.2 16.4 16.6 16.8 17 17.2 17.410

-6

10-5

10-4

10-3

10-2

10-1

100

SNR

SE

R


SOVA, RS(t=24)SPC 60/61, RS(t=24)RS-plus code, RS(t=24)


• This RS-plus iterative code gains 0.5dB over state of the art 60/61 SPC code

20

15.5 16 16.5 17 17.5 1810-5

10-4

10-3

10-2

10-1

100

SNR

SE

R

defect length 50 bits, attenuation alpha=0.5Perp. channel, NPV=[4,7,1], UBD=1.1, jitter=90%, RS-less Iterative Architecture

SOVA, RS(t=24)SPC 60/61, RS(t=24)RS-plus code, RS(t=24)


• The gains of this RS-plus iterative code are largely preserved in media defect dominated noise environment

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RS-less Iterative Architecture Class

Iterative Code

encoder

Min-SumIterative Code

decoder

Channel

SOVA

5 Outer iterations

3 Inner iterations

(3,x) LDPC code, whereCode rate=.8974

{ }3,2∈x

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13 14 15 16 17 18 19 2010-8

10-7

10-6

10-5

10-4

10-3

10-2

10-1

100

SNR

SyE

R


SOVA, RS(t=24)SPC 60/61, RS(t=24)RS-less

RS-less Iterative Architecture

• RS-less code gains ~5.1dB over 60/61 SPC + RS(t=24) at SyER=1e-4

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14 14.5 15 15.5 16 16.5 17 17.510

-6

10-5

10-4

10-3

10-2

10-1

100

SNR

SE

R

Perp. channel, NPV=[4,7,1], UBD=1.1, jitter=90%, RS-less Iterative Architecture

SOVA, RS(t=24)SPC 60/61, RS(t=24)TPC-SPC, RS(t=24)ISPC, RS(t=24)TPC-SPC, RS(t=12)RS-less


• RS-less code gains ~1.7dB over 60/61 SPC + RS(t=24) at SER=1e-4

• Need to worry about possible error-floor, to make sure that gains do not vanish at higher SNR’s

24

16 16.5 17 17.5 18 18.510-5

10-4

10-3

10-2

10-1

100

SNR

SE

R

defect length 50 bits, attenuation alpha=0.5Perp. channel, NPV=[4,7,1], UBD=1.1, jitter=90%, RS-less Iterative Architecture

RS-less IterativeSOVA, RS(t=24)SPC 60/61, RS(t=24)


• RS-less iterative code perform poorly with media defects

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Remarks on RS-less Iterative Architecture

• Pros– Don’t need to worry about compatibility with outer RS ECC– Larger SNR gains compared to RS-plus iterative

architecture in random noise environment

• Cons– Poor performance with media defects– No reliable analytical techniques to predict system error

rate. Some progress have been achieved (e.g. work of Richardson & Urbanke), but the behavior of iterative decoder is still not fully understood.

– Decoder area tend to be significantly larger and more power hungry compared to RS-plus iterative architecture

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Concluding Remarks

• RS-plus iterative code seems to be more attractive for iterative architecture début: strong outer RS code makes the system less sensitive to media defects and other non-standard noise sources.

• Well designed RS-plus architecture outperforms state of the art non-iterative detector in random noise as well as media defect dominated environment.

• More research is necessary for RS-less architecture before it can be incorporated into the product.

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