THIRD GENERATION IMAGE

SENSORS: OPPORTUNITIES AND

CHALLENGES

Orit Skorka and Dileepan JosephUniversity of Alberta

Edmonton, AB, Canada

Electrochemical Society Meeting, 2012

Seattle, WA, USA

2

Outline

Introduction CCD and CMOS Sensors VI-CMOS Image Sensors Opportunities and Challenges Conclusion

3 Introduction

4

Introduction

Applications for electronic image sensors are diverse and cover the entire spectrum from γ-rays to THz.

Examples include: machine vision, medical imaging, space research, and consumer-use cameras.

T. Suzuki, the Vice-President of Sony, has said (2010) “In developing the CMOS image sensor, the goal is exceeding human vision.” It remains a challenge!

Vertically-integrated (VI) CMOS digital pixel sensor (DPS) technology presents an opportunity to define the next generation of electronic image sensors.

5 CCD and CMOS Sensors

6

CCD and CMOS Sensors

Taken from Frost & Sullivan, World Image Sensor Market,

2008.

Year Revenues ($ billion) CCD (%) CMOS APS (%)2007 2.91 51.2 48.82012 4.72 43.8 56.22014 5.67 41.2 58.8

Application diversity is increasing, where digital still cameras make the largest end-user market.

Mobile communications, medical imaging, optical mice, video conferencing, toy games, and biometrics also have significant market shares.

7

CCD and CMOS Sensors

The 1st generation of image sensors used charge coupled device (CCD) technology.

CCD inventors were granted the 2009 Nobel Prize in Physics.

CCDs dominated the market for 3 decades thanks to: high resolution; low noise.

Willard Boyle and George Smith invented CCDs in

1969. Photo: Alcatel-Lucent/Bell Labs,

1974.

8

CCD and CMOS Sensors

Eric Fossum invented the CMOS APS in 1994.

Photo: Amy Etra/BusinessWeek, 2011.

2nd generation image sensors used CMOS active pixel sensor (APS) technology.

It was developed at NASA’s Jet Propulsion Laboratory.

Dominated low-power imaging thanks to: On-chip integration with

CMOS devices; Simple supply system.

9 VI-CMOS Image Sensors

10

VI-CMOS Image Sensors

Dual-trend roadmap of the

ITRS, 2010.

“More Moore”: Focuses on device

miniaturization; Concerns digital circuits.

“More than Moore”: Focuses on 3D ICs; Concerns heterogeneous

microsystems. Image sensors include

photodetectors, analog circuits, and digital circuits.

11

VI-CMOS Image Sensors

Yole Développment expects a rapid growth in 3D integration based on through-silicon vias (TSVs).

They forecast a significant portion of the market to be devoted to CMOS image sensors.

12

VI-CMOS Image Sensors

Logarithmic VI-CMOS APS array, designed and

tested at the UofA.Skorka and Joseph, Sensors,

2011.

Our prototype (called “Sensor 25” later) is composed of: Standard CMOS die (0.8

μm) with APS array; Custom glass die with

photodetector array. It is assembled by flip-

chip bonding. Each pixel has a bond

pad in both arrays.

13 Opportunities and Challenges

14

Opportunities and Challenges

Dynamic range (DR) and dark limit (DL) are the most limiting factors of modern image sensors.

Sensor 25 demonstrates wide DR and low DL.

Sensors 1–24 taken from Skorka and Joseph, Journal of

Electronic Imaging, 2011.

15

Opportunities and Challenges

Sensor 25 CCD (20 × 24) Sensor 25Technology VI-CMOS APS

Response logarithmic

A/D conversion board level

Frame size 20 × 24

Frame rate 70 Hz

Pixel pitch [µm] 110

Fill factor 100%

PSNDR [dB] 18

DL [cd/m2] 0.016

DR [dB] 114

CCD image is downsampled to match

Sensor 25 pitch. Peak signal-to-noise-and-

distortion ratio (PSNDR) measures image quality.

16

Opportunities and Challenges

With CCDs, analog-to-digital (A/D) conversion must be done at board level and, with CMOS APS, it may be done either at chip or column level.

To overcome low PSNDR with logarithmic sensors, it is preferable to have A/D conversion at pixel level because digital data is more robust to noise.

A new image sensor with a VI-CMOS DPS array (0.18 μm process) is being designed at the UofA.

At Stanford, El Gamal also believes digital pixels are inevitable to improve the performance of CMOS image sensors. He works on linear sensors.

17

Opportunities and Challenges

Each pixel has a ΔΣ A/D converter (ADC), including decimator.

ΔΣ ADCs are ideal for low-bandwidth and high bit-resolution applications, such as digital audio.

The design is based on the patent-pending work of Mahmoodi and Joseph.

Layout of a digital pixel in our recent design of a logarithmic VI-CMOS

DPS array.

18

Opportunities and Challenges

Though still too large for optical imaging, pixel size is competitive for lens-less imaging, as with medical X-rays.

Using lower dose, VI-CMOS DPS technology may enable video rate X-ray imaging of soft and dense tissues simultaneously, given further research.

Response of the in-pixel ΔΣ ADC.

19 Conclusion

20

Conclusion

The global image sensor market is not only growing quickly but also diversifying substantially.

The semiconductor industry sees 3D integration as an important part of its dual-trend roadmap. It facilitates heterogeneous microsystems like image sensors.

VI-CMOS DPS technology is expected to significantly extend the design space of image sensors, which may lead to a 3rd generation (revolutionary change).

The technology will benefit invisible-band imaging in the short term, and optical imaging in the long term, e.g., to exceed human vision in all respects.

21

Acknowledgements

We are grateful to our longtime sponsors:NSERC;Alberta Innovates –

Technology Futures;CMC Microsystems;TEC Edmonton.We also thank Dr. Mark Alexiuk and IMRIS.

Left to right: Orit Skorka, Jing Li, and Dileepan

Joseph at the UofA, 2011.