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Operating Systems and Computer Networks
Process Scheduling Part 2
Prof. Dr.-Ing. Axel HungerAlexander Maxeiner, M.Sc.
Institute of Computer EngineeringFaculty of Engineering
University Duisburg-Essen
Dr.-Ing. Pascal A. Klein & Alexander Maxeiner M.Sc.
Alexander Maxeiner, M.Sc.University Duisburg-Essen
2Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Scheduler Algorithms
Alexander Maxeiner, M.Sc.University Duisburg-Essen
3Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Look back at last lecture:
Computer capable of multitasking need to organize and schedule tasks in advance.
Multitasking increases overall CPU efficiency according to the following formula:
CPU utilization = 1 – pn
Overall CPU utilization is shared among available tasks.
To maintain high efficiency tasks need to be observed and replaced should a memory access occur.
Summary of previous lecture I
Alexander Maxeiner, M.Sc.University Duisburg-Essen
4Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Advantages of processing multiple tasks simultaneously:
Completion of multiple tasks takes less time than completion by sequential execution.
Reduced idle times within CPU.
Decrease of pipeline problems at the main bus. While one tasks is executed other tasks can be loaded into the cache.
Disadvantages of processing multiple tasks simultaneously:
Increased cache demands.
Individual tasks take longer until completion.
Summary of previous lecture II
Alexander Maxeiner, M.Sc.University Duisburg-Essen
5Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Multiprogramming requires planning a sequence of tasks in advance.
We differentiate between long term and short term planning.
Long term planning involves the merger of several jobs into batches, and general sequence of complex procedures.
Short term planning handles the sequence of instructions at the lower level i.e. before a context switch.
A dispatcher executes the context switches and handles the change of references within the memory and CPU.
Scheduling
Alexander Maxeiner, M.Sc.University Duisburg-Essen
6Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
During the analysis of scheduling algorithm the turnaround time and the waiting time are most relevant.
Waiting time of a process is defined as:
𝑡𝑤𝑎𝑖𝑡 = time until the execution of a process is started.
Turnaround time of a process is defined as:
𝑡𝑡𝑢𝑟𝑛 = time until the execution of a process is finished.
The time it takes to execute a process will be defined as 𝑡𝑒𝑥 .
Execution times
Alexander Maxeiner, M.Sc.University Duisburg-Essen
7Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
The sequence of jobs is usually decided on the grounds of predefined algorithms.
On the higher complex operations within an operating system decide which jobs should be prioritized.
On the lower level the algorithms need to be simpler in structure to evade hardware and memory demands.
Examples include:
– First come, first serve
– Shortest job first
– Priority scheduling
– Round robin scheduling
Algorithms
Alexander Maxeiner, M.Sc.University Duisburg-Essen
8Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
This algorithm sorts the tasks according to its arrival time at the CPU.
In case of equal arrival times (i.e. a batch of processes) the tasks will be executed according to their entry in the process table.
New processes arriving at the CPU before the previous batch is finished will be added to the end of the queue.
Rescheduling may happen after each finished process or after a sequence of processes.
First come, first serve
Alexander Maxeiner, M.Sc.University Duisburg-Essen
9Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
First process that arrives the scheduler will be the next in line no Interrupts
Example:
• P1: 𝑡𝑒𝑥,1 = 300 ms waiting period 0 ms
• P2: 𝑡𝑒𝑥,2 = 40 ms waiting period 300 ms
• P3: 𝑡𝑒𝑥,3 = 32 ms waiting period 340 ms
Example: First Come, First Serve
Average Waiting Time:(0 + 300 + 340) / 3
= 640 / 3= 213.3 ms
Min Average Waiting Time:P3, P2, P1 (0 + 32 + 72) / 3 = 104 / 3= 34.67 ms
0
P1 (300ms)
P2(40ms)
300 340 372
P3(32ms)
P1 (300ms)
P2(40ms)
0 3727232
P3(32ms)
Alexander Maxeiner, M.Sc.University Duisburg-Essen
10Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
First process that arrives the scheduler will be the next in line no Interrupts
Example:
• P1: 𝑡𝑒𝑥,1 = 300 ms waiting period 0 ms
• P2: 𝑡𝑒𝑥,2 = 40 ms waiting period 300 ms
• P3: 𝑡𝑒𝑥,3 = 32 ms waiting period 340 ms
Example: First Come, First Serve
0
P1 (300ms)
P2(40ms)
300 340 372
P3(32ms)
P1 (300ms)
P2(40ms)
0 3727232
P3(32ms)
Average Turnaround Time:(300 + 340 + 372) / 3
= 1012 / 3= 337.3 ms
Min Average Turnaround Time:P3, P2, P1 (32 + 72 + 372) / 3 = 476 / 3= 158.67 ms
Alexander Maxeiner, M.Sc.University Duisburg-Essen
11Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At fixed intervals all jobs in queue will be analyzed according their estimated runtime.
Then a sequence table is initialized sorting all by increasing runtimes.
New processes arriving at the CPU before the previous batch is finished will be added to the queue at the fixed intervals.
Any process with a shorter runtime than an already sequenced process will have a preferred position within the queue.
More complex jobs take longer if frequent rescheduling with shorter jobs happens.
Complications in Short-term planning, since next block computation time usually not known.
Shortest job first
Alexander Maxeiner, M.Sc.University Duisburg-Essen
12Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Example: Shortest Job First I
Assumption: Time required for next block is known, arrival ~simultaneously
P1: 𝑡𝑒𝑥,1 = 8 ms
P2: 𝑡𝑒𝑥,2 = 4 ms
P3: 𝑡𝑒𝑥,3 = 9 ms
P4: 𝑡𝑒𝑥,4 = 5 ms
Average Waiting Time:[0 + 4 + 9 + 17] / 4
= 30 / 4= 7.5 ms
0 5 10 15 20 25 30
Arrival:(8)
(4)
(9)
(5)
P2 (4ms) P1 (8ms)P4 (5ms) P3 (9ms)
P1
P2
P3
P4
Alexander Maxeiner, M.Sc.University Duisburg-Essen
13Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Example: Shortest Job First II
Assumption: Time required for next block is known, Interrupt at new arrival
P1: 𝑡𝑒𝑥,1 = 8 ms, arrival time: 0ms
P2: 𝑡𝑒𝑥,2 = 4 ms, arrival time: 1ms
P3: 𝑡𝑒𝑥,3 = 9 ms, arrival time: 2ms
P4: 𝑡𝑒𝑥,4 = 5 ms, arrival time: 3ms
Average Waiting Time:[0 + 0 + (5-3) + (10-1) + (17-2)] / 4
= 26 / 4= 6.5 ms
0 5 10 15 20 25 30
Arrival:
0
1
2
3
8
(8)
5
(4)
11
(9)
8
(5)
P1 (1ms) P2 (4ms) P1 (7ms)P4 (5ms) P3 (9ms)
P1
P2
P3
P4
Alexander Maxeiner, M.Sc.University Duisburg-Essen
14Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Example: Shortest Job First III
Assumption: Time required for next block is known, non-preemptive
P1: 𝑡𝑒𝑥,1 = 8 ms, arrival time: 0ms
P2: 𝑡𝑒𝑥,2 = 4 ms, arrival time: 1ms
P3: 𝑡𝑒𝑥,3 = 9 ms, arrival time: 2ms
P4: 𝑡𝑒𝑥,4 = 5 ms, arrival time: 3ms
Average Waiting Time:[0 + (8-1) + (12-3) + (17-2)] / 4
= 26 / 4= 7.75 ms
FCFS: (0 + 7 + 10 + 18) / 4= 8.75 ms
0 5 10 15 20 25 30
Arrival:
0
1
2
3
8
(8)
5
(4)
11
(9)
8
(5)
P1
P2
P3
P4
P1 (8ms) P2 (4ms) P4 (5ms)P3 (9ms)FCFS
P1 (8ms) P2 (4ms) P4 (5ms) P3 (9ms)SJF
Alexander Maxeiner, M.Sc.University Duisburg-Essen
15Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Sorts processes according to their priority starting with the highest priority
If another process with higher priority arrives Sending an interrupt to the CPU active task is replaced by the new one
Problem: Low-priority processes will wait a long time if constantly interrupted by higher priority processes
Solution: Increasing priority of waiting task or make the scheduling of a task list non-preemptive.
Scheduler: Priority Scheduling
Alexander Maxeiner, M.Sc.University Duisburg-Essen
16Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Example: Priority scheduling
Assumption: Tasks with fixed priorities, interrupt at arrival, Priority 0 ≜ highest
P1: 𝑡𝑒𝑥,1 = 8 ms, 𝑡𝑎𝑟𝑟𝑖𝑣𝑎𝑙,1 = 0ms, Priority: 3
P2: 𝑡𝑒𝑥,2 = 4 ms, 𝑡𝑎𝑟𝑟𝑖𝑣𝑎𝑙,2 = 1ms, Priority: 1
P3: 𝑡𝑒𝑥,3 = 9 ms, 𝑡𝑎𝑟𝑟𝑖𝑣𝑎𝑙,3 = 2ms, Priority: 0
P4: 𝑡𝑒𝑥,4 = 5 ms, 𝑡𝑎𝑟𝑟𝑖𝑣𝑎𝑙,4 = 3ms, Priority: 4
Average Waiting Time:[0 + 0 + 0 + (11-1) + (13-0) + (21-4)] / 4
= 40 / 4= 10 ms
0 5 10 15 20 25 30
Arrival:
0
1
2
3
8
(8)
5
(4)
11
(9)
8
(5)
P1
P2
P3
P4
P1 (1ms)
P2 (1ms)
P4 (5ms)P3 (9ms)Priority Scheduling
P2 (3ms) P1 (7ms)
Alexander Maxeiner, M.Sc.University Duisburg-Essen
17Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Round robin scheduling algorithm gives every task a fixed quantum of time before swapping to another process.
Sequence of tasks depends on the sequence in the process table.
New tasks are added to the end of the table.
Context changes happen at the end of each quantum, no matter if the task is already finished.
Scheduler: Round Robin
Alexander Maxeiner, M.Sc.University Duisburg-Essen
18Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Switches between tasks after fixed interval of time
Guarantees fair amount of time
Problems: time waste due to change of processes Completion time of long runtime processes (more active tasks, higher completion time)
Example: Round-robin
0 5 10 15 20 25 30
Arrival:
0
1
2
3
8
(8)
5
(4)
11
(9)
8
(5)
P1
P2
P3
P4
P1
P2
P1
P2
P1
P3
P2
P1
P3P4
P2
P1
P3
P4
P1
P3
P4
P1
P3
P4
P1
P3
P4
P3 P3 P3
Alexander Maxeiner, M.Sc.University Duisburg-Essen
19Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Time sharing as background job (RR) plus Interrupt on demand based on priorities
Within a priority level, the allocation shall be made according to RR
After an appropriate waiting time processes can move up in priority – Aging
Scheduler: Combination of
several allocation levels
Alexander Maxeiner, M.Sc.University Duisburg-Essen
20Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Two Processors: I & II
5 processes have to be handled
Scheduling: Priority Scheduling A running process will be interrupted if another process with higher priority arrives
If one of the CPUs is unoccupied and a higher priority task needs to be scheduled Free Core will be assigned to the task
Priorities and Arrival times for P1..P5:
• Priority 1: P2 (t=0, τ = 7 ms)
• Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)
• Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Example
Alexander Maxeiner, M.Sc.University Duisburg-Essen
21Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
Example
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Processor IP1
Processor IIP2
Alexander Maxeiner, M.Sc.University Duisburg-Essen
22Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
At t=1ms P3 arrives:
• Priority P3 > P2
• P2 will be interrupted by P3 (on Processor II)
Example
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Processor IP1
Processor IIP2P3
Alexander Maxeiner, M.Sc.University Duisburg-Essen
23Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both Processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
At t=1ms P3 arrives:
• Priority P3 > P2
• P2 will be interrupted by P3 (on Processor II)
Example
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Processor IP1
Processor IIP2P3
Alexander Maxeiner, M.Sc.University Duisburg-Essen
24Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both Processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
At t=1ms P3 arrives:
• Priority P3 > P2
• P2 will be interrupted by P3 (on Processor II)
• P2 continues (on Processor I) after P1 finished
Example
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Processor IP1P2
Processor IIP2P3
Alexander Maxeiner, M.Sc.University Duisburg-Essen
25Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both Processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
At t=1ms P3 arrives:
• Priority P3 > P2
• P2 will be interrupted by P3 (on Processor II)
• P2 continues (on Processor I) after P1 finished
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2
Processor IIP2P3
Alexander Maxeiner, M.Sc.University Duisburg-Essen
26Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=5ms P4 arrives
• Priority P4 > P1 > P2
• Priority P3 > P2
• P2 will be interrupted by P4 (on Processor I)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3
Alexander Maxeiner, M.Sc.University Duisburg-Essen
27Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
28Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
29Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
30Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
31Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
32Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
33Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
34Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
35Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5
Alexander Maxeiner, M.Sc.University Duisburg-Essen
36Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Alexander Maxeiner, M.Sc.University Duisburg-Essen
37Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
P3 finished, Processor I unoccupied
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Alexander Maxeiner, M.Sc.University Duisburg-Essen
38Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
P3 finished, Processor I unoccupied
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Alexander Maxeiner, M.Sc.University Duisburg-Essen
39Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
P3 finished, Processor I unoccupied
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Alexander Maxeiner, M.Sc.University Duisburg-Essen
40Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
P3 finished, Processor I unoccupied
P2 finished, Processor II unoccupied
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Alexander Maxeiner, M.Sc.University Duisburg-Essen
41Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Questions?
Alexander Maxeiner, M.Sc.University Duisburg-Essen
42Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Tanenbaum, Andrew S., “Modern Operating Systems”, 3rd edition, Pearson Education Inc, Amsterdam, Netherlands, 2008.
Tanenbaum, Andrew S., “Moderne Bertriebssysteme”, 3rd edition, Pearson Education Inc, Amsterdam, Netherlands, 2009.
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