operational ampliﬁers chapter 2 - mcgill universitygrober4/pdfs/ecse330/2. op amp...op amp...

© 2009 G. W. Roberts Op Amp Circuits, slide 1

304-330 Introduction To Electronic Circuits

Operational Amplifiers Chapter 2



Outline•  The Ideal Op Amp•  The Inverting Configuration•  The Noninverting Configuration•  Difference Amplifiers•  Integrators and Differentiators•  DC Imperfections•  Effects of Finite Open-Loop Gain and Bandwidth

on Circuit Performance•  Large-Signal Operation of Op Amps•  Simulating Op Amp Circuits With SPICE•  Summary



The Universal Analog Building Block: Main Terminals

The op amp shown connected to dc power supplies (with noise decoupling capacitors).

€

C

€

C

(C)

The Op Amp Symbol

Three terminals shown plus power supply connections. Op amps have other terminals that is used to tuned

its non-ideal behavior.



Electrical Equivalent Op Amp Circuit

•  Input/Output Impedance:

=

€

Zin− =

v1

i1= ∞ Zin

+ =v2

i2= ∞ Zout =

voio v1 −v2 =K

io = ix

= 0

Output impedance is derived by setting the input sources to some constant value, and a current into the output port and deriving the corresponding output voltage.

vout= f v1,v2( )



Electrical Equivalent Op Amp Circuit

•  One output, two inputs:

–  If circuit is linear, then

=

€

vout = f v1,v2( )

€

vout = A2v2 + A1v1

€

A1v1 + A2v2



Equivalent Signal Representation:CM and DM Signals

•  Any two node voltages (relative to analog ground) can be expressed as a linear combination of their corresponding DM & CM signal components.

€

v1 = vI ,cm −vI ,d2

v2 = vI ,cm +vI ,d2

v1

v2

Node voltages:

Solving For CM & DM signals:

€

vI ,cm =v1 + v22

vI ,d = v2 − v1



Creating The Differential Source Arrangement

•  Op Amp circuits must be driven with the source arrangement shown here.

€

A1v1 + A2v2




•  By design, A1= -A2 = A:

vout =A2v2 +A1v1 v1=vI ,cm−vI ,d 2v2=vI ,cm+vI ,d 2

= A1+A2( )vI ,cm +12A1−A2( )vI ,d

€

vout = 0 ⋅vI ,cm + A1 ⋅vI ,d = A v2 − v1( )

Amplification depends only on the DM signal and not the CM signal

€

A1v1 + A2v2




€

vout = 0 ⋅vI ,cm + A2 ⋅vI ,d = A2 v2 − v1( )

Amplification depends only on the DM and not the CM signal: A 2-input system becomes a 1-input system.

€

A1v1 + A2v2

€

vout = A1v1 + A2v2= A1 vI ,cm − vI ,d 2( ) + A2 vI ,cm + vI ,d 2( )

= A1 + A2( )vI ,cm +12A2 − A1( )vI ,d

By design, A1= -A2 :



Op Amp Internal Architecture•  Example: Calculate the output

voltage as a function of the input v1 and v2 using the following parameters:

•  Solution: €

Gm = 10mAV, R = 10 kΩ, µ = 100

€

A1 =vov1 v2 =0

= −µGmR = −104 VV

A2 =vov2 v1 =0

= µGmR = 104 VV

€

∴vO = 104 v2 − v1( ) VV



A1v1 + A2v2

Common-Mode Rejection Ratio CMRR Measure Of Gain Balance

•  In practice, achieving balanced gains A1=-A2 is difficult.

•  Define the gains

•  A m e a s u r e o f t h e g a i n imbalance can be described as

Design Goal:

CMRR ≡ AdAcm

We want large CMRR (Ad>>Acm) for 2 input system to become a 1

input system.

€

vout = A1 + A2( )vI ,cm +12A2 − A1( )vI ,d

€

vout = AcmvI ,cm + AdvI ,d

Acm = A1 + A2 Ad =A2 − A1

2

where



CMRR Example•  The gain from the + and –

input terminals of the op amp was found to be

•  What is the CM and DM gains? Write an equation describing the input-output behavior and compute the CMRR.

Solution:

A1v1 + A2v2

€

A1 = −10,000 VV

A2 = +10,500 VV

€

Acm = A1 + A2 = −10,000 +10,500 = 500 VV

Ad =12A2 − A1( ) =

12

10,500 +10,000( ) = 10,250 VV

€

vout = −10,000 ⋅v1 +10,500 ⋅v2 or

vout = 500 ⋅vI ,cm +10,250 ⋅vI ,d

CMRR =10,250

500= 20.5



The Inverting Configuration•  Op amps are not used on their own; rather, they

are used in some form of feedback arrangement.

R1 & R2 close feedback around op amp



Analysis Of The Inverting Configuration

•  According to op amp behavior:

•  By KCL at the negative input terminal of op amp we can write:

•  Feedback structure:

€

vo = −Av1

€

vI − v1R1

+vO − v1R2

= 0

⇒ v1 =R2

R1 + R2vI +

R1R1 + R2

vO

€

R1R1 + R2

€

−A+

€

R2R1 + R2

€

vI

€

vOv1



Analysis Of The Inverting Configuration

•  Solv ing fo r input -output transfer function:

•  In the limit, as A -> ∞, we write

•  Also note that in the limit we have a virtual short to ground,

€

G =vOvI

=−R2 R1

1+ 1+ R2 R1( ) A

€

G =vOvI

= −R2R1

€

v2 − v1 =vOA A→∞

= 0



Quick Ideal Analysis Of Op Amp Circuits

•  Using the virtual short concept, we can rapidly derive the input-output transfer function of op amp circuits.–  C i r c l e d n u m b e r s

i n d i c a t e a n a l y s i s sequence.

•  Note that the virtual short concept arrives because of the negative feedback principle; it is not a function of the op amp itself.



Accounting For Finite Open Loop Gain

•  Direct circuit analysis reveals

•  Solving, we write

€

G =vOvI

=−R2 R1

1+ 1+ R2 R1( ) A

€

v1 = −vOA

(1)

i1 =vI − −vO A( )

R1(2)

i2 = i1 (3)

vO = −vOA−R2R1

vI +vOA

# $ %

& ' (

(4)•  As long as

the open loop gain has little effect on the closed loop gain and we get

€

1+ R2 R1( ) A << 1

€

G ≈ −R2 R1



Why Construct Amplifiers Using Amplifiers?

•  Op amps (an amplifier) are used to construct other amplifiers as this arrangement provides a level of manufacturing robustness that is needed for mass production.–  This is an example of

negative feedback.Amplifier (op amp)

Amplifier



Example: Open Loop Gain Dependence

•  Let us investigate the relative CL gain error for the inverting amplifier as a function of op amp gain:

€

ε =Gactual − Gideal

Gideal

×100%

A |Gideal| |Gactual| ε v-

103 100 90.83 -9.17% -9.08 mV104 100 99.00 -1.00% -0.99 mV105 100 99.90 -0.10% -0.10 mV∞ 100 100 0% 0

€

R1 = 1 kΩ

€

R1 = 100 kΩ

€

v −



Example: Open Loop Gain Dependence

This example illustrates how robust the closed loop amplifier gain is to changes in the op amp gain.

A |Gactual|A 105 99.90

A-A/2 105-105/2 99.80Δ -105/2 -0.1% -50% -0.1%

€

R1 = 1 kΩ

€

R1 = 100 kΩ

€

v −

A -50% change in op amp gain lead to relatively small change -0.1% in the closed loop gain.



Input / Output Resistance

€

Rin =vIi1

=vI

vI R1= R1

€

Rout = vO ix= 0

With vI=0, v2-v1=0, vo= A(v2-v1)=0 then

€

Rout = 0ix

= 0



Example: Inverting AmplifierCalculate the currents in the op amp circuit shown to the right assuming the circuit is driven by a 1 V source.Solution:

€

v1 = 0 V

i1 = 1 V1 kΩ = 1 mA

i2 = i1 = 1 mAvO = −i2 ×10 kΩ = −10 V

iL = −10 V1 kΩ = −10 mA

iO = iL − i2 = −10 mA−1 mA = −11 mA

vovI

=−10 V

1 V= −10 V

V iL

i1=−10 mA

1 mA= −10 A

A PL

PI=−10 V( ) −10 mA( )

1 V( ) 1 mA( )= 100 mW

mW

Note the op amp output current; comes from supplies.



Design An Amplifier For A Microphone Application

•  Provide a simple electrical model of a microphone assuming the source impedance is 1 MΩ:



Design An Amplifier For A Microphone Application

•  Select the values of the feedback resistors so that the magnitude of the gain is 100 V/V:



Large Resistor Values•  Resistor values larger than 10

MΩ are impractical.•  Must select resistors values from

a standard set for cost reasons:–  see EIA (Electronic Industries

Associat ion) STANDARD RESISTOR VALUES listings.

•  Resistors are not made exact, they are made within a tolerance (0.1%, 1%, 5%, 10% and 20%)–  The smaller the tolerance, the

greater the cost.



Creating Resistors With Precise Values

•  When precise resistor values are required, we connect in series or parallel, standard low cost components.

series/parallel combination



Can You Design an Amplifier With A Gain Magnitude of 100 V/V Using

Small Resistor Values? •  Student Solution:

•  What is the cost of this design versus the previous design with a large resistor value?−  Assume each op amp cost $5 and resistors cost $0.5 each.



High Input Impedance With Small Feedback Resistors

•  In some sensor applications, amplification is required but the amplifier must have a large input resistance (say 1 MΩ).

•  This, in turn, causes the feedback resistors to be impractical or unrealizable if the gain is 10 or greater, i.e.,

•  Need a new design.

€

Rin = R1

€

G = −R2R1

€

R2 = G × Rin




•  As the input resistance is established by R1, the design choices for the feedback resistance becomes

€

Rin = R1

€

G = −R2R1

1+R4R2

+R4R3

#

$ %

&

' (

€

R2 1+R4R2

+R4R3

"

# $

%

& ' = G × Rin




•  Reducing the number of degrees of freedom, select:

•  This results in the following for the remaining resistor:

•  Here we see R3 is less than that required by the input resistance condition.

€

R4 = R2 = R1 = Rin

€

R3 =Rin

G − 2



Current Amplifier WithFloating Load

•  A current amplifier pushes a current through the load resistor independent of the load resistance.

Load is floating: No terminals

connected to ground.

€

Rin = 0Rout = ∞

€

H =i4iI

= 1+R2R3

"

# $

%

& '



A Digital Calculator



An Analog Calculator



The Weighted Summer Circuit

€

vo = −Rf

R1v1 +

Rf

R2v2 + +

Rf

Rn

vn#

$ %

&

' (

•  A weighted summer is made possible by the virtual ground at the input of the op amp. –  Multiple currents are combined.



A Dual-Sign Weighted Summer

•  Cascading two multiple-inverter amplifiers enables the sign of the signal weight to be positive or negative depending on where the input is applied.€

vo =Ra

R1

Rc

Rb

v1 +Ra

R2

Rc

Rb

v2 −Rc

R3v3 −

Rc

R4v4



Assignment #2 (partial) •  Sedra/Smith:

–  2.5, 2.6, 2.8, 2.9, 2.12, 2.15, 2.20, 2.34, 2.41



The Noninverting ConfigurationInput is applied to + op amp terminal:

Circuit Analysis

€

vO = 1+R2R1

"

# $

%

& ' vI



The Noninverting ConfigurationKCL at – op amp terminals:

€

R1R1 + R2

€

−A+

€

1

€

vI

€

vO

€

−v1R1

+vO − v1R2

= 0⇒ v1 =R1

R1 + R2vO

€

v1

op amp behavior:

€

vO = −A v1 − vI( )

Feedback structure:



The Noninverting ConfigurationInput / Output Impedance

Input Impedance:

Output Impedance:

€

Rin = ∞

€

Rout = 0

€

Rin

€

Rout



Example: Noninverting AmplifierCalculate the currents in the op amp circuit shown to the right assuming the circuit is driven by a 1 V source.Solution:

€

v1 = vI = 1 ViI = 0 A

i1 = 1 V1 kΩ = 1 mA

i2 = i1 = 1 mAvO = 1 V + i2 × 9 kΩ = 10 V

iL = 10 V1 kΩ = 10 mA

iO = iL + i2 = 10 mA +1 mA =11 mA

vovI

=10 V1 V

= 10 VV

iLiI

=10 mA

0 A= ∞

AA

PLPI

=10 V( ) 10 mA( )

1 V( ) 0 A( )= ∞

mWmW



The Voltage Follower

•  The voltage follower circuit is a special case of the noninverting configuration; all of the output signal is feedback to the op amp input.

•  As the name implies, the voltage gain is unity.



Electronics To Aid Patient Care



Body Sensors For Medical Monitoring



ECG Heart Monitoring Transducers



Common-Mode Level Problem

•  The human body can charge up to static voltage levels as high as 15,000 volts by simply walking across a carpeted floor, or 5,000 volts by walking across a linoleum floor.

•  The potential difference between a charged human body and an object retaining an insignificant charge can range from a few hundred volts to as high as 30,000 volts.

•  To amplify body signals, one cannot use a straightforward amplifier approach.

~

± 10,000 V

10 mV

vIN

t 0

10,000 V

10 mV vo

t 0 VCC

VDD VDD

VDD << 10,000 V



Difference Amplifier

Difference amplifier is a combination of inverting and noninverting amplifier.

Inverting amplifier

Noninverting amplifier

Difference amplifier

€

vO1 = −R2R1vI1

€

vO2 = 1+R2R1

"

# $

%

& ' vI 2

vo =α vI 2 − vII( )



Analyzing The Difference Amplifier

•  Set vI2=0 and solve for output in terms of input vI1.

•  Set vI1=0 and solve for output in terms of input vI2.

€

vO1 = −R2R1vI1

€

vO2 = 1+R2R1

"

# $

%

& '

R4R3 + R4

"

# $

%

& ' vI 2

•  Using superposition, we can write:

€

vO = vO1 + vO2 = −R2R1vI1 + 1+

R2R1

#

$ %

&

' (

R4R3 + R4

#

$ %

&

' ( vI 2



Difference Amplifier With DM & CM Signals

€

vO = −R2R1vI1 + 1+

R2R1

#

$ %

&

' (

R4R3 + R4

#

$ %

&

' ( vI 2

€

vI1 = vI ,cm −vI ,d

2 and vI 2 = vI ,cm +

vI ,d

2

€

⇒ vO = −R2R1

vI ,cm −vI ,d2

$ % &

' ( ) + 1+

R2R1

$

% &

'

( )

R4R3 + R4

$

% &

'

( ) vI ,cm +

vI ,d2

$ % &

' ( )

∴vO = −R2R1

+ 1+R2R1

$

% &

'

( )

R4R3 + R4

$

% &

'

( )

+

, -

.

/ 0 vI ,cm +

12R2R1

+ 1+R2R1

$

% &

'

( )

R4R3 + R4

$

% &

'

( )

+

, -

.

/ 0 vI ,d



Goal Of A Difference Amplifier

•  The goal of a difference amplifier is to have Acm = 0 while producing a non-zero Ad.

•  This means the first term above must equate to 0, i.e.

€

vO = −R2R1

+ 1+R2R1

#

$ %

&

' (

R4R3 + R4

#

$ %

&

' (

)

* +

,

- . vI ,cm +

12R2R1

+ 1+R2R1

#

$ %

&

' (

R4R3 + R4

#

$ %

&

' (

)

* +

,

- . vI ,d

€

−R2R1

+ 1+R2R1

#

$ %

&

' (

R4R3 + R4

#

$ %

&

' ( = 0

⇒R2R1

= 1+R2R1

#

$ %

&

' (

R4R3 + R4

#

$ %

&

' (

∴R1R2

=R3R4

€

vO = 0 ⋅vI ,cm +R2R1vI ,d

•  Substituting back into the above equation we get:



Input Resistance Of Difference Amplifier

•  With R3=R1 and R4=R2, the input resistance is

•  The feedback resistor can be found form the gain

•  As before, a large voltage gain and a large input resistance signifies a large feedback resistor, which in turn limits its practicality.

•  Once again, we need a new circuit where the DM gain and input resistance is decoupled (Instrumentation Amplifier).

€

Rid = 2R1

€

R2 =12Rid ×G



Difference Amplifier With BufferBuffer (Av=1)

Difference amplifier has unity gain and provide difference

function only.

Adding buffers to front-end increases input resistance of diff. amp.



Instrumentation Amplifier First Step In Evolution

Noninverting amplifier provides high-impedance input and additional gain.

CM signal is also amplified making the diff amp work harder.

Difference amplifier has unity gain and provide difference

function only.



Instrumentation Amplifier Second Step In Evolution

•  Floating the shared resistor R1 eliminates any matching concerns associated with the front-end amplifiers.

Removing the GND connection

eliminates CM signal

component.



Instrumentation Amplifier Ideal Op Amp Analysis



Instrumentation Amplifier Design Goal

•  Typically, instrumentation amplifier is designed with all the gain in the front-end stage and the difference amplifier having a gain of unity.

€

R

€

R

€

R

€

R€

R

€

R

€

vO = 1+RR1

"

# $

%

& ' vId

=

€

vId = vI 2 − vI1

-

+ +

-




–  2.5, 2.6, 2.8, 2.9, 2.12, 2.15, 2.20, 2.34, 2.41–  2.44, 2.50, 2.51, 2.53, 2.60, 2.72, 2.74



The Inverting Configuration With General Impedances

•  Replacing R1 and R2 in the inverting amplifier with general impedance allows for the development of several other interesting amplifier structures.

€

Vo

VI

s( ) = −Z2 s( )Z1 s( )



Example

€

Vo

VI

s( ) = −Z2 s( )Z1 s( )

•  Consider the general form of the TF of the inverter:

•  If

•  then

Z1 s( )=R1 Z2 s( )=1

1R2+sC2

VoVI

s( )=−Z2 s( )Z1 s( )

=−

11R2+sC2

R1

=−R2 R1

1+sC2R2

⇒K =−R2 R1 ω3−dB =1

C2R2



The Inverting Integrator Time-Domain Description

•  Replacing Z1 and Z2 by R and 1/sC, respectively, leads to a very important circuit called the Miller Integrator.

•  This circuit has the ability to integrate an input signal.

Add vO(0-) term if nonzero.



The Inverting Integrator Frequency Domain Description

•  For physical frequencies, replace s by jω and write

•  The magnitude and phase can then be written as

or, in dB we write

€

Vo

VI

s( ) = −1sCR

→s= jω

Vo

VI

jω( ) = −1

jωCR

€

Vo

VI

jω( ) =1

ωCR ∠Vo

VI

jω( ) = +90

€

dB = 20log10Vo

VI

jω( ) = 20log101

ωCR

dB = 20log101CR

− 20log10ω

ω t =1CR



The Inverting Integrator Frequency Domain Description

•  We also see that a pole exists at DC, i.e.,

•  What does this mean in terms of the circuit?–  Feedback path opens on

account of the capacitor acts as an open circuit.

–  Op amp is operated in open loop, where the gain is assume infinite (ideal).

•  Circuit is not usable in its present form! must be fixed.

€

Vo

VI

s( ) = −1sCR

→s=0

Vo

VI

s( ) = ∞

- +

R

C

€

vO± vI

- +

R

€

vO± vI

DC Equivalent Model

Miller Integrator

Any input will experience infinite gain.

∞



Differential Equation Solver:The Analog Computer

•  Op amps circuits (even before the invention of transistors) were used to solve differential equations.



Differential Equation Solver:The Analog Computer

•  Can you see the application of the integrator in this circuit?

- +

C1

R1 - +

R5

R5 - +

C2

R4

R3 R2

€

x t( )

€

y t( )

€

αd2y t( )dt 2

+ βdy t( )dt

+ γy t( ) + ρdx t( )dt

= 0



The Miller Integrator With Damping•  Connecting a feedback resistor in parallel with

C can help to eliminate the effects of a pole at DC and the instabilities associated with it.

•  Consider the circuit transfer function:

•  A pole is now located at

•  A small value of RF places the pole at a large frequency, reducing the range of integrator operation; however, a large RF introduces a larger offset due to op amp offset and bias currents.–  Trade off between AC and DC operation.

€

Vo

VI

s( ) = −RF R

1+ sCRF

€

s = −1

CRF

ω0 1

€

RF R

€

Vo

VI

€

ω p =1

CRF€

ω t =1CR€

DC ∝ RF



Compare Ideal Vs Damped Integrator Operation

•  Physical frequencies larger than ωp will be correctly integrated by the damped integrator.

•  Frequencies less than ωp will be amplified, not integrated.

ω0

€

RF R

€

Vo

VI

€

ω p =1

CRF

ideal Int.

damped Int.

ω t =1CR



Integration Compare In Time Domain

Ideal Integrator

Damped Integrator

Step Input



Integration Compare In Time Domain

•  For error less than 1%, a damped integrator will correctly integrate a signal over a time span between 0 and CRF/10 seconds.

•  How does this result compare with the result we found in the frequency domain?

t vo

ideal Int.

damped Int.

τ I ,max =CRF10

about 1% error



The Op Amp Differentiator

•  Rearranging the position of the R and C changes the circuit to a differentiator.



The Op Amp Differentiator Frequency Domain Description

•  For physical frequencies, replace s by jω and write

•  The magnitude and phase can then be written as

or, in dB we write

€

Vo

VI

s( ) = −sCR →s= jω

Vo

VI

jω( ) = − jωCR

€

Vo

VI

jω( ) =ωCR ∠Vo

VI

jω( ) = −90

€

dB = 20log10Vo

VI

jω( ) = 20log10ωCR

dB = 20log10CR + 20log10ω

ω t =1CR




–  2.5, 2.6, 2.8, 2.9, 2.12, 2.15, 2.20, 2.34, 2.41–  2.44, 2.50, 2.51, 2.53, 2.60, 2.72, 2.74 –  2.79, 2.80, 2.85, 2.89



The Many Layers Of Analog DesignAmplifier Topology, Diff Gain & CM Gain

Slew-Rate, large-signal bandwidth

DC Offsets

3-dB Bandwidth (small-signal)

•  High-performance analog design is the result of correcting many small errors along the way.

Input Bias Currents

Large-signal opertion



Voltage Transfer Characteristic

+ - +

-

€

vO = VO,OFF

VDD

VSS

+ -

±

+-

VDD

VSS

€

vO = 0

−VOS

vId

VSS

VDD

vO

0,0

vI,max vI,min vId

VSS

VDD vO

0,0

vI,max vI,min

Ideal Nonideal

-VOS

Offset Present Removing Offset With Series V

Note sign change!

VO,OFF A

A

€

−VOS =VO,OFFA



Some Facts About Op Amp Offset Voltage

•  Over mass production, the offset is not fixed or constant, rather will vary over a range of values.–  It is a random variable and is not known before

manufacture.•  Offset is an important measurement of the repeatability of a

manufacturing process.

vId

VSS

VDD vO

0,0 measure



Op Amp Voltage Offset Model

•  The offset associated with an op amp is modeled with a voltage source VOS placed in series with the +ve terminal of the op-amp.

•  An external voltage source of –VOS can be used to cancel the effect of the offset.

+ -

±

VDD

VSS

€

vO = 0

VOS±

−VOS Actual Op Amp

Offset-Free Op Amp

+ -

vId

VSS

VDD vO

0,0 -VOS

VO,OFF

A



Impact Of Offsets On CL Circuit

•  The effect of offsets on the closed-loop circuit behavior can be derived using circuit analysis.–  Set the input equal to zero and calculate output behavior.

•  Here we see the offset is amplifier by the gain of the circuit; a 5 mV offset can be increase by a factor as large as 1000, resulting in an output of +5V.

vI

VSS

VDD

vO

0,0 -VOS

VO,OFF

CL Slope=(1+R2/R1)

OL Slope=A



Impact Of Offsets On CL Circuit

•  Input signal conditions are set by the system design and cannot be changed.

•  Offsets reduce the dynamic range of a circuit.–  In order to obtain a distortion less

sinusoidal signal (symmetrical swing), the input signal amplitude must be reduced to compensate for the shift in the output DC level.

vI

VSS

VDD

vO

0,0

VO,OFF

vO

t

t

vI



Offset Trimming•  Offsets can be removed by

trimming each and every op amp circuit.

•  One technique is to use the offset-nulling terminals of an op amp.

•  Typically, a potentiometer is connected across the offset-nulling terminals and tuned so that the output offset voltage is eliminated (set to zero).



Capacitively Coupled Circuit

•  Another approach in which to minimize the DC offset effect on a closed-loop circuit is to connect a capacitor in series with the input terminals.

•  At DC, the op amp circuit behaves as a unity gain follower, hence the offset does not experience any signal gain at the output.

•  The drawback of this approach is the noninverting amplifier takes on a high-pass response with the 3-dB break point located at 1/CR1.

–  Input signals must therefore be above this break frequency to prevent any unexpected attenuation.

VoVI

=sCR21+ sCR1



Input Bias Currents•  Due to the electronic nature

of an op amp, two separate currents are pulled (or pushed) into the op amp input terminals.–  These currents are

essential for the op amp operation; they cannot b e b l o c k e d b y a capacitor.

•  This is modeled by two current sources IB1 and IB2.



Input Bias Currents•  Op amp data sheets usually

specify the average value of these two bias currents as well as there expected difference:

Input bias current:

Input offset current:

€

IB =IB1 + IB 22

€

IOS = IB1 − IB 2



Calculating Bias Current Impact On Closed-Loop Operation

•  Analysis of the CL behavior reveals that the bias current creates a DC offset at the output given by

€

VO = IB1R2



Series Resistor Compensation

•  The effect of the DC bias current can be reduced by the addition of a series compensation resistor R3. –  R3 has no effect on the signal transfer function but lowers

the virtual ground level by -IB2xR3.

€

VO = −IB 2R3 + R2 IB1 − IB 2R3R1

#

$ %

&

' (

Add compensation

resistor



Series Resistor Compensation

•  Next, let us consider IB1 and IB2 are equal to the average bias current IB, we write

•  The offset voltage can be made to go to zero if and only if

€

VO = −IB 2R3 + R2 IB1 − IB 2R3R1

#

$ %

&

' (

IB1 = IB 2 = IB

⇒VO = IB −R3 + R2 −R2R3R1

#

$ %

&

' (

€

R3 =R1R2R1 + R2

•  The compensation resistor R3 should be set to the parallel equivalent of the DC resistance connect to the inverting input terminal.



Series Resistor Compensation•  Now, let us consider the the

impact of the di f ference between IB1 and IB2 are on the offset voltage, we write

•  Now with the previous result,

•  We obtain the offset voltage as

VO = −IB2R3 + R2 IB1 − IB2R3R1

⎛⎝⎜

⎞⎠⎟

IB1 = IB + I OS 2IB2 = IB − I OS 2

⇒VO = − IB − I OS 2( )R3 + IB + I OS 2( )R2 − IB − I OS 2( ) R2R3R1

€

R3 =R1R2R1 + R2

•  As IOS is generally quite small, we see that the resultant offset due to bias currents can be kept quite low.

€

VO = IOSR2



Bias Current Compensation Example

•  Decoupling a bias path eliminates the dependency of the offset on the resistance in that signal path.

•  Recall that a DC bias path is essential for op amp operation - be careful with C.

C blocks IB trough R1 C blocks IB trough R1



Effects Of Op Amp Offset Voltage On Miller Integrator Operation

•  An op amp offset excites the pole at DC and causes the output to build towards infinity.

•  Output will therefore saturate at VDD.



Effects Of Input Bias and Offset Currents On Miller Integrator Operation

•  Input bias current also excite the pole at DC causing the output to ramp towards VDD.




–  2.5, 2.6, 2.8, 2.9, 2.12, 2.15, 2.20, 2.34, 2.41,–  2.44, 2.50, 2.51, 2.53, 2.60, 2.72, 2.74, –  2.79, 2.80, 2.85, 2.89,–  2.98, 2.104, 2.106,



Transient / Frequency Response

+ - ± +

-

Step-Response

+ - ± +

-

Sinusoidal-Response

€

vO

€

ωo

Decay rate related to op amp parameters

€

vO

€

ω

€

ω3dB

€

A jω( )

3-dB BW related to op amp parameters

€

vO t( )

€

t



Response To A Sinusoidal Input

•  Linear system behavior can be measured through the application of a sinusoidal signal.–  If linear, only the amplitude and phase of the

sinusoidal signal will change as it passes through a system.

–  If nonlinear, the shape of the sinusoidal will change.»  We’ll return to this idea a bit later.

G(s) +

- ~ vi(t) vo(t)

Ain sin ωot +ϕ in( )

Aout sin ωot +ϕout( )A1 sin ωot +ϕout( )+ A2 sin 2ωot +ϕout( )+…

Aout sin ωot +ϕout( )



Frequency Response

•  As the input frequency changes, so too does the amplitude of the output signal.

•  The amplitude and phase of the output signal are related according to:

Ain = 1.0 V Fin = 1 kHZ Ain = 1.0 V Fin = 2 kHZ Ain = 1.0 V Fin = 3 kHZ Ain = 1.0 V Fin = 4 kHZ Ain = 1.0 V Fin = 5 kHZ

Aout = 1.0 V Fout = 1 kHZ Aout = 1.0 V Fout = 2 kHZ Aout = 0.7 V Fout = 3 kHZ Aout = 0.6 V Fout = 4 kHZ Aout = 0.5 V Fout = 5 kHZ

Aout = G s( ) s= jω Ain = G( jω) Ain

ϕout =ϕin +∠G s( ) s= jω =ϕin +∠G jω( )

G(s) +

- ~ vi(t) vo(t)



System Step Response

•  Electronic circuits are also designed with a desired step response in mind.

G(s) +

- ± u(t) vo(t)

vo(t) = L−1 L u t( )"# $%×L g t( )"# $%{ }= L−1 1s ×G s( )

'()

*+,



Frequency Description Of Op Amp Response

•  Due to op amp finite gain and bandwidth, the basic op amp circuits shown previously deviate from their expected or ideal behavior.

•  Depending on region of operation (i.e. frequencies) we can use different models of operation.

A(s) Vo Vi

+

-

ω0 ωb

1

AO

ωt

€

A s( ) =Vo

Vi

=AO

1+ sωb

€

A jω( ) = A s( )s= jω

=AO

1+ jωωb

A jω( ) ≈ AOωb

ω≡ωt

ω

€

A jω( ) = 1@ω ≈ω t



Piecewise Approximate Op Amp Frequency Response Behavior

A(s) Vo Vi

+

- ω

0 ωb 1

AO

ωt

A jω( ) =AO ω ≤ωb

AOωb

ωω >ωb

⎧

⎨⎪

⎩⎪

=AO ω ≤ωb

ω t

ωω >ωb

⎧

⎨⎪

⎩⎪

A jω( ) ≈ AOωb

ω≡ωt

ω

€

A jω( ) = 1@ω ≈ω t

A jω( ) ≈ AO for ω <ωb



Op Amp Equivalent CircuitOne Pole Model

A(s) Vo Vi

+

- = Vi

Vo

R

C AOVi

+

-

+

- ±

ω0

1

AO

€

Vo

Vi

€

ωb =1RC

€

ω t =AORC

€

A s( ) =Vo

Vi

=AO

1+ sωb

=AO

1+ sRC

A jω( ) ≈ AOωRC

for ω >>ωb

A jω( ) ≈ AO for ω <ωb

± v1

+

- v1



Frequency Response Of The 741 General Purpose Internally Compensated Op Amp

Op amps single-pole response have very little

3-dB bandwidth!

3-dB BW Unity-gain frequency

DC Gain

€

A s( ) =105

1+ s2π ×10



Frequency Response Of A Closed-Loop Amplifier

•  The frequency response behavior of an op amp will influence the circuit in which it is configured.–  The overall closed-loop effect will be different

depending on circuit configuration.

Inverting amplifier Noninverting amplifier €

vO1 = −R2R1vI1

€

vO2 = 1+R2R1

"

# $

%

& ' vI 2



Frequency Response Of A Inverting Amplifier

Recall from an earlier analysis,

Substituting

We will get

Now, for AO >> 1+ R2/R1, we write

€

VOVI

s( ) =−R2 R1

1+ 1+ R2 R1( ) A s( )

A s( )= AO1+s ωb

;ωt =AOωb

VOVI

s( )= −R2 R1

1+1+R2 R1( )

AO+s 1+R2 R1( )

AOωb

VOVI

s( )= −R2 R1

1+s 1+R2 R1( )

ωt

When compared to single-pole model,

We get the model parameters:€

Af s( ) =ADC

1+ s ω3−dB

€

ADC = −R2 R1

ω3−dB =ω t1+ R2 R1( )

ω0 1

ADC

w3-dB



Frequency Response Of A Noninverting Amplifier

Recall from an earlier analysis,

Substituting

We will get

Now, for AO >> 1+ R2/R1, we write

€

VOVI

s( ) =1+ R2 R1( )

1+ 1+ R2 R1( ) A s( )

VOVI

s( )=1+R2 R1( )

1+1+R2 R1( )

AO+s 1+R2 R1( )

AOωb

VOVI

s( )=1+R2 R1( )

1+s 1+R2 R1( )

ωt

When compared to single-pole model,

We get the model parameters:€

Af s( ) =ADC

1+ s ω3−dB

€

ADC =1+ R2 R1

ω3−dB =ω t1+ R2 R1( )

ω0 1

ADC

w3-dB

A s( )= AO1+s ωb

;ωt =AOωb



Frequency response of an amplifier with a nominal gain of +10 V/V.

Frequency Response Behavior Of Two Amplifiers In Closed Loop

Noninverting amplifier Inverting amplifier

€

ADC =1+ R2 R1

ω3−dB =ω t1+ R2 R1( )

€

ADC = −R2 R1

ω3−dB =ω t1+ R2 R1( )



Gain-BW Trade-off Rule

Unity-gain frequency

DC Gain 1

3-dB BW 1

DC Gain 1 x 3-dB BW 1 DC Gain 2 x 3-dB BW 2

DC Gain 2

3-dB BW 2



Closed-Loop Gain - BW Trade-Off(linear scale)

BW0 0 ω t

Gain ⋅BW =ω t

ω t10

Gain

110

100

ω t100



Op Amp Output DC Limits

•  Op amps, like all electronic devices operate over a range of input signals, then saturates or ceases to operate in the intended fashion.–  The output has both voltage and current limits.–  The user must stay below these limits if the expected

behavior is to be obtained.

DC Sweep Input DC Transfer Characteristic

+ - ± +

-

€

vO

VDD

VSS

vIN vIN vO,MIN

vO,MAX vO

0,0 vIN,max vIN,min

vO

IMIN

IMAX iO

0,0

vO,max

€

iOvO,min



Op Amp Input/Output DC Limits

•  As a simplified rule of thumb, the output voltage will saturate when the input exceeds the range given by

vIN ,min,vIN ,max{ } < VSSAo,VDDAo

⎧⎨⎩

⎫⎬⎭

vIN

VSS

VDD

vO

0,0 vIN,max

vIN,min Slope=Ao

DC Transfer Characteristic



741 Op Amp Input/Output Limits

•  The 741 op amp has a nominal DC gain of 105 V/V.•  For ±15 V supplies, the input limits are:

vI

-15 V

15 V

vO

0,0 vIN,max vIN,min

vIN ,min,vIN ,max{ } < −15105 , 15

105⎧⎨⎩

⎫⎬⎭= −150 µV,+150 µV{ }

Slope=Ao=105



Modeling Op-amp Large-Signal Operation

•  When op amps are used in a feedback configuration, the output op amp limits translate to the input terminals of the circuit.

•  Consider the -10 V/V inverting amplifier:–  Here the output is shown to saturate at ±13 V; –  The amp. input limits are therefore ±13 V / 10 = ±1.3 V.

+13V

−13V

+1



Hard-Limit Versus Soft-Limit

•  Op-amps generally have a soft-limiting behavior instead of a hard limit.

•  The soft limiting behavior causes a light amount of distortion at the output of an amplifier.–  More realistic.

vO,min

vO,max

vIN,max

vIN,min

vIN

vO

Hard Limit

vIN

vO

Soft Limit

vO,max

vIN,min

vO,min

vIN,max



Step Response Of Linear 1st-Order CL System

•  The step response of a linear system follows a predictable behavior set by the system poles and zeros.–  Doubling the input level, doubles the output

response.

vO,1(t) = 1− e−ω tt( ) ⋅V

vO,2 (t) = 1− e−ω tt( ) ⋅2V

V

0

2V

A(s) ≈ ω t

s



Step Response Of Actual 1st-Order CL System

•  When the input exceeds the system input limit, the output no longer follows the expected linear behavior.

•  Instead, one will observe that the output is constrained by

–  This maximum limit is called the amplifier slew-rate (SR).

dvO t( )dt

≤ SR

vO,1(t) = 1− e−ω tt( ) ⋅V

vO,2 (t) = 1− e−ω tt( ) ⋅2V

V

0

2V

vO t( ) ≈ SR ⋅ t

A(s) ≈ ω t

s



What Causes Slew-Rate Limiting?

•  If the input differential level exceeds some level, say VIN,max, then the following amplifier stage see a constant input level of VIN,max, regardless of other changes at the input.

•  The input maximum can be expressed in terms of two op amp parameters, ωt and SR, i.e.,

V

0

2V

VIN ,max =SRω t

vO,1(t) = 1− e−2π fbwt( ) ⋅V

vO t( ) ≈ SR ⋅ tVIN ,max

A(s) ≈ ω t

s

VIN ,max

−VIN ,max+

- +1



Large-Signal Sinusoidal Response

•  If then

Linear response

SR Limited response

1 fM

dvO t( )dt max

≤ SR ⇒ ddt

V̂ sin 2π fMt( )⎡⎣ ⎤⎦max

≤ SR

vIN t( ) = V̂ sin 2π fMt( ) vO t( ) =vIN t( ) , dvo t( )

dt max

≤ SR

triangle vIN t( )⎡⎣ ⎤⎦ , dvo t( )dt max

> SR

⎧

⎨

⎪⎪

⎩

⎪⎪

vO t( ) = V̂ sin 2π fMt( )

∴2π fM ⋅V̂ ≤ SR



Large-Signal Sinusoidal Response

•  For a sine wave input, we see the conditions for linear operation must satisfy the following

–  The larger the amplitude, the lower the frequency that can be applied to the amplifier input.

•  For a fixed amplitude, fM is called the full-power bandwidth.

Linear response

SR Limited response

1 fM

vIN t( ) = V̂ sin 2π fMt( ) vO t( ) =vIN t( ) 2π fM ⋅V̂ ≤ SR

triangle vIN t( )⎡⎣ ⎤⎦ 2π fM ⋅V̂ > SR

⎧⎨⎪

⎩⎪

2π fM ⋅V̂ ≤ SR



Output Voltage Level – Gain and BW Trade-Off

BW0 0 ω tω t10

Gai

n

1

10

100

ω t100

Gain ⋅BW =ω t



Max. Output Voltage Level, Gain and BW Trade-Off

BW0 0 ω tω t10

Gai

n

1

10

100

ω t100

Gain ⋅BW =ω t

Max

. Out

put V

olta

ge

Leve

l

V̂1

V̂100

V̂10

V̂ ⋅BW = SR



Maximum Input Condition

BW0 0 ω tω t10

ω t100

Gain ⋅BW =ω t

Max

. Inp

ut V

olta

ge

Leve

l

VIN ,max

V̂ ⋅BW = SRVIN ,max =

SRω t

When combined, one gets

Independent of frequency!




–  2.5, 2.6, 2.8, 2.9, 2.12, 2.15, 2.20, 2.34, 2.41,–  2.44, 2.50, 2.51, 2.53, 2.60, 2.72, 2.74, –  2.79, 2.80, 2.85, 2.89,–  2.98, 2.104, 2.106,–  2.107, 2.109, 2.112, 2.115, 2.119, 2.126



Op Amp Model(VCVS Model)

•  A SPICE simulation of any op amp circuit begins by replacing the op amp by the simple VCVC equivalent representation.

A(s) vo

+

- =

Aovi

+

- ± vo

+

- vi vi

+

-



Inverting Amplifier Example

•  Here a transfer function (.TF) analysis is requested.–  A .TF command determines the 2-port representation of

the circuit at DC.

Op Amp Circuit

SPICE Input Deck

Inverting Amplifier Configuration

** Circuit Description **

* signal sourceVi 3 0 DC 1v* inverting amplifier circuit descriptionR1 3 2 1kR2 2 1 10kEopamp 1 0 0 2 1e6

** Analysis Requests **.TF V(1) Vi

** Output Requests *** none required

.end

- +

1 kΩ

€

vO± vI

12

3

10 kΩ



Inverting Amplifier Example

.TF Analysis Output

vI 1 kΩ+

- ± vo +

- -10vi

Op Amp Circuit

- +

1 kΩ

€

vO± vI

12

3

10 kΩ



Subcircuits In SPICE

•  Subcircuits are used in SPICE to simplify coding.•  Subcircuits act as subroutines in SPICE.

Calling Statement In Main Routine

Subcircuit Description

Inverting Amplifier Configuration

** Circuit Description **

* signal sourceVi 3 0 DC 1v* inverting amplifier circuit descriptionR1 3 2 1kR2 2 1 10kXop 1 0 2 opamp

** Analysis Requests **.TF V(1) Vi

** Output Requests *** none required

.end

* op-amp subcircuit.subckt opamp 1 2 3* connections: | | |* output | |* +ve input |•  -ve input

Eoutput 1 0 2 3 1e6

.ends opamp



Op Amp Model(VCVS Model With Input and Output Loading Effects)

•  To account for op amp loading effects, we can add input and output resistances as shown above.

•  Input offset voltage effects can also be included in the model.

A(s) vo

+

- =

Aovi

+

- ± vo

+

- vi vi

+

- Rin

Rout - +

Voffset



Op Amp Model(Finite Bandwidth Model)

A(s) vo

+

- = v1

R

C Aovi

+

-

+

- ±

ω0

1

AO

€

Vo

Vi

€

ωb =1RC

€

ω t =AORC

€

A s( ) =Vo

Vi

=AO

1+ sωb

=AO

1+ sRC

€

A jω( ) ≈ AOωRC

for ω >>ωb

± vo +

- vi v1

vi

+

-



Subcircuit For BW Limited Op Amp

Subcircuit

Subcircuit Description

* op-amp subcircuit.subckt opamp 1 2 3* connections: | | |* output | |* +ve input |•  -ve input

E1 4 0 2 3 1e6E2 1 0 5 0 1R 4 5 1e3C 5 0 1e-6

.ends opamp

12

3

4 5

v1

1 kΩ

1 mF 106 vi

+

-

+

- ± ±

vo +

- vi v1



Op Amp Model(Finite Bandwidth & Output Limited)

A(s) vo

+

- =

v1

R

C Aovi

+

-

+

- ± ±

vo +

- vi v1

vi

+

-

± ±

1 Ω

vo,max

vi

vo,max vO

0,0

Ao

vo,max

-vo,max

−vo,maxAo

vo,maxAo

Ideal Diode (more next chapter)



Op Amp Model(Slew-Rate / BW Model)

A(s) vo

+

- = vi

+

-

v2

R

C Aov1

+

-

+

-± ±

vo

+

-vi

v2

± ±

1 Ω

vo,max

vi

vO

0,0

Ao

±v1

+

-vi

± ±

1 Ω

SR = Ao ⋅1RC

⋅ v1,max ⇒ v1,max = SR× R×CAo

=SR

Ao ×ωb

=SRωt

vo,max

vo,max

-vo,max

v1,max v1,max

−v1,maxv1,max



Assignment #2 (complete)•  Sedra/Smith:

–  2.5, 2.6, 2.8, 2.9, 2.12, 2.15, 2.20, 2.34, 2.41,–  2.44, 2.50, 2.51, 2.53, 2.60, 2.72, 2.74, –  2.79, 2.80, 2.85, 2.89,–  2.98, 2.104, 2.106,–  2.107, 2.109, 2.112, 2.115, 2.119, 2.126

•  Roberts/Sedra: –  2.5, 2.6, 2.7, 2.8, 2.9



Summary•  The op amp is a versatile circuit building block. It is

easy to apply and the performance of op amp circuits closely matches theoretical predictions.

•  The ideal op amp responds only to the difference input signal (v2-v1) and provides at the output w.r.t. ground a signal A(v2-v1), where A is the open loop gain.

•  Op amps circuit work because of negative feedback.

operational ampliﬁers chapter 2 - mcgill universitygrober4/pdfs/ecse330/2. op amp...op amp...

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