optimal+ gsa 2014
TRANSCRIPT
Michael Schuldenfrei, CTO
Leveraging Test Data for Quality
GSA Quality Team MeetingDecember, 2014
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The Need
Shifting from “Defects per Million” to “Defects per Billion”
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The Problem
No Problem Found32%
Fab Process28%
Test Program10%
Test Operation4%
Test Equipment26%
RMA Source
No Problem Found Fab Process Test Program Test Operation Test Equipment
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The Challenge
BIG DATA
EXPERTISE
COST
TIME
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Big Data – Device DNA
ECID
ECID
ECID
ECID
ECID
WATWS1WS2
WATWS1WS2
WATWS1WS2
WATWS1WS2WS3
WATWS1WS2WS3
FT1Burn in
FT2
Example: One package contains:5 dicex ~2 WS operations per diex ~1.2 iterations per operationx 3000 parametric measurements+ 1000 per-site WAT measurements+ 3000 FT measurements
A DNA consisting ~35K measurements!
An SLT lot with 5000 parts could have 150M historical measurements from hundreds of wafers & FT lots
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Back to Basics
THE QUALITY QUESTION;
IS “GOOD” REALLY GOOD?
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Outlier Detection GeographicParametric
Escape PreventionTest program issuesATE issues
Data Feed Forward (More intelligent decision making)
DriftSmart Pairing
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Quality Solutions
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Outlier Detection
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Outlier Detection – Algorithms
D-PAT: Dynamic Part Average Testing
NNR: Nearest Neighbor Residual
Z-PAT: Z-Axis Part Average Testing
GDBN: Good Die in Bad Neighborhood
Zonal: Low yield zone-based detection
Final Test
Post Final-Test operation and Based on Die-ID (ECID etc.)
In real-time at Final-Test operation without Die-ID
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Cross-Operation Outlier Detection
Cross-operational quality based on Die ID
Contributing operationsETEST/PCM/WATWafer SortFinal-TestBurn-InSystem Level Test
Example: E-Test based bin-switching performed post-Wafer SortThe ability to identify potential bad devices based on E-test data geographical analysisBin switching occurs post-wafer sortRequires data-feed-forward within the supply chain
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Escape Prevention
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Escape Prevention – ATE Freeze
A freeze occurs when a tester instrument becomes “stuck” and repeatedly returns the same or similar result for a sequence of parts
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Escape Prevention – ATE / TP
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The STDF “PRR.NUM_TESTS” field tells us the number of tests executed on the part. It should be relatively stable throughout
the lot
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Escape Prevention – Test Ops
Excessive probing – when operation ignores probe mark spec for a device and keeps on probing to get the yield
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Escape Prevention – Test Program
Human error is one of the main contributors for test escapes and RMA. Here the PE commented a few blocks in the TP for debug and forgot to uncomment before production release:
Traditional SBL is design to detect yield issues in which a specific bin count spikes. However human error can result in a drop to 0
which is missed.
SBLSBL drop of soft bin 11
from ~3% to 0 following new TP revision
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Escape Prevention – Test Program
Extremely loose test limits may mask real test performance problems
~95 Sigmas
~95 Sigmas
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Advanced Quality Solutions
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Implementations:Within the same test area (e.g. WS, FT, etc.)Between test areas (e.g. from WAT to WS to FT)Within a single subconBetween multiple subcons (hub and spoke)Real-time (test program integration)Offline bin-switching
Example scenarios:Outlier Detection – drift analysisPairing – cherry-picking for power & speed combinationsTest program tuningSLT / Burn-in reduction
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Data Feed Forward
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Data Feed Forward – Drift
Database at subconTester
1. ECID Data
2. FT1 Measurements
Test Program runningFT2 operation
Real-time data!No test time impact!
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One or more numeric values representing the perceived quality of a part based on:
Wafer geography (e.g. edge vs. center)
Outlier detection rule inputs (e.g. GDBN, Z-PAT, D-PAT, etc.)
Number of iterations to PASSOverall lot/wafer yieldEquipment health during testParametric test results from multiple operationsEtc…
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Quality Index
Quality Index
Lot/Wafer
Yield etc.
Quality Rule
Inputs
Wafer Geogra
phy
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“No Problem Found”
Combinations of chips causing issues:
IC3
IC2
PCB
IC1
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Smart Pairing
• New methodology to pair IC’s for optimal compatibility
• Customer and suppliers agree on recipe for “Best Match” between IC’s (e.g. based on power consumption and speed)
• “Quality Index” created based on manufacturing and test data to categorize chips
• Data fed-forward to assembly to ensure IC’s pre-sorted into “buckets” based on Quality Index
• MCPs and boards are assembled with well-matched components
Grade A
Grade B
Grade C
Grade A
Grade B
Grade C
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Supreme Quality requires a comprehensive end-to-end approach which takes into account problems arising from:• Equipment• Test Process• Human Error• Material…and much more
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Conclusions
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Q&A
Optimal+ 2014 Company Confidential