paper 2006 pan phase shifted full bridge small signal analysis

5/10/2018 Paper 2006 PAN Phase Shifted Full Bridge Small Signal Analysis

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Transactions of Tianjin UniversityISSN 1006- 4982 pp006- 012Vol. 12 No.1 Feb. 2006

Soft Switched Synchronous Rectifier with Phase-Shifted FullBridge Converter and Its Small-Signal Analysis

PAN San bo ( 11- = : : P S ) I, PAN lunmin ( 1 1 ~ ~ ) I, WAN I ianr ut ]Jff~Il)2( I. School of Electrical Engineering, Shanghai Jia~tong University, Shanghai 200030. China;

2. School of Electrical Engineering and Automation. Tianjin University. Tianjin 300072. China)

Abstract: By using the output inductors and body capacitances without adding any component com-pared with hard switching synchronous rectifier. the topology of a soft switched synchronous rectifierwith phase-shifted full bridge zero voltage switching DC/DC converter is proposed. The converterefficiency is maximized due to soft switching of the full bridge MOSFETs and the synchronous MOS-FETs. and also the low conduction loss of synchronous MOSFET. The operation principles of thecircuit are analyzed in detail and the small-signal model is derived. also the converter dynamic char-acteristics are analyzed. Frequency responses of transfer functions under different values of trans-former primary leakage inductance are discussed. The experimental results were obtained from a400 V input and 100 AlI2 V output DC/DC converter operating at 100 kHz. The results show thatthe converter efficiency is 2% higher in rated power than traditional diode rectifier.Keywords: phase-shifted full bridge: zero voltage switch: synchronous rectifier: DC/DC; small sig-nal

With the development of micro-silicon electronicsindustry, new integrated chips have got much higherdensity. It is believed that low-output voltage andlarge-current power supply is one bottleneck in CPUdevelopment. For traditional low-output voltage andlarge-current power supply using diode rectifier, thevoltage drop on diode is too large, so the efficiency ofpower supply is not satisfied [I. The synchronous rec-tifier using the power MOSFET, which has low con-duction resistance, can achieve good efficiency [I. Atpresent, the applications of synchronous rectifier arefocused on computer power supply modules or other e-lectronic auxiliary power supply modules, and thepower is often below 200 W. So although there areplenty of literature concerning about the soft switchedsynchronous rectifier, the main topology is limited inbuck converter, flyforward converter, flyback convert-er[2, 3 J. In industries, the plating power supply re-quires the output voltage varying from 0 to 12 V andoutput current varying from hundreds to thousands am-

Accepted date;2005-08-15.PAN Sanbo , born in 1974. male. doctorate student.E-mail ;[email protected].

peres. In this case, the synchronous rectifier with fullbridge topology is meaningful to achieve high efficien-cy of the power supply module.

This paper presents a soft switched synchronousrectifier with phase-shifted full bridge zero voltageswitching (ZVS) DCIDC converter, which is used ina high power plating power supply module. There isno need to add additional components in the circuit.By using the output inductors and body capacitances,we can achieve the soft switching of synchronous recti-fiers. For the low impedance characteristic of synchro-nous rectifier, the damping factor caused by leakageinductor is different from other full bridge phase shif-ted circuit [4,5]. Experiment results obtained from a100kHz, 400 V input and 100 A I 12 V output DC IDC converter verified the analysis.1 Main circuit and operation principles1. 1 Main circuit of the converter

The circuit diagram is given in Fig. 1. The pri-
mailto:;[email protected]:;[email protected].


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PAN Sanbo et al ,Soft Switched Synchronous Rectifier with Phase-Shifted Full Bridge Converter and

mary side is typical phase-shifted full bridge converterwith resonant inductor! 6, 7]. The secondary side istypical double current rectifier. The output current ofsynchronous rectifier lois the sum of inductor currenti1 .[ and i1 2 The current ability of the circuit doublesthe traditional diode rectifier circuit. The primary sideswitches QA ' Q R, Q c Q D and the secondary sideswitches Q " Q 2 are all operated under ZVS condi-tion. In particular, the turn-on and turn-off operationsof synchronous rectifier switches Q I and Q 2 are on thefreewheel state. The secondary side of transformer isshortened. The turn-on and turn-off switch of Q , andQ2 is under ZVS and the conduction dissipation IS

Fig. 1 Phase-shifted full bridge ZVS and soft synchronousrectifier circuit diagram

very low due to the low resistant feature of synchro-nous rectifier. So the efficiency of converter is high.1. 2 Waveform and operation principles of

circuitFig. 2 shows the characteristic waveforms of soft

synchronous rectifier circuit and Fig. 3 shows the mainstages of four operations and the current now direc-tions.

t = .i.{i" - ,o{i

{!,{!

I"

I,

I.,t,

I, I, I I, I, I, I. I, I I,

Fig. 2 Characteristic waveforms of soft synchronousrectifier circuit

( a) Mode I ( b) M odp 2

( c ) Mode 3 ( d) M(.I~ 4Fig. 3 The main stages of four operation modes and the current flow directions

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Transactions of Tianjin University Vol. 12 No. 1 2006Similar to traditional phase-shifted full bridge

ZVS circuit, the operation of phase-shifted full bridgeZVS with soft synchronous rectifier can be analyzed infour different modes according to the conduction statesof the MOSFETs, QA, Q8 , Qc , QD, QI, Q2, andtheir corresponding intrinsic diodes.

Mode 1 is from to to t2 in Fig. 2, in which theauxiliary resonant period is from to to tl. At the timeof to, Q A and Q c are off, Q D is on, and Q B ischanged from on-state to off-state. For the effect ofresonant inductor and leakage inductor, the current ofprimary side decreases steadily in stead of dropping tozero at once and the current discharges CA til] Y CA rea-ches zero. When the intrinsic diode DAis on, it is atthe time of tl and Q A is therefore turned on underZVS. Then it is the main power transmission stage oftl to t2, in this stage, QA and QD are on, QB and Qcare off, causing a positive voltage to cross the trans-former secondary dotted end. In this period the mag-netizing current 1 M increases from the negative maxi-mum to positive maximum. In the secondary side oftransformer, when Q2 is on and QI is off, the energyfrom the transformer increases the inductor current iL,and at the same time provides the load. Also the in-ductor L z releases energy to load through the way ofQ2 and i~ decreases. The output current 10 is the sumof ill and i~. Fig. 3 (a) shows the circuit and thecurrenl flow direction, which are indicated by dashlines.

Mode 2 is from t2 to t4 in Fig. 2. The auxiliaryresonant period is from t2 to t3' At the time of t2, QDturns off. For the effect of resonant inductor and leak-age inductor, the primary side current discharges C cand charges CD until the voltage across Cc reaches ze-ro and then diode Dc turns on. At the time 3, Qcturns on under ZVS. Then it is the main freewheelingstage from t3 to t4 ' In this period Q2 turns off, be-cause the voltage across the transformer is zero and theclamp effect of D I , Q2 turns off under ZVS. After Q2turns off, ill and i~ discharge C1 and charge C 2. Be-cause the circuit is under low voltage and in large cur-rent state, it is easy to tum on DI and then QI turnson under ZVS. When LI releases the energy to loadthrough the way of QI , L 2 releases the energy to loadthrough the way of QI instead of D2. The output cur-rent 10 also equals the sum of iL , and i ~. Fig. 3 (b)shows the circuit and the' current flow direction,-8-

which are indicated in dash lines.Mode 3 is from t4 to t6 in Fig. 2. Similar to Mode

1, the auxiliary resonant period is from t4 to ts. Themain power transmission stage is from ts to t6' Themagnetizing current 1 M decreases from the positivemaximum to negative maximum. The output current 10equals the sum of il l and i L , _ ' Fig. 3 (c) shows thecircuit and the current flow direction, which are indi-cated in dash lines.

Mode 4 is from t6 to to in Fig. 2. Similar to Mode2, the auxiliary resonant period is from t6 to t7' Qcturns on under ZVS. Then it is the main freewheelingstage from t7 to to. In this period QI turns off underZVS and Q2 turns on under ZVS. The output current1 0 also equals the sum of il l and i~ . Fig. 3 (d) showsthe circuit and the current flow direction, which areindicated in dash lines.1.3 Soft switching conditions of switches

Fig. 1 and Fig. 2 show that Q D and Q c are lead-ing legs and Q A and Q B are lagging legs. To realizethe zero voltage soft switching of all switches, the en-ergy in effective inductor should be greater than theenergy in effective capacitor so that resonance can en-sure the discharge of capacitor voltage down to ze-ro[6]. So we have

LeffP ~ C eff y 2(1)

where Leff is the effective inductor, I is the minimumprimary side current in certain load, Ce r r is the effec-tive capacitor and V is the peak voltage of capacitor.

For leading legs Q D and Q c, L e f f equals resonantinductor Lr, including the leakage inductor Llk andthe equivalent value of output filter inductor Lo'which is big enough that the ZVS condition can beeasily achieved. '.u; + Llk + L a > P ~ ( C c + CD + C tranal ) V T n

(2)where Ctransl is the primary side parasitic capacitor oftransformer.

For lagging legs Q A and Q B, L e r r equals resonantinductor L r, including L1 k So L e e r is far less than theleading legs, so the ZVS achievement of lagging legsis harder than leading legs.u; + Llk ) P ~ ( C A + C B + C Iransi ) Y T n

(3)For synchronize switches Qi and Q2, L e f f equals


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PAN Sanbo et al ,Soft Switched Synchronous Rectifier with Phuse-Slt ifted Full Bridge Converter atul->-

output f ilte r i ndu c- to r LI plus L 2, I is half of the aver-age output current 10, and Ctrans2 is the secondary sideparasitic capacitor of transformer. n is transformerturns ratio, V is the peak voltage of capacitor CI'

10 2 ' Vin 2(LI + L2) ( 2 :) ~ (C1 + (;2 + Ctrans2) (--;-)(4)

To synchronize switches, the average output cur-rent 1 0 and output inductor are high and voltage of ca-pacitor C I is low. So the ZVS achievement is the easi-est in all switches. If lagging legs Q A and Q B can real-ize ZVS. other switches can surely realize ZVS. SoEq. (3) is the ZVS condition for the circuit.

2 Small-signal average model and thedynamic analysisWhen using soft synchronous technology, assume

the transformer, inductors and capacitor are ideal ele-ments. and the ripple of output voltage is far belowthe average output voltage Vout the input voltage isV in, the turn ratio of transformer is n, the switchingperiod is T, duty cycle is D, the values of L 1 and L 2are both equal to L. the current flows through induc-tors are il'l and iI., ' the current flows through switchesare iQ and iQ ' the minimum value of iL is iL min'I 2 I I the output current is 10 From the symmetry of thecontrol circuits and the main circuits elements, wecan get the average values of il.l and iL , both equal I,,!2. We use 0I,D 2 to present the average duty cycle ofMode 1 plus Mode 4, and Mode 2 plus Mode 3 re-spectively. Therefore, 0 = D2 = D12. The duty cy-cle of the secondary voltage can be expressed as

Deff = D - 6.D(5)

where D is the set duty cycle and 6.D is the loss dutycycle due to the finite slope of the rising and fallingedges of the primary current.2. 1 Duty cycle modulation due to the change of

the filter inductor currentWhen the steady state operation is perturbed by

Aan increase of the filter inductor current i I.' inductorcurrent will have a time delay corresponding to thesteady state operation. This will cause a reduction of

,\the duty cycle di. The delay time can be representedas

A6. t = 2 n i l.llkniin

and(7)

The negative sign shows that there will be a re-duction in deff if the filter inductor current increases.2.2 Duty cycle modulation due to the change of

the input voltageWhen the steady state operation is perturbed by

,\an increase of the input voltage V in, th e inductor cur-rent will have a time lead corresponding to steady stateoperation. This will cause an increase of the duty cy-

Acle noted as d ".The leading time can he represented as

V t T , Llk Llk6. t = n ( 2 1 - - - - - ' ! ! ! _ D '- - - " - ) ( - - - - -L L 2 V ,\In Yin + Vin

(8 )where D' = 1 - D . And

Vour , T " l L lk V ' 1.t = ti (2/,. - L D 2 ) .\ IJIVin ( Vin + Vin)

(9)Under the assumption of small-signal. we have

V T t.; A6. t = n ( 2 It. - tD ' 2')2VinV I I I( ]0)

,\The related duty cycle change, noted as d, , isA 6. t V out , t; 4nLIIJ, hd . ; = (T 12) = (lL-TD 4)~' V in

S In

(11)This equation is suitable for all operation states,

no matter in continuous mode or in discontinuousmode. When the converter operates in a well designeddeep continuous mode, DI is very small r 4 I and we get

d A = 4nLIJ:Jl. ,\ ( 12)u 2 Y inVinAnd we can get the equivalent small-signal duty

cycleA A ,\ Adeff = d + d , + d r '

(6)

( 13 )Small-signal model of full bridge phase-shifted

circuit can be obtained from buck converter mooell5 J The average small-signal model of the circuit is shownin Fig. 4. When the sub-circuit corresponding to thetwo rectifier circuits is not in work condition. the con-trolled current source is open and the controlled volt-

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Transactions of Tianjin University Vol. 12 No.1 2006age source is short.

Fig. 4 The average small-signal model of the circuit

Transfer function of the output filter is1 1H o = - = --=---=-----J s2L C sL 1-2 -+2R+

(14 )Input impedance of the output filter is

_ RJ .[z,-I+sRC(15 )

Output impedance of the output filter issLz, =2Jf

(16)The duty cycle to output voltage transfer function

IS

(17)

(18)It can be observed from Eq. ( 18) that the pres-

ence of the term Rdl R reduces the low frequency val-ue of Gvd . The Rdl R reflects the loss of steady stateduty cycle. To the circuit of low voltage high currentcircuit, Rd is often much larger than R. Let 2 ( RdlR + 1 ) ILC =w2 'We obtain

V inw 5R 1(R d + R)G d = =v 2 1 2Rd 2s + S ( RC + L) +Wo

VinW5R1(Rd + R)s2 + s2wo~ + W5 (19)

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The damping factor(= kj2RC (~d +R) -n, CR2L(Rd +R)

(20)The first tenn of the Eq. (20) is the damping inthe regular buck converter, when the use of leakageinductor Llk introduces additional damping. And thesecond term of Eq. (20) can become dominant. Fig.5 shows the family of duty cycle to output transferfunctions of the circuit as Llk varies from 2 JJ.H to 5JJ.H, and the damping of the system is noticeably af-fected.

al"0 0~"0.;COIl" -50:: E

-100 L--.J....L....L.Lu..w_.L-.L....L.LLJ.W_.L-.L .........u.wo 10 100 1000Frequency I kHz

( a) Magnitude v.s . frequency curves

Frequency I kHz( b ) Phase v... frequency curves

Fig. 5 Frequency response curves of duty cycle tooutput voltage transfer functions underdifferent values of Lu.

The bode diagram of the input voltage to outputvoltage open loop transfer functions of the small-signalmodel of the system is shown in Fig. 6, including theuncompensated curve and the compensated curve.

Following the above operation analyses, a powersupply module in phase-shifted full bridge ZVS andsoft synchronous rectifier technology is built. Thisconverter has a high efficiency of 92% at the full load.It is 2% higher than traditional diode rectifier.

The parameters of module are as follows:Input voltage Vin: 400 VDC, to meet the former


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PA N Sa nbo et a l : So ft Sw itc hed Sync hronou s Rec u fier w ith Pha se-Shifted Fu ll B ridge C onvener and+ -

stage power factor correction output voltage;Rated output current 1 0: 100 A;Switching frequency Is: 100 kHz;Full bridge switches Q A to Q D : IRFBC40;Synchronous rectifier Q I and Q 2 : FQAI60N08,

the on-state resistance is 5.6 mn;Tum ratio of transformer n: 13/1 ;Output inductor of LI and L 2 : 100 j.LH.

150r-------------------------~

:: c 10 0'0

o

10 ' 10 'Frequency I Hz

10' 10'

( a ) Uncompensated magnitude 1'. s. frequency curve

15 0

10 0c o:: ' 50"0.g 0"J)": -5 0

-10010 ' 10 ' 10 ' 10" 10' 10 ' 10 '

Frequency I ~Hz( c) Compensated magnitude v. s. frequency curve

The experiment waveforms are shown in Fig. 7.Contrast to traditional diode rectifier , the soft

switched synchronous rectifier can reduce the losses ofrectifier semiconductor and improve the efficiency ofconverter. Especially in huge current and low voltageconditions, MOSFET is used to replace the power di-ode, so the control is much more complex than the di-ode rectifier.

-8 0

-100

-120~~ -140..ce,-160

-180 10' 10'Fr equency !H z

II)'

(b) Uncompensated phase I'. s. frequency curve

-5 0

-100

-150.:" -200. ..s:e,

-250

-.10010 ' 10 ' 10 ' 10 10 ' 10 ' 10 '

rime !s (2.0~, I div ) Time i ~s 15 .0 us I div )(b) Waveforms of drive signals anda) Waveforms of transformer voltage and

inductor current sum transformer currentFig.7 Experiment wavefonns

F req uen cy . ~II,

Fig.6 Uncompensated and compensated frequency response curves of the transfer function( d) Compensated phase I'. s . f requeru-v cu. .. .e

Chl:Q, Jri\CI20.0 v. div I

rime" us 120.0 us I div )( c) Wavdonns of 1 ' , > and 1'". of (J.

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T r an sa c tio n s o f T i an ji n U n iv er sit y Vol . 12 No.1 2006

3 ConclusionsThis paper proposes a topology of a soft switched

synchronous rectifier with phase-shifted full bridgeZVS DC/DC converter and analyzes its operation prin-ciples, which are especially suitable for low-voltage,large-power DC power source.

The small-signal model equivalent circuit is de-rived by adding two controlled sources into the small-signal model of the PWM buck converter. A very littlevariation on the leakage inductor can greatly changethe converter' s dynamics. The experiment resultsshow the efficiency of soft switched synchronous recti-fier is 2% higher than traditional diode rectifier powermodule.References[ 1 ] Balogh L. The performance of the current double rec-

tifier with synchronous rectification [ C ]. In: HFPCProceedings. San Jose, USA,1995.216-225.

[2] Acik A, Cadirci I. Active clamped ZVS forward con-

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verter with soft-switched synchronous rectifier for highefficiency, low output voltage applications [ J J. lEEP ro c ee din gs , E le c tr ic P o we r A p pl ic a tio ns , 2003, 150(2) :165-174.

[3] Zhou Weisong, Hu Rongfang. Research on a DC/DCconverter using current double synchronous rectifierand active clamp circuit [ J J. Jou rna l o f T singhu aUniversi ty, 1998, 38 ( 3 ) :77 -81 (in Chinese).

[ 4 ] Sabate J A, Vlatkovic V, Ridley R B et al. Designconsiderations for high voltage high power full-bridgezero voltage switched PWM converter [ C J. IEEEAPEC P ro c ee di ng s. Los Angeles, USA, 1990. 275-284.

[5] Vlatkovic V, Juan A, Raymond B R etal. Small-sig-nal analysis of the phase-shifted PWM converter [ J].IEEE T ransa c tions on Power E lec tronic s, 1992, 7(1) :128-134.

[6 ] Ruan Xingbo, Yan Yangguang. S ofi- Sw itc hin g T ec h-no lo gy o f D C Sw itc hing Po wer Su pply [ M]. SciencePress, Beijing,2000 (in Chinese).

[7] Sable D M, Lee F C. The operation of a full-bridge,zero-voltage-switched PWM converter [ CJ. In: Pro-c eed ing s o f V PE C. Virginia, USA,1989. 92--97.

paper 2006 pan phase shifted full bridge small signal analysis

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