Part IA Engineering

Digital Circuits &

Information Processing

Handout 3

Microprocessors

Richard PragerTim Flack

January 2009

1

Contents of Handout 3

Section A Microprocessor architecture.Section B Memory.

These sections cover the materialfor questions 1 & 2 onexamples paper 4.

Section C Microprocessor programming.This section covers the materialfor questions 3 and 4 onexamples paper 4.

Section D Flags.Section E Addressing modes.

These sections cover the materialfor questions 5 – 9 onexamples paper 4.

Section F The stack & subroutines.This section covers the materialfor question 10 onexamples paper 4.

2

Handout 3 Section A

Microprocessor Architecture

In this section we describe the main constituents ofmicroprocessor systems and show how a number ofsimple program instructions are executed.

3

Microprocessors

A computer on a chip.

Used in washing machines, microwaves, printers, cars,fax machines, sewing machines, video games, CDplayers, televisions, answerphones, electric organs,and home computers.

Very small, flexible, and cheap. Can be highly com-plex.

4

Block Diagram

+

-

Instruction decode

A

B

Microprocessor 126

12

47

0000

0001

0002

0003

FFFF

CF00

CF01 Screen

Keyboard

0

18

Address ContentsMemory

H

H

H

H

H

H

H

A and B symbolise ‘accumulator’ registers that can beused to store intermediate results inside the micropro-cessor.

5

Bus Structure

OutputPort

InputPort

8 datainputs

8 dataoutputs

Memory

Data

Control

8 wires

16 wires

Microprocessor

Address

For the 6800, the address and control bus go onlyfrom the microprocessor to the peripheral devices. Thedata bus is bi-directional

6

Load Data to Microprocessor

from Memory

Set address on address bus.

Set read/write wire high.

Set address valid control wire high. This, togetherwith the address bus will activate chip select on theappropriate memory chip.

Read the data from the data bus.

The read/write wire is usually labelled R/W

7

Store Data to Memory

from Microprocessor

Set address on address bus.

Set read/write wire low.

Set address valid control wire high. This, togetherwith the address bus will activate chip select on theappropriate memory chip.

Drive the data bus with the correct voltages to rep-resent the data that is to be stored in this memorylocation.

8

Addressed Capacity of Memory

Let a = number of address wires and d = number ofdata wires.

The address bus is 16 bits wide (a = 16). Thereare 16 wires. The microprocessor can address up to216 = 65536 memory locations. Every time you in-crease the number of address bus wires by one youdouble the addressed capacity.

The data bus is 8 bits wide (d = 8). Each location isan 8-bit byte. Each 8 bits can either store an unsignednumber in the range 0–255 or a 2’s-complement signednumber in the range −128 to +127. Every time youincrease the number of data bus wires by one the ca-pacity goes up by 2a bits.

The total addressed capacity in bits is

d × 2a

9

Program Counter

The program counter is a 16 bit register inside the6800 that stores the memory address of the next in-struction to be executed.

at by program counterRead instruction pointed

Obey instruction

to point at next instructionIncrement program counter

Instructions take up either1, 2 or 3 bytes. The firstbyte is always the op-codethat tells the microproces-sor what to do. The secondand third bytes, when theyare present, usually spec-ify (in various ways) the ad-dress on which the op-codeoperates.

The number of bytes taken up by an instruction foreach op-code is fixed and built into the microproces-sor chip.

10

Example: NEG

The op-code 70H is (one version of) the NEG instruc-tion that changes the sign of a binary number using2’s complement arithmetic.

counter70

Program

00F9

00

00F800F700F600F500F400F300F200F100 F1

Address

Data

FF

F8

The two bytes that fol-low the 70H op-codespecify an address inmemory. When it ex-ecutes the 70H op-code the microproces-sor will read the data atthis address, change itssign and write the resultback at the same ad-dress.

11

After the NEG instruction we have the following state:

counter70

Program

00F901 00F8

00F700F600F500F400F300F200F100

Address

Data

F800

F4

12

Registers

Apart from the Program Counter there are several otherregisters inside the microprocessor chip. Here is acomplete list of them.

Condition Code Register

Program Counter

Stack Pointer

Index Register

8 bits

Accumulator B

Accumulator A 8 bits

8 bits

16 bits

16 bits

16 bits

13

The Accumulators

There are two 8 bit accumulators, A and B, that areused to store intermediate arithmetic results.

The LDAA instruction loads accumulator A.

One op-code used for this is B6H followed by twobytes containing the address from which the data shouldbe loaded.

The STAA instruction stores the contents of accumu-lator A in memory.

One op-code used for this is B7H followed by twobytes containing the address at which the data shouldbe stored.

14

00F900F800F700F600F500F400F300F200F100 F1

Address

Data

FF

F800

Program Counter

Accumulator A

B6

After execution of LDAA

00F900F800F700F600F500F400F300F200F100

Address

Data

FF

F800

Program Counter

Accumulator A

B6F4

FF

Before execution of LDAA

15

00F900F800F700F600F500F400F300F200F100

Address

FF

Data

FF

F800

Program Counter

Accumulator A

B6

FF

B7

00F900F800F700F600F500F400F300F200F100

Address

Data

FF

F800

Program Counter

Accumulator A

B6F4

FF

00F9

Before execution of STAA

After execution of STAA

F7

B700F9

16

Addition

The ADDA instruction adds the contents of a speci-fied memory location to accumulator A. One op-codeused for this is BBH followed by two bytes containing

the address of the data to be added.

ADDA A + memory → A

Accumulator B is just like accumulator A. Having twoaccumulators means you can use them together. Op-code 1BH is called ABA and adds the two accumula-

tors together, leaving the sum in accumulator A.

ABA A + B → A

17

00F900F800F700F600F500F400F300F2

F4 00F100

Address

DataProgram Counter

Accumulator A

00F900F800F700F600F500F400F300F200F100

Address

DataProgram Counter

Accumulator A

F1

03

04

BB

F800

BB00F8

Before execution of ADDA

After execution of ADDA

07

04

18

00F900F800F700F600F500F4

Accumulator B

00F300F200F100

Address

DataProgram Counter

Accumulator A

00F900F800F700F600F500F400F300F200F100

Address

DataProgram Counter

Accumulator A

F1

03

07

1B

1B

Before execution of ABA

After execution of ABA

04

04

F2

Accumulator B

19

Handout 3 Section B

Memory

In this section we describe the internal structure ofrandom access memory chips (RAM). The circuit forconnecting together a number of memory chips aspart of a microprocessor system is then introduced.

The section ends with a list of various types of mem-ory chip, and a brief discussion of memory-mappedinput/output.

20

Memory Read and Write Operations

Memory chips have address wires, data wires, theread/write (R/W)wire, and the chip select (CS) wire.

When CS is high the memory chip does nothing.

When CS is low and R/W is low, the memory chipwrites the data on the data bus into the location indi-cated by the address bus.

When CS is low and R/W is high, the memory chipdrives the data bus with the data from the location in-dicated by the address bus. This enables the micro-processor to read data out of the memory.

21

0

A 9

D 0

D7Read/

writeChipselect CS

R/W

Data bus.Bi-directional.

Address bus.Only from

memory.MPU to

Mem

ory

A

Chip

This memory chip has 10 address wires (sometimescalled address lines) and 8 data wires. It can thereforestore 8 × 210 = 8192 bits of information.

8192 bits = 8kilobinary bits = 1kilobinary byte

22

writeenable

R / W

CSInterfacelogic

DataBus

AddressBus

One out of2decoder

bit 0 bit 1 bit (m−1)Ext

erna

l con

nect

ions

memoryelement

memoryelement

memoryelement

memoryelement

memoryelement

memoryelement

memoryelement

memoryelement

memoryelement

n

in out outin inout

There is one row of memory elements for each ad-dress, and one column for each data wire.

23

Address Decoder

A 1 A 0

High if

0 1A A = 0 0

High if

0 1A A = 1 1

High if

0 1A A = 0 1

High if

0 1A A = 1 0

This is a ‘one out of 2n decoder’ where n = 2. Onlyone output is high at a time.

24

dataout

datain

writeenable

data in tohigher rows

data out from higher rows

S

R

Q

MemoryElement

word select

The word select lines are driven from the one-out-of-2n decoder. Thus, only one word select line is drivenhigh at any time.

25

This shows how the internal signals data in, data out,and write enable are connected to the external databus wires, the read/write wire and chip select.

Interfacelogicinsidememorychip

This bit repeated for each data bus wire

Read/writeChipselect

One databus wire

CS

R/W

D i

buffer

3−state driver

Data in

Data out

Write enable

26

Tri-state Buffer

E

1100

0101

I

floating

floating

Output

01

Enable

Input Output

+V

Output

Enable

Input

When enable is low neither transistor is on and theoutput is not connected to any voltage by this part ofthe circuit.

27

Two Memory Chips

One memory chip does not usually provide enoughstorage for the microprocessor on its own.

A memory chip with 10 address wires contains 210

locations (each of which contains a byte if there are8 data lines). The microprocessor has 16 addresswires in total so it can address up to 216 locations.To completely fill the microprocessor address spacewith these memory chips you would therefore need

216

210= 26 = 64 chips.

The address space of the 6800 is from 0000H toFFFFH . A single memory chip contains 210 = 400Hlocations. We want to wire one memory chip so it re-sponds to addresses 0000H – 03FFH and anotherso it responds to addresses 0400H – 07FFH .

28

Address valid

A 0 D 0

D7

A 9

Mem

oryC

hip

R/W

CS

A 0 D 0

D7

A 9

Mem

oryC

hip

R/W

CS

R/W DataAddress

29

Other Types of Memory

RAM Random access memory. The type of memorywe have been talking about so far.

ROM Read only memory. Contents set in the factoryand can never be changed by the microprocessor.

EPROM Erasable programmable read only memory.Can be programmed using a special programmerdevice that uses higher voltages than in a nor-mal microprocessor circuit. Cannot be changedby the microprocessor. Can be erased using UVlight through a little window on the top, or some-times by applying a higher voltage again.

More long term storage is achieved through the useof magnetic disks, optical CDROMs, and tape drives.

30

Memory-Mapped i/o

We want to create input and output ports that eachappear to the microprocessor just like a location inmemory.

This would enable us to arrange that every byte readfrom the input port was a character read from the key-board, and every byte written appeared as a characteron the screen.

The diagram shows an input port and an output portboth mapped to memory location 0000H . Readingfrom location 0000H reads from the input port. Writ-ing to location 0000H writes to the output port.

(Thus if the microprocessor writes a number to loca-tion 0000H and then reads location 0000H back itwill not necessarily get the same number!)

31

Address valid

Q 7

Q 0D0

D7

R/W

D7

D0

Q 7

Q 0

Loadenable

Data bus

Inpu

t por

t

Load enable

Input port

Output port

Address bus

32

Address Decoding Examples

Q: How may address pins are there on an 8 kilobinarybyte RAM chip that has 8 data lines.

A: 8 kilobinary bytes = 23 × 210 = 213 bytes. Sothere will be 13 address lines (A0–A12).

Q: A 6800 microprocessor has 16 address lines soit can address a maximum of 64 kilobinary bytes ofmemory. Suppose 8 memory chips are wired up tocompletely fill this address space, work out the ad-dress ranges of each chip.

A: The 13 least significant address line will determinethe address inside each chip. The 3 most significantaddress lines will determine which chip. The addressranges (in Hex) will therefore be:

Chip Min Max Chip Min Max1 0000 1FFF 5 8000 9FFF2 2000 3FFF 6 A000 BFFF3 4000 5FFF 7 C000 DFFF4 6000 7FFF 8 E000 FFFF

33

A A A15 A A A A A A A A A A A A A14 13 12 11 9 8 7 6 5 4 3 2 1 010

Which chip

FirstChip

0 0 0 0 0 0 0 0 00 0 0

0 0 0

0 0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 00 0 0

0 0

0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 Chip2nd1

1

0 0 0 0 0 0 0 0 00 0

0 0

0 0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 Chip3rd1

1

0 0 0 0 0 0 0 0 00 0

0

0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 Chip1

1

4th1

1

0 0 0 0 0 0 0 00 0

0

0 0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 Chip0

0

1

1

5th

0 0 0 0 0 0 0 00 00 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 Chip6th1

1

0 1

10

0 0 0 0 0 0 0 00 0

0

0 0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 Chip1

1

7th1

1

0 0 0 0 0 0 0 00 00 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 Chip1

1

8th1

1

1

1

Which location inside the chip

34

Q: Design the address decoding logic for the secondof these chips.

A: We want to chip to respond when the top two ad-dress lines (A15 and A14) are low, and A13 is high.

Address valid

R/WA 0 D 0M

emory

Chip

CS

A 12

R/WD

7

DataAddress

35

Q: Why would it it be difficult to use the 6800 if itsaddress space was entirely populated with RAM chipsas discussed above?

A: There would be no addresses left for memory mappedi/o. Therefore it would be difficult to attach any periph-eral devices to the microprocessor. (eg. keyboard,screen, disk etc).

As there is no ROM or EPROM the start-up programswould somehow have to be loaded afresh each timethe power was switched on.

36

Handout 3 Section C

Microprocessor Programming

In this section we introduce the technique of program-ming the 6800 microprocessor in assembly language.The data movement, arithmetic and logic instructionsare summarised.

Further information about various aspects of assem-bly language programming are given in later sectionsof this handout.

37

Microprocessor Programming

It would be very difficult to program a microprocessorusing just the hexadecimal op-codes.

To make programming easier we use a software toolcalled an assembler that translates an assembly lan-guage program into appropriate op-codes.

C++

Assembly language

Op-codes

Assembler

Compiler

In other work, for example theIntegrated Design Project in thesecond year, you will use acompiler that will translate C++into assembly language. Theassembly language can then beassembled to produce the op-codes that form the program forthe microprocessor inside therobot vehicle.

38

Features of assembly language programming:

• Assembly language programs are usually efficientand take up less space in memory than programswritten in higher level languages.

• There is one assembly instruction for each op-code so the programmer has direct control overthe microprocessor.

• It is not complicated for the assembler to translateassembly language into op-codes and this pro-cess can happen rapidly on most computers.

• It is difficult to write large programs in assemblylanguage.

39

Writing Numbers

$ means hexadecimal.

# means immediate (take this number itself rather thanthe data you find at this address).

LDAA $FFF3 load acc A with the data storedin memory at hex address $FFF3

LDAA #24 load acc A with 24 (decimal)

LDAA #$10 load acc A with 16 (decimal)(i.e. $10 hex)

40

Example: Addition

Get the bytes of data from locations $C000 and $C001.Add them together and store the sum at location $C002.

LDAA $C000 load contents of $C000 into ALDAB $C001 load contents of $C001 into BABA A + B → ASTAA $C002 store data in A into location $C002

41

AND & OR Operations

The logical AND and OR operations work bitwise.

Data D3 D2 D1 D0AND with 1 1 0 0Result D3 D2 0 0

Data D3 D2 D1 D0OR with 1 1 0 0Result 1 1 D1 D0

42

Example: AND

To round the number in location $C000 down to thenearest even number below:

Get the byte of data from location $C000. Perform alogical AND operation between the bits in this numberand the corresponding bits in the number $FE. Store

the result back in location $C000.

LDAA $C000 load contents of $C000 into AANDA #$FE AND each bit of A with the

corresponding bit of $FELeave the answer in A

STAA $C000 store A in location $C000

43

Data Movement Instructions

A Accumulator A (8 bit)B Accumulator B (8 bit)X Index Register (16 bit)S Stack Pointer (16 bit)

Load LDAA, LDAB, LDX, LDSStore STAA, STAB, STX, STSTransfer TAB, TBA, TXS, TSX

Index Register (16 bits)

Stack Pointer (16 bits)

Memory

MSB LSB$C000$C001$C002$C003$C004$C005$C006 LDX $C004

LDS $C004

44

Arithmetic & Logic Instructions

Add ADDA, ADDB, ABA, ADCA, ADCBSubtract SUBA, SUBB, SBA, SBCA, SBCB

Clear CLRA, CLRB, CLRComplement COMA, COMB, COMNegate NEGA, NEGB, NEG

Decrement DECA, DECB, DEC, DEX, DESIncrement INCA, INCB, INC, INX, INS

And ANDA, ANDBExclusive-or EORA, EORBOr ORAA, ORAB

45

6800 Registers

1 1 H I N Z V CCondition Codes

(16 bit)

Register:

2’s complement overflowZero

Carry (from bit 7)

Interrupt maskHalf carry (from bit 3)

Negative

Accumulator A (8 bit)

Accumulator B (8 bit)

Index Register X (16 bit)

Stack Pointer S (16 bit)

Program Counter PC

46

The accumulators are used to hold intermediate arith-metic results.

The index register is used to hold the address of datain memory.

The stack pointer is used to manage temporary stor-age, and in subroutines.

The program counter contains the address of thenext instruction to be executed.

The condition codes register holds various informa-tion about the last arithmetic operation that is usedto determine whether a conditional branch instructionresults in a branch or not.

47

Handout 3 Section D

Flags

In this section we individually introduce each of theflags in the condition codes register and illustrate itsuse with a short example program.

The branch, rotate and shift instructions that makeuse of the flags are discussed.

An example program to multiply two unsigned num-bers is described and flow charts are introduced toillustrate the algorithm used.

48

Carry Flag

The C flag is set when there is a carry from the mostsignificant bit during a calculation.

For example, if we have an addition:

A plus B → Aafter

then the carry flag will be determined by the Booleanexpression

C = A7.B7 + (A7 + B7).Aafter7

49

Example: Adding 16-bit numbers

Add two 2’s complement 16 bit numbers. The first oneis stored $C001 (low byte) and $C000 (high byte). Thesecond number is stored $C003 (low byte) and $C002(high byte). The answer should be put in $C005 (lowbyte) and $C004 (high byte).

LDAA $C001 load contents of $C001 into AADDA $C003 A + contents of $C003 → A

if this addition carrys beyond 8 bitsthe carry flag will be set

STAA $C005 store A at location $C005 (low byte ans)

LDAA $C000 load contents of $C000 into AADCA $C002 A + C + contents of $C002 → ASTAA $C004 store A at location $C004 (hi byte ans)

50

2’s Complement Overflow Flag

The V flag is set whenever an overflow occurs basedon the numbers being treated as signed rather thanunsigned numbers.

If we have an addition:

A plus B → Aafter

then the V flag will be determined by the Boolean ex-pression

V = A7.B7.Aafter7 + A7.B7.Aafter

7

V is set when the carry from bit 6 is different to thecarry from bit 7.

(A7.B7.Aafter7 ) is the case of a carry from bit 7 but

no carry from bit 6. (A7.B7.Aafter7 ) is the case of a

carry from bit 6 but no carry from bit 7.

51

Checking the V flag

Add the 2’s complement numbers in $C000 and $C001storing the answer in $C002. If 2’s complement over-flow occurs store $FF in $C003, otherwise store $00in $C003.

CLR $C003 store $00 in $C003LDAA $C000 load contents of $C000 into AADDA $C001 A + contents of $C001 → A

sets V flag if overflow occursBVC voff if V is clear branch to label ‘voff’COM $C003 complement $C003

voff: STAA $C002 store A in $C002

The BVC is a conditional branch instruction. The branchonly occurs if the V flag is clear.

52

Zero Flag

The Z flag is set when the answer is zero.

If we have an addition:

A plus B → Aafter

then the Z flag will be set if and only if Aafter = 0.

53

Checking the Z flag

Subtract the numbers in $C001 from the number in$C000 storing the answer in $C002. If the numbers in$C000 and $C001 are equal (and hence the answeris zero), store $FF in $C003, otherwise store $00 in$C003.

CLR $C003 store $00 in $C003LDAA $C000 load contents of $C000 into ASUBA $C001 A − contents of $C001 → A

sets Z flag if answer is zeroBNE zoff if Z is clear branch to label ‘zoff’COM $C003 complement $C003

zoff: STAA $C002 store A in $C002

Branch if not equal, BNE, is a conditional branch in-struction. The branch only occurs if the Z flag is clear.

54

The Negative Flag

The N flag is set whenever the top bit (bit 7) of theanswer is set. It will thus be set for all numbers whichwould be interpreted as negative in two’s complementarithmetic.

If we have an addition:

A plus B → Aafter

then the N flag will be determined by the top bit ofAafter

N = Aafter7

If we choose to regard the numbers as unsigned thenthe N flag will be set whenever the answer is in therange 128 to 255.

55

Checking the N flag

Add the 2’s complement numbers in $C000 and $C001and find the magnitude of the sum. Store this as apositive 2’s complement number in $C002.

LDAA $C000 load contents of $C000 into AADDA $C001 A + contents of $C001 → A

sets N flag if answer < 0BPL noff if N is clear branch to label ‘noff’NEGA negate A

noff: STAA $C002 store A in $C002

Branch if plus, BPL, is a conditional branch instruc-tion. The branch only occurs if the N flag is clear.

56

The Half Carry Flag

The H flag is set whenever there is carry from bit 3 tobit 4 in the addition process.

For example, if we have an addition:

A plus B → Aafter

then the carry flag will be determined by the Booleanexpression

H = A3.B3 + (A3 + B3).Aafter3

A byte is made up of 2 nibbles. Each nibble has 4 bits.The H flag is set whenever there is a carry from thelower nibble to the upper nibble.

57

Setting Flags

In the data book a large table shows which flags areaffected by each instruction.

Test and set if true, cleared otherwise.

Reset always.

Set always.

Not affected.

R

S

00 M

00 A

00 B

A + B A

B + M B

A + M A

R R RS

R

C

R RS

R R RSClear CLR

CLRA

CLRB

ABA

ADDB

ADDAAdd

H I N Z V

58

Program error while attempting

to check the V flag

Add the 2’s complement numbers in $C000 and $C001storing the answer in $C002. If 2’s complement over-flow occurs store $FF in $C003, otherwise store $00in $C003.

Why won’t this program work?

LDAA $C000 load contents of $C000 into AADDA $C001 A + contents of $C001 → A

sets V flag if overflow occursCLR $C003 store $00 in $C003 (resets V flag)BVC voff if V is clear branch to label ‘voff’COM $C003 complement $C003

voff: STAA $C002 store A in $C002

The V flag is always reset by the CLR instruction there-fore the BVC branch will no longer be controlled by theway the ADDA instruction sets the V flag.

59

Testing Flags

Operation Branch testBranch always BRA noneBranch if carry clear BCC C = 0Branch if carry set BCS C = 1Branch if = zero BEQ Z = 1Branch if ≥ zero BGE N ⊕ V = 0Branch if > zero BGT Z + (N ⊕ V ) = 0Branch if higher BHI C + Z = 0Branch if ≤ zero BLE Z + (N ⊕ V ) = 1Branch if lower or same BLS C + Z = 1Branch if < zero BLT N ⊕ V = 1Branch if minus BMI N = 1Branch if 6= zero BNE Z = 0Branch if overflow clear BVC V = 0Branch if overflow set BVS V = 1Branch if plus BPL N = 0

60

Rotate and Shift Instructions

The rotate and shift instructions also affect the carryflag.

Rotate left ROLA, ROLB, ROLRotate right RORA, RORB, RORShift left ASLA, ASLB, ASLShift right ASRA, ASRB, ASR, LSRA, LSRB, LSR

61

7 a6 a5 4a 3a 2a 1a a0

a7 a6 a5 4a 3a 2a 1a a0

a7 a6 a5 4a 3a 2a 1a a0

a7 a6 a5 4a 3a 2a 1a a0

a7 a6 a5 4a 3a 2a 1a a0

a

Rotate Right

0

Logical Shift Right

Arithmetic Shift Right

C

C

C 0

Arithmetic Shift Left

C

C

Rotate Left

62

Example: Average

Get the bytes of data from locations $C000 and $C001.Add them together and shift the result one bit to theright to divide it by two. Store the average at location$C002.

LDAA $C000 load contents of $C000 into AADDA $C001 A + contents of $C001 → AASRA arithmetic shift right ASTAA $C002 store A in location $C002

7 a6 a5 4a 3a 2a 1a aa 0 C

ASRA

The numbers are treated as signed 2’s complementas the top bit is duplicated in the arithmetic shift right.

63

Flow ChartsAdvantages:• Useful to enable you to design the overall algo-

rithm without worrying about details of micropro-cessor instructions.

• Independent of microprocessor type.• Easier to read than machine code.

Limitations:• Modern programming techniques such as struc-

tured programming in high level languages andobject oriented programming are much quicker touse than flow charts.

• Where machine code programming is still used(eg. for optimum efficiency in digital signal pro-cessing procedures) the precise way the micro-processor instructions are used is very importantand so flow charts are of limited use.

64

A + $C001 A boxes.

Is A > 0

No

YesTests (comparisionsor questions) are represented asdiamonds

Actions are represented as

65

Unsigned MultiplicationMultiply the unsigned numbers stored in locations $C000and $C001. Leave the more significant byte of theanswer in $C002 and the less significant byte of theanswer in $C003.

$C000 $C001 $C002 $C003

66

Clear A, B and $C002

Shift LSB of $C000into Carry flag

Is C = 0

Add the 16 bit numberin $C001 and $C002 tothe 16 bit number inA and B.

in $C001 and $C002Double the 16 bit number

Is $C000 = 0

Store number in A and Bas the answer.

Yes

Yes

No

No

67

AddAdd

Skip00

00 0

0 0 0 1 1 000

0 0 0 1 1000 0 0 100

0 0 0 1 1000 0

$C000 C

0 0 0 0 00 0 0 0 0 0 0 0 0110 0 0 00

10 x 6 = 20 + 40 = 60

0 0 0 0 0 0 0 0110 0 00 0 0 0 0 0 0 0 0110 00 0 0 0 0 0 0 0 011

00 0

0 0 0

$C001$C002

+ +

Acc B Acc A

C$C002 $C001

C$C000

BCC used to testeach bit in turn.

Answer accumulatedin A & B registers.

68

Unsigned Multiplication

Multiply the unsigned numbers stored in locations $C000and $C001. Leave the more significant byte of theanswer in $C002 and the less significant byte of theanswer in $C003.

CLR $C002 Clear to use for scratch storageCLRA initialise accumulator A to zeroCLRB initialise accumulator B to zero

lsl: LSR $C000 shift bottom bit of $C000 into CBCC dad if this bit is 0 jump to ‘dad’ADDA $C001 add LSB of $C001 to AADCB $C002 add MSB (ie $C002) to B

dad: ASL $C001 double $C001 & top bit to carryROL $C002 carry to lowest bit & double restTST $C000 Set zero flag based on $C000BNE lsl if non-zero branch back to lslSTAB $C002 store MSB of answer in $C002STAA $C003 store LSB of answer in $C003

69

Handout 3 Section E

Addressing Modes

In this section we describe each of the six 6800 ad-dressing modes. Many of these have been used al-ready in previous examples. Here we show how theywork and explain the way that the op-codes of eachinstruction in each mode are presented in the micro-processor data book.The technique for calculating branch offsets in relativeaddressing is described.We then show how the run time of an assembly lan-guage program can be calculated.

70

Addressing Modes

There are 6 different ways in which the data can bespecified when the assembler mnemonics are assem-bled into op-codes.

Extended Full 16 bit address after op-codeImplied No data needs to be specifiedImmediate Data itself (1 byte) comes after op-codeDirect 8 bit address after op-code (top 8 bits = 00)Indexed Address in X reg + 8 bit unsigned offsetRelative 8 bit signed offset used for branches

A list of which addressing modes are available for eachassembler instruction is given in the MicroprocessorData Book.

71

Extended Addressing

We saw earlier that B6 was a hexadecimal op-codefor the LDAA microprocessor instruction. So

LDAA $00F8

is assembled as

B6 00 F8

The full address of the data is given after the op-code.

All op-codes that use extended addressing take up 3bytes of memory. One byte for the op-code and twobytes for the address.

72

Implied Addressing

In this case no address is required. For example:

Mnemonic Op-code OperationABA 1B A + B → ACLRA 4F 0 → ACLRB 5F 0 → BCOMA 43 A → ACOMB 53 B → BNEGA 40 0 − A → ANEGB 50 0 − B → BDECA 4A A − 1 → ADECB 5A B − 1 → BINCA 4C A + 1 → AINCB 5C B + 1 → BSBA 10 A − B → A

Op-codes that use implied addressing only take up asingle byte of program memory.

73

Immediate AddressingIn immediate addressing the 8-bit data is included inthe program memory immediately after the op-code.We indicate that immediate addressing is to be usedwith the # symbol just before the data. For example,to round the number in location $C000 down to thenearest even number below:

LDAA $C000 load contents of $C000 into AANDA #$FE AND each bit of A with the

corresponding bit of $FELeave the answer in A

STAA $C000 store A in location $C000

Note that #$FE is not an address. It is the actual num-ber that is to be used in the program. Op-codes thatuse immediate addressing usually take up 2 bytes ofprogram memory. One byte for the op-code and onefor the data. (Note: there are also some immediateaddressing instructions that take up 3 bytes becausethey involve 16-bit registers.)

We use immediate addressing when we wish to intro-duce constants into the program.

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Direct Addressing

Direct addressing provides a quick way of address-ing the bottom 256 locations in memory. In direct ad-dressing you only provided an 8 bit address and thetop 8 bits of the address are assumed to be zero.

Direct addressing is like extended addressing, exceptthat it only works for the bottom 256 bytes of memory.

Assembler Op-codes Addressing ModeLDAA $00F8 B6 00 F8 ExtendedLDAA $F8 96 F8 Direct

Op-codes that use direct addressing only use up 2bytes of program memory. They are also faster to ex-ecute that op-codes that use extended addressing.

You indicate that you want to use direct addressing byonly providing an 8 bit number as the address.

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Indexed Addressing

In indexed addressing the address of the data is cal-culated by taking the 16 bit number in the index regis-ter (X) and adding a single byte unsigned offset.

You need to make sure that the X register containsthe right value (to use as the address) before you useindexed addressing.

Assembler Op-codes Addressing ModeLDX #$2A00 CE 2A 00 ImmediateLDAA $03,X A6 03 Indexed

Together, these instructions will load accumulator Awith the data from memory at address $2A03.

Op-codes that use indexed addressing take up 2 bytesof program memory. One byte for the op-code andone for the offset.

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Relative Addressing

Relative addressing is only used by branch instruc-tions (BRA, BNE etc.). For example, suppose thatmemory location $1000 is an input port and we wishto keep loading the number from it until we get a pos-itive value.

Assembler Op-codes Addr. Modelab: LDAA $1000 B6 10 00 Extended

BMI lab 2B FB Relative

Branch instructions jump relative to the address of theop-code that would have been executed if the branchwere not taken. In the case above we want to jumpback 5 bytes so the offset is −5, or FB in 2’s comple-ment hex.

B6 10 00 2B FB

As the branch instruction always takes up two bytesof program memory you can also think of it as:

New address = Addr. of branch op-code +2+ Offset

77

Microprocessor Data Book

In the microprocessor data book there is a table thatlists the op-code for each instruction in each availableaddressing mode. The list also contains the numberof clock cycles it takes for the microprocessor to ex-ecute the instruction (∼), and the number of bytes ofprogram memory that the instruction takes up (#).

#OP ~ #OP ~ #OP ~ #OP ~ #OP ~IMPLIED

ADDAADDB

Add

IMMED DIRECT INDEX EXTND

22

9BDB

AB BB8BCB

22 EB

22

33

225

5 334

4FB

ABA 1B 2 1

If you know the clock frequency then you can use thistable to work how long it will take a program to ex-ecute. The clock frequency is often 1 MHz so eachcycle takes 1 µs.

78

Example 1

Write a program to add up the 2 numbers in mem-ory locations $C001 and $C002, putting the sum in$C000. Work out how long the program will take torun if the clock frequency is 1 MHz.

Instructions Op-codes Cycles ∼

LDAA $C001 B6 C0 01 4ADDA $C002 BB C0 02 4STAA $C000 B7 C0 00 5

So 13 CPU cycles are used and the program takes13 µs to run.

79

Example 2

Write a program to add up the 8 numbers in mem-ory locations $C001 to $C008, putting the answer in$C000. Work out how long the program will take torun if the clock frequency is 1 MHz.

Instructions Op-codes Cycles ∼

LDX #$C001 CE C0 01 3CLRA 4F 2

lad: ADDA 0,X AB 00 5INX 08 4CPX #$C009 8C C0 09 3BNE lad 26 F8 4STAA $C000 B7 C0 00 5

Note that the branch offset is −8 (or F8 in 2’s comple-ment).

Before loop = 5 cycles. During loop = 16 cycles.After loop = 5 cycles. So we have 10+8×16 = 138

cycles in total which takes 138 µs.

80

Example 3

One period of a sine wave is stored as byte data inaddresses $E000 to $E0FF. Write a program to out-put all the values repeatedly to a D-to-A converter ataddress $FF00. If the microprocessor has a clock fre-quency of 1 MHz what will be the frequency of the sinewave?

Instructions Op-codes Cycles ∼

outl: LDX #$E000 CE E0 00 3inl: LDAA 0,X A6 00 5

STAA $FF00 B7 FF 00 5CPX #$E0FF 8C E0 FF 3BEQ outl 27 F3 4INX 08 4BRA inl 20 F3 4

One number output, (not end of period) takes 25 cy-cles.One number output at end of period takes 20 cycles.Period takes 255 × 25 + 20 = 6395 cycles.Frequency of sine wave is 1000000

6395 = 156 Hz.

81

The JMP Instruction

There is a limit to how far you can jump with a BRAinstruction. You can only jump 127+2 bytes forwardsfrom the op-code of the BRA instruction or 128 − 2

bytes backwards from it. To jump further you have touse the JMP instruction.

JMP can take either the extended or the indexed ad-dressing mode.

Instructions Op-codes EffectJMP outl 7E 80 00 Jump to address $8000JMP $05,X 6E 05 Jump to address X + 5

Note that the JMP instruction is unconditional. Youcannot do JMP conditional on a test.

82

Handout 3 Section F

The Stack & Subroutines

In this section we describe the operation of the stackand show how this is used in the JSR and RTS in-structions for subroutines.

The handout ends with a brief description of the oper-ation of the microprocessor reset pin.

83

The Stack

The stack is an area of RAM that is allocated by theuser, and used automatically to provide temporary stor-age. The stack is a last-in-first-out store.

The stack pointer (SP) is a 16 bit register that alwayspoints to next empty stack location available. In the6800 the stack grows downwards in memory.

LDS #$EF00 $EF → SPhi, $00 → SPloPSHA A → MSP, SP − 1 → SP

PULA SP + 1 → SP, MSP → A

Think of the stack as like the automatic plate warmingdevices where each time you lift a plate off the top, theother plates are pulled up a bit by springs so that thenext plate is available.

84

EF01

EEFEEEFFEF00 A 4F

EF 00

Before the PSHA instruction.

EF01

EEFEEEFFEF00 A 4F

After the PSHA instruction.

4F

FFEE

SP

SP

85

EF01

EEFEEEFFEF00 A

EF01

EEFEEEFFEF00 A 4F

Before the PULA instruction.

After the PULA instruction.

4F

4F

EE FF

EF 00

SP

SP

Note that the $4F in address $EF00 will now be over-written the next time a value is pushed onto the stack.

86

Push & Pull Example

Swap the numbers in accumulators A and B.

LDS #$EF00 Init stack to high address in RAMPSHA push A onto stackPSHB push B onto stackPULA pull old contents of B into APULB pull old contents of A into B

87

Subroutines

Main program

Subroutine

JSR

RTS

LDSThe JSR instruction pushesthe (16 bit) program counteronto the stack and thenjumps to the address spec-ified.

The RTS instruction pullsa 16 bit address off thestack, putting it in the pro-gram counter. It thus con-tinues program executionfrom where it left off, im-mediately after the JSR in-struction.

Together these instructions enable us to implementsubroutines (subroutines are called ‘procedures’ in highlevel language programming).

88

Subroutine Example

Write a subroutine to double the unsigned 16 bit num-ber stored at $C000 (high byte) and $C001 (low byte).Use the same subroutine to double the 16 bit numberstored at $A000 (high byte) and $A001 (low byte).

The X register is used to pass the address of the num-

bers to be doubled to the subroutine

main: LDS #$EF00 Init stackLDX #$C000 Load X with $C000JSR dub Call dub subroutineLDX #$A000 Load X with $A000JSR dub Call dub subroutineJMP rest Jump past the subroutine

dub: ASL 1,X Double LS byte, top bit → CROL 0,X Double MS byte, C → bottom bitRTS Return from subroutine

rest: . . . The rest of the program89

The Reset PinThe microprocessor has an input connection calledRESET that is used to initialise the processor andstart it running in a predetermined way.Whenever a logic low is detected on the RESET inputthe program counter is loaded from locations $FFFE(high byte) and $FFFF (low byte) and the micropro-cessor then begins execution of the instructions ad-dressed by the program counter.There are two ways in which we need to use the RESETinput.• A reset button can be connected to bring the volt-

age of the RESET pin to 0 V and thereby restartthe microprocessor.

• When power is initially switched on we want tokeep the RESET pin voltage low for a short pe-riod so that the microprocessor starts with a resetoperation and thus initially executes the programat the address stored in $FFFE and $FFFF.

90

Vc

5 V

V+

C

R

Reset button

RESETMicro-processor

Vc = 5

(

1 − exp

(

−t

RC

))

R and C should be set so that Vc does not rise aboveabout 2 V before t = 8µs. This allows roughly 8 clockcycles which is the minimum time required to initiatethe reset sequence.

91