pci-dsp01cpci.co.kr/eng/download/manual/pci/pci-dsp01-manual-ver1... · 2013. 10. 12. · pci-dsp01...

PCI-DSP01 Users Manual (Rev 1.0)

-1- http://www.daqsystem.com

PCI-DSP01 User’s Manual

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Information furnished by DAQ system is believed to be accurate and reliable. However, no responsibility is assumed by DAQ

system for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is

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The information in this document is subject to change without notice and no part of this document may be copied or

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Copyrights 2005 DAQ system, All rights reserved.



-- Contents --

1. Introduction

2. PCI-DSP01 Function

3. Installation

3.1 Contents Confirm

3.2 Installation Sequence

4. PCI-DSP01 Board

4.1 PCI- DSP01 Layout

4.2 Functional Description

4.3 Connecter Pin-out

4.4 Expansion Connecter Pin-out

4.5 Other Connecter Pin-out

4.6 Boot-Mode Option

5. Test

5.1 CDROM Folder Description

5.1 Sample Program Description

5.2 Motion Test

5.3 DIO Bus Input/Output Test

Appendix

A.1 General Specification

A.2 Physical Dimension

Reference



1. Introduction

The PCI-DSP01 is a PCI (Peripheral Component Interconnect) Interface board with using

TMS320C6205 which DSP (Digital Signal Processing) Chip of TI(Texas Instrument) Corp.

If user makes a design through the above DSP chip, it is easy to use that you want. A board is

designed so as to be able to test all functions of chip, an test application and sample DSP program is

provided easily so as usable.

Since it can use an action of a board equips to an empty PCI slot of PC through API programs. Figure

[1-1] shows that the PCI-DSP01 board is operating.

[Figure 1-1. PCI-DSP01 Board Usage]

Figure [1-1] shows that the PCI-DSP01 can interface of external device (RS232, User I/O Bus) with

equipped PCI slot. It can test to load a program on DSP board through PCI Interface self-regulating.



[Figure 1-2. PCI-DSP01 Board Usage]

Figure [1-2] shows connection between real device and PCI-DSP01 board at system. At the left top

side, communicate through 9 Pin D-SUB connecter to RS232. At the left bottom side, it shows that

through by 44 Pin DSUB connecter in and out I/O device with user bus.



2. PCI-DSP01 Function

As shown in the following figure, main control of the PCI-DSP01 is performed in DSP chip, can change

through EPLD (XC9536XL) in case of external bus. (Refer to the schematic)

[Figure 2-1. PCI-DSP01 Board Placement]

1. PCI Interface

Use a PCI Master/Target of a TMS320C6205 DSP Chip.

2. SDRAM

Maximum 64Mbit x 4 (K4S641632)

3. RS232C

UART for McBSP1

4. I/O Expansion

16bit I/O expansion bus and exchangeable EPLD (XC9536XL) program.

5. DSP Signal

ALL DSP Signal (Data, Address, Control) can expand through external connecter.



[TMS320C6205 DSP-CHIP Specification]

[Figure 2-1. TMS320C6205 Function Block Diagram]

A program of FPGA core logic is used to JTAG, it is function of saving and loading program in case of

power start up at FPGA Program Logic.

♦ High-Performance Fixed-Point Digital Signal Processor (DSP) − TMS320C6205

− 5-ns Instruction Cycle Time

− 200-MHz Clock Rate

− Eight 32-Bit Instructions/Cycle

− 1600 MIPS

♦ VelociTIAdvanced-Very-Long-Instruction- Word (VLIW) TMS320C62xDSP Core

− Eight Highly Independent Functional Units:

− Six ALUs (32-/40-Bit)



− Two 16-Bit Multipliers (32-Bit Result)

− Load-Store Architecture With 32 32-Bit General-Purpose Registers

− Instruction Packing Reduces Code Size

− All Instructions Conditional

♦ Instruction Set Features

− Byte-Addressable (8-, 16-, 32-Bit Data)

− 8-Bit Overflow Protection

− Saturation

− Bit-Field Extract, Set, Clear

− Bit-Counting

− Normalization

♦ 1M-Bit On-Chip SRAM

− 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)

− 512K-Bit Dual-Access Internal Data (64K Bytes)

− Organized as Two 32K-Byte Blocks for Improved Concurrency

♦ 32-Bit External Memory Interface (EMIF)

− Glueless Interface to Synchronous Memories: SDRAM or SBSRAM

− Glueless Interface to Asynchronous Memories: SRAM and EPROM

− 52M-Byte Addressable External Memory Space

♦ Four-Channel Boot loading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel

♦ Flexible Phase-Locked-Loop (PLL) Clock Generator

♦ 32-Bit/33-MHz Peripheral Component Interconnect (PCI) Master/Slave Interface

Conforms to:

PCI Specification 2.2

Power Management Interface 1.1 Meets Requirements of PC99

− PCI Access to All On-Chip RAM, Peripherals, and External Memory (via EMIF)

− Four 8-Deep x 32-Wide FIFOs for Efficient PCI Bus Data Transfer

− 3.3/5-V PCI Operation

− Three PCI Bus Address Registers:

Prefetchable Memory

Non-Prefetchable Memory I/O



− Supports 4-Wire Serial EEPROM Interface

− PCI Interrupt Request Under DSP Program Control

− DSP Interrupt Via PCI I/O Cycle

♦ Two Multichannel Buffered Serial Ports (McBSPs)

− Direct Interface to T1/E1, MVIP, SCSA Framers

− ST-Bus-Switching Compatible

− Up to 256 Channels Each

− AC97-Compatible

− Serial-Peripheral-Interface (SPI) Compatible (Motorola)

♦ Two 32-Bit General-Purpose Timers

♦ IEEE-1149.1 (JTAG†) Boundary-Scan-Compatible

♦ 288-Pin Micro-Star BGAPackage (GHK Suffix)

♦ 3.3-V I/Os, 1.5-V Internal, 5-V Voltage Tolerance for PCI I/O Pins



3. Installation

Before installation, inspect the board carton to make sure there are no damages on the board.

3.1 Contents Confirm

1. PCI-DSP01 Board

2. CD (Driver/Manual/API/Sample Source etc.)

3. RS232C Cable

3.2 Installation Sequence

To install your PCI-DSP01 board in your PC, follow the steps described in the document “How to

install PCI DAQ Board” provided by DAQ System. The PCI-DSP01 board is completely Plug &

Play. There are no switches or jumpers to set. Therefore you can install it easily.

Your OS requirements are over Windows 2000 SP4 or Windows XP SP1.

(Notice) If a foreign substances stains gold-plating pin of PCI slot, it becomes a bug because bad

connection in case of PCI board. After an eraser rubs the pin to remove foreign substance,

you can reduce a bug when it is connected slot.

Please check the system information after installation to make sure the success of installation.

Do the following steps to check. The Add new Hardware Wizard will install the driver in the

following process.



If new hardware is found, Wizard will ask you to install the corresponding driver. For installation

of the driver, select the item “Install from a list or specific location (Advanced)” and click “Next”

as in the figure.



If the installation is completely finished, you confirm it in the following ways. Do the following

steps to show up the “Device Manager” window. [My Computer -> properties -> Hardware ->

Device Manager -> Other Devices -> PCI-DSP01]



If you can see the “PCI-DSP01” at the Other devices, the driver installation is to have been

over. (Check the red circle)

Notice : After installation, you should re-boot the system for the proper operation.



4. PCI-DSP01 Board

In this chapter, the primary functions of the board are described briefly. For more information, refer to

the device specification

4.1 PCI-DSP01 Layout

P1

RS232C

J1

DSP

LED1

LED2EPLD OSC

RAM

RESET

J6

JP1

Regulator

J7

J8

I/O BUS

232

T/Rx

BufferEEPROM

FLASH

RAM

RAM RAM

J4

J3

J2

J5

[Figure 4-1. PCI-DSP01 Layout]

The board has two LEDs to indicate the operation status.

- LED1 turns on when the board is ready to operate after supplied power on board.

- LED2 turns on when using test program.



4.2 Functional Description

(1) DSP

All of the board functions are controlled by the DSP Chip.

(2) OSC

The 40MHz clock supplies to the board.

(3) EEPROM

It saves a data of DSP chip functions setup when power up firstly.

(4) Regulator

It supplies power (1.5V) for DSP chip.

(5) FLASH

When the ROM boot, it can load boot program to DSP chip.

(6) RAM

It offers an external maximum 32MB memory.

(7) EPLD

It can change to I/O bus timing and composition.

(8) 232 T/Rx

It converts a signal level exchange for RS232 communication.

(9) Buffer

It is an external I/O bus buffer.

(10) RESET

A board reset.



4.3 Connecter Pin-out

The PCI-DSP01 board has two connecters. One is D-SUB 9 pin connecter P1 for RS232

connection, the other is D-SUB 44 pin connecter J1 for external I/O connection.

Figure [4-2] shows the bracket of the board where P1 and J1 connecter.

3

9

8

7

6

1

2

5

4

3

10

9

8

7

6

1

2

5

4

19

18

17

16

15

14

13

12

11

24

23

22

21

20

26

25

40

27

44

43

42

41

28

29

30

34

33

32

31

39

38

37

36

35

P1

J1

[Figure 4-2. PCI-DSP01 Panel Front View]



[J1 (DSUB-44PIN) Connecter]

Figure [4-3] shows the board’s J1 connecter pin-map.

All pin specification is from EPLD (XC9536XL) to input/output. Refer to schematic and EPLD

program.

3

10

9

8

7

6

1

2

5

4

19

18

17

16

15

14

13

12

11

24

23

22

21

20

26

25

40

27

44

43

42

41

28

29

30

34

33

32

31

39

38

37

36

35

I/O BUS

[Figure 4-3. PCI-DSP01 J1 Connector Pin-out]

[Table 1. J1 Connecter Description]

No. Name Description Remark

1 +5V PCI +5V Output

2 ETOUT0 External Timer0 Output

3 ETINP1 External Timer1 Input

4 EDR0 External DR0 McBSP0

5 EDX0 External DX0 McBSP0

6 EOE1 External Output Enable

7 GND Board GROUND

8 DIO13 Digital I/O 13







13 EEA2 External Address Bus 2



16 RESET# Board Reset Output

17 ETINP0 External Timer0 Input

18 EFSX0 External FSX0 McBSP0

19 ECLKX0 External CLKX0 McBSP0

20 EDIR1 I/O Bus Direction1

21 EOE0 I/O Bus Output Enable0

22 GND Board GROUND






28 NC No Connection Reserved Pin


30 +3.3V +3.3V Output

31 ETOUT1 External Timer1 Output

32 ECLKR0- External CLKR0 McBSP0

33 EFSR0 External FSR0 McBSP0

34 EDIR0 I/O Bus Direction0

35 GND Board GROUND

36 GND Board GROUND








44 +3.3V +3.3V Output

(Notice) 1. Refer to the schematic for more specification.

2. Refer to the EPLD Program (VHDL) for each pin information.

3. User can change a function of each pin through changing EPLD program.



[P1 (DSUB-9PIN) Connecter]

Figure [4-4] shows the board’s P1 connecter pin-map.

All pin specification is from RS232 standard to input/output. Refer to schematic and EPLD program.

3

9

8

7

6

1

2

5

4

RS232C

[Figure 4-4. PCI-DSP01 P1 Connector Pin-out]

[Table 2. P1 Connecter Description]


1 NC No Connection

2 RX RS232C Receiver

3 TX RS232C Transmitter

4 NC No Connection

5 GND Ground

6 NC No Connection

7 NC No Connection

8 NC No Connection

9 NC No Connection



4.4 Expansion Connecter Pin-out

The PCI-DSP01 can test all function of TMS320C6205 DSP chip because of DSP chip PIN

(Address, Data, Control, Peripheral Function Signal) connected to external connecter. This

connecter is J4, J6, J8.

3

10 9

8 7

6

12

5

4

19

18 17

16 15

14 13

12 11

24 23

22 21

20

26 25

40

2728

2930

34 33

32 31

39

38 37

36 35

J6

J4

3

10 9

8 7

6

12

5

4

19

18 17

16 15

14 13

12 11

24 23

22 21

20

26 25

40

2728

2930

34 33

32 31

39

38 37

36 35

J8

3

10

9

87

6

12

5

4

19

18

17

16

15

14

13

12

11

24

23

22

21

2026

25

40

27

28

29

30

34

33

32

3139

38

37

36

35

(Notice) 1. Refer to schematic for more specification.

2. Refer to TMS320C6205 User Manual for each pin description.



1 GND Board GROUND

2 GND Board GROUND

3 RESET# Board Reset Output

4 TOUT0 Timer 0 Output

5 TINP0 Timer 0 Input

6 TOUT1 Timer 1 Output



7 TINP1 Timer 1 Input

8 FSX1 McBSP1

9 CLKR1 McBSP1

10 CLKS1 McBSP1

11 CLKX1 McBSP1

12 DR1 McBSP1

13 DX1 McBSP1

14 FSR1 McBSP1

15 NMI None Maskable Interrupt

16 FSX0 McBSP0

17 CLKR0 McBSP0

18 CLKS0 McBSP0

19 CLKX0 McBSP0

20 DR0 McBSP0

21 DX0 McBSP0

22 FSR0 McBSP0

23 GND Board GROUND

24 GND Board GROUND

25 INUM2 Interrupt Identification number 2




29 EXT_INT7 External interrupt 7

30 IACK Interrupt Acknowledge



33 DMAC3 DMA Channel3




37 PD Power Down mode output


39 +3.3V +3.3V Output

40 +3.3V +3.3V Output





1 NC No connection

2 SD_CLK SDRAM Clock

3 GND Board GROUND

4 GND Board GROUND

5 ED0 External Data 0
















21 GND Board GROUND

22 GND Board GROUND



















39 +3.3V +3.3V Output

40 +3.3V +3.3V Output



1 CE2 Chip Enable 2

2 CE3 Chip Enable 3

3 GND Board GROUND

4 GND Board GROUND

5 EA21 External Data 0

6 CE1 Chip Enable 1

7 EA19 External Address 19














21 GND Board GROUND

22 GND Board GROUND








28 ARE Asynchronous Read Enable

29 AOE Asynchronous Output Enable

30 AWE Asynchronous Write Enable

31 HOLD# Hold Request

32 ARDY Asynchronous Ready

33 BE0 Byte Enable 0

34 HOLDA# Bus Hold Acknowledge



37 CE0 Chip Enable 0


39 +3.3V +3.3V Output

40 +3.3V +3.3V Output

4.5 Other Connecter Pin-out

The PCI-DSP01 has a lot of connecters and jumpers for board test and booting option setup. This

connecter function is as below pictures.

3

6

12

5

4

GND VCC(+3.3V)

TDO

TMS

TCK

TDI

JP1

JP1 Connecter (Top View)

The JP1 use to test program of board EPLD chip. It is not use normal state.

2 1

JP3

EMU 5 +3.3V

JP3 Connecter (Top View)

The JP3 choose a power supply whether or not to use DSP Emulator power or own power.

Generally not to use jumper, it use the Emulator own power.



3

6

12

5

4

J2

8 7

J2 Connecter (Top View)

The J2 use to test interrupt when external interrupt of DSP chip occurred by passive manual.

3

1

2

J5


The J5 use it in case of using Aux power.

3

6

1

2

5

4

J3

8

7 9

10

11

12

13

14


The J3 use to connect DSP Emulator.



4.6 Boot-Mode Option

The PCI-DSP01 has a lot of connecters and jumpers for board test and booting option setup. This

connecter is as below pictures.

3

6

1

2

5

48

79

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

Default Jumber

Short : 1

Open : 0

J7



1 Pull-Up 10K Pull-up

2 Boot Mode Boot Mode select bit 0










12 EEPROM Select EEPROM Size bit 0






18 Endian Select Endianness




20 Auto Select EEPROM auto-initialization


22 PLL0 PLL configuration 0





(Notice) 1. Refer to the PCI-DSP01 reference manual for more specification.

2. Refer to the TMS320C6205 User Manual for each pin description.



5. Test

In this chapter, the functional test will be explained to discriminate board mal-functions and the

operation of the PCI-DSP01 board for the user being familiar.

5.1 CDROM Folder Description

The test implement program accompanying CDROM (Driver, Application, DSP Firmware). We

explain each folder in CDROM briefly.

[Figure 5-1. CDROM Folder Structure]

(1) Driver

There is a WDM driver to install a board to PC.

(2) Firmware

There is a sample DSP program. It made to a project of Code-composer Studio of TI company.

(3) Hardware

There is a board schematic.

(4) Manual

There is a manual of User and Reference.

(5) Software

There is an application program for PC. (Visual C++ 6.0)

(Notice) The API is provided only “DLL” type.



5.2 Sample Program

DAQ system provides a sample program to make the user be familiar with the board operation and

to make the program development easier. You can find the sample program in the CDROM

accompanying with the PCI-DSP01 board. Before using it, you have to install the board and its drivers

in your computer

Sample program is provided in source form in order to show the usage of API(Application

Programming Interface) of the board and may be modified for customer’s own usage.

[Figure 9-1. When Sample program “DSP01_test.exe’ is executed]

To run the sample application program, you need to use API, it is a form of client DLL. To compile

the sample source to make its executable file, you have to use Import Library files and header files.

You can find them in the CDROM. To run the .exe file, the API DLL file (PCI_DSP01.DLL) must be

in the same directory with the .exe file or Windows system folder. Another method is to add the

directory of API DLL file to PATH environmental variable.



After the PCI-DSP01 board install at PC, the board has three memory area (resource) allotment.

One is I/O area, the other is Memory area. User can confirm it sample program.

First Memory area (Range0) can access all address of DSP chip, the memory size is limited to

one page (4MByte) that it can approach at a time. But, when a page value of DSP page register

exchange, it can confirm all DSP address area.

Second Memory Area (Range1) can access DSP Peripheral register. The base address is

“0x0180000”.

There is 4 I/O Register (Host Status Register, etc.) at I/O area. It is three only can read and

write.

(Notice)1. Refer to PCI-DSP01 reference manual for specific contents.

2. Refer to TMS320C6205 User Manual for each pin description

3. You can’t access Reserved Memory Area (When it happens, you must reboot PC).

We explain a program usage briefly.

(1) Development Program 영역

You load a DSP firmware to the board (Press “Program Load” button). The firmware shall be

made to Intel Hex file format.

(2) PCI Memory Range0 (4M byte)

You can test read/write a data of address area. One page is 4M byte, total 0x400(1024) page

can set up.

(3) PCI Memory Range1 (8M Byte)

You can read or write a value of register (total 8M byte area mapping).

(4) PCI IO Register Range0 (16 Byte)

Read or Write to three I/O register that can control board motion and confirm board motion

state.



5.3 Motion Test

After power up, install the driver. When power on, you can check the power operation through

LED1 and LED2 light on.

After connect PC and board through RS232C cable, execute ”COMM.exe” of communication

program. The communication set up 115200bps, 8 data bit, 1 stop bit, none of parity bit.

After execute sample program like as Figure [5-2], press “Find” button. And, find the DSP firmware

(monitor.a03) for test and set up to editor box. Press “Program Load”, the firmware is loaded

program RAM area of DSP. After loading, press “Run” button and let it execute program. When

program is executed, LED1 light on/off (You can confirm it through DSP firmware source).

And, the data is transmitting through RS232 connecter, you can confirm that “COMM.exe” program

or other terminal program using as Figure [5-3].

[Figure 5-3. RS232 Communication]

When press button from “0” to “3” at the communication program, a menu message display at

the communication program. This show the communication state is in good order.

Press “Memory0 Read” button and “Memory1 Read” button, you check that data is marked like



Figure [5-2]. You confirm the data record whether or not designated in a position through press

“Write At” button. At this time offset and value have to record exactly. (32bit Access)

5.4 DIO Bus Input/Output Test

It executes a data reading/writing test to external bus through J1 connecter.

(Notice) As soon as possible, release a expansion board (DSP-ADP01) for test.



Appendix

A.1 General Specification

Specification

General TMS320C6205 Fixed-Point DSP chip

XC9536XL EPLD

16MByte SDRAM(Max 64MB)

32Mbit Flash Memory

Interface PCI Specification 2.2

All DSP signal extension connector

RS232 through McBSP1

DSP Program Load through PCI

Functions

5-ns Instruction Cycle Time

200MHz Clock Rate

1M-Bit On-Chip SRAM

Software

Supported OS Windows 2000 SP4 above/ Windows XP SP1 above

DSP Program C6000, Code composer studio

Sample Software Basic DSP firmware source, Sample application source



A.2 Physical Dimension



References

1. TMS320C6205 FIXED-POINT Digital Signal Processor User’s manual

-- Texas Instrument

2. PCI Local Bus Specification Revision2.1

-- PCI Special Interest Group

3. How to install PCI DAQ Board

-- DAQ system

4. AN201 How to build application using API

-- DAQ system

5. PCI-DSP01 Reference Manual

-- DAQ system

6. PCI-DSP01 API Manual

-- DAQ system

pci-dsp01cpci.co.kr/eng/download/manual/pci/pci-dsp01-manual-ver1... · 2013. 10. 12. · pci-dsp01...

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