pcn apg-mid/13/7698 dated 13 mar 2013approved: p. zabberoni date: 22/02/2013 page: 5 of 11 3...

PCN APG-MID/13/7698Dated 13 Mar 2013

M10 PROCESS: CROLLES 12" SECOND SOURCE QUALIFICATION

1/31

PRODUCT/PROCESSCHANGE NOTIFICATION®

PCN APG-MID/13/7698 - Dated 13 Mar 2013

Table 1. Change Implementation ScheduleForecasted implementation date for 14-Oct-2013 change

Forecasted availability date of samples 20-Mar-2013 for customer

Forecasted date for STMicroelectronicschange Qualification Plan results availability 01-Jul-2013

Estimated date of changed product first 15-Nov-2013 shipment

Table 2. Change IdentificationProduct Identification CMOSM10 products (Product Family/Commercial Product)

Type of change Waferfab additional location

Reason for change To support volumes rump-up

Description of the change Qualification of Crolles 12 inch fab for CMOSM10 process, besideRousset 8", to support volumes ramp-up.

Change Product Identification "VQ" as plant identification for Crolles 12"

Manufacturing Location(s)

® 2/31

PCN APG-MID/13/7698 - Dated 13 Mar 2013

DOCUMENT APPROVAL

Name Function

Duncan, Martin Russell Marketing Manager

Brambilla, Daniele Alfred Product Manager

Mervic, Alberto Q.A. Manager

® 4/31

M10 PROCESS: CROLLES 12" SECOND SOURCE QUALIFICATION

WHAT: This notification deals with the product qualification of 32-bit microcontrollers in 90nm eNVM M10 technology. Aim of this qualification is to create a second Front End manufacturing source for these devices at 12 inches.

WHY: To improve supply chain and guarantee deliver to customers also in case of peak demand.

HOW: See attached preliminary reliability reports for the two test vehicles chosen to qualify M10 in Crolles:

Andorra 4M (Silicon line FA80 – REPORT RR000813AG6050)

Pictus 512K (Silicon line FP50 – REPORT RR000413AG6050)

Process and test vehicles qualification is forecasted in the next 3 months. Engineering samples for the two test vehicles Andorra 4M & Pictus 512K are available.

Forecast for all other products is:

Monaco 1.5M: Qualification end Q4 – 13 Eng Sample availability Q3 -13 Leopard 1M: Qualification end Q1 – 14 Eng Sample availability Q4 -13 Bolero 3M: Qualification Q2 – 14 Eng Sample availability Q4 -13 Andorra 2M Qualification Q3 – 14 Eng Sample availability Q4 -13 Leopard 2M Qualification Q4 - 14 Eng Sample availability Q4 -13

WHEN:

Start of production is foreseen in Crolles from Q4/13 onward.

Full traceability between the two diffusion plants is guaranteed by dedicated finished goods codes printed on product labels and 2-digit for diffusion site printed on product traceability codes (VQ for Crolles 12”, VG for Rousset 8”).

RELIABILITY REPORT PRELIMINARY

APG – Q&R Digital Products RR000813AG6050

Andorra 4M cut 3.0 - Crolles

Auth: M. De Tomasi Approved: P. Zabberoni Date: 22/02/2013 Page: 1 of 11

Preliminary Reliability Report New Product Revision / FAB Transfer

General Information Locations

Product Line FA80 Wafer fab location Crolles 2

Product Description Andorra 4M cut 3.0 Assembly plant location ST KIRKOP - MALTA

Commercial Product SPC564A80L7 Product Group APG Final Assessment

Product division MID

Reliability assessment

Qualification exercise on going

Package LQFP 176 Silicon process technology CMOS M10

DOCUMENT HISTORY

Version Date Author Comment

0.1 22/02/2013 M. De Tomasi First Document release with preliminary results available

RELEASED DOCUMENT





TABLE OF CONTENTS

1 RELIABILITY EVALUATION OVERVIEW.................... ..................................................................................... 3

1.1 OBJECTIVES ............................................................................................................................................... 3 1.2 CONCLUSIONS ............................................................................................................................................ 3

2 TRACEABILITY ...................................... ........................................................................................................... 4 2.1 WAFER FAB INFORMATION ........................................................................................................................... 4 2.2 PACKAGE OUTLINE/MECHANICAL DATA ......................................................................................................... 4 2.3 FINAL TESTING INFORMATION: ...................................................................................................................... 4 2.4 LOT INFORMATION: ..................................................................................................................................... 4

3 RELIABILITY PLAN AND TESTS RESULTS ................ ................................................................................... 5 3.1 CONDITIONS ............................................................................................................................................... 5 3.2 TABLES ENTRY LEGEND ............................................................................................................................... 5 3.3 ENVIRONMENTAL STRESS TEST (Q100 GROUP A) ......................................................................................... 5 3.1 LIFETIME STRESS TEST (Q100 GROUP B) .................................................................................................... 7 3.1 ELECTRICAL VERIFICATION TEST (Q100 GROUP E) ..................................................................................... 10

4 REVISION TRACKING ................................. .................................................................................................... 11





1 RELIABILITY EVALUATION OVERVIEW

1.1 Objectives Aim of this document is to report the reliability trials results achieved on Andorra 4M cut 3.0

qualification exercise in order to release the device to production volume in Crolles. Andorra 4M cut 3.0 is processed in Crolles2 FAB using CMOS M10 (90 nm) technology and it

is assembled in Malta-ST assy in LQFP176 package Andorra 4M embeds the FLS Flash module. Considering that Andorra4M is the first M10 product with 6 metal layers and FLS Flash

diffused in Crolles, no similarity with other products could be considered. The qualification exercise is based on three diffusion lots of Cut 3.0 coming from Crolles: assy

reports required on all the qualification lots. The M10 (90nm technology) process is qualified in R8 Fab since wk 22, 2009. The qualification exercise for this new product is in respect of Q100 revG.

1.2 Conclusions Qualification exercise is still ongoing. Package trials completed with positive results. ESD & Latch-Up completed with positive results.





2 TRACEABILITY

2.1 Wafer fab information DIE FEATURES

Diffusion Site Crolles 2

Wafer Diameter (inches) 12

Process Technology CMOS M10

Passivation USG – Nit UV

Die finishing back side Lapped Silicon

2.2 Package outline/Mechanical data LQFP 176

Package Description LQFP 176 24x24x1.4

Assembly Site ST KIRKOP – MALTA

Die Attach material GLUE ABLEBOND 3280T

Molding compound RESIN SUMITOMO EME-G700LS D14mm W4.4g

Substrate/Leadframe FRAME LQFP 176L 24SQ 12sq 7025 DS.2 RgAg Wires bonding materials/diameters

WIRE Au 2N GPG2 D0.9 BL9-13 sp2x2

2.3 Final testing information: PACKAGE FEATURES

Electrical Testing manufacturing location : ST KIRKOP – MALTA

Tester : Teradyne J750

2.4 Lot Information: Product Lot # Package Diffusion

Andorra 4M cut 3.0

L1 LQFP176 Q211SDA

L2 LQFP176 Q211SNM

L3 LQFP176 Q211STP





3 RELIABILITY PLAN AND TESTS RESULTS

3.1 Conditions Room test temperature is 25°C Hot test temperature is 150°C Cold test temperature is -40°C

3.2 Tables entry legend Symbol How to read ☐ Action or condition has not to be considered ☒ The action/condition has been done/applied during the trial

N.P. The trial or readout is not in the Qualification Plan and thus has not been performed

3.3 Environmental stress test (Q100 group A) Test

Step RESULTS Notes

N TEST NAME CONDITIONS [SPEC] LOT 1 LOT 2 LOT 3

1 PC MSL 3

[J-STD-020]

☒ Testing at Room

☒ Testing at Hot

☒ Testing at Cold ☒ Sonoscan pre / post

☐ Die visual inspection post trial ☐ Die cross section post trial

24h bake@125°C,

192h@30°C/60%RH 3x Reflow simulation

Choose an item. Peak Temp

Pre 0/77 0/77 0/77

Post 0/77 0/77 0/77

2 THB

Temperature Humidity Bias

[JESD22-A101/A110] ☒ AfterJedec PC MSL3 ☒ Testing at Room ☒ Testing at Hot

☐ Testing at Cold ☐ Sonoscan pre / post ☐ WPT pre / post

☐ WBS pre / post ☐ Die visual inspection post trial ☐ Die cross section post trial

Ta=85°C, 85%RH, 1000hrs

0 hrs 0/77 0/77 0/77

500 hrs 0/77 0/77 0/77

1000 hrs 0/77 0/77 0/77





Test Step

RESULTS Notes N TEST NAME CONDITIONS [SPEC] LOT 1 LOT 2 LOT 3

3 AC Autoclave

[JESD22-A102/A118]

☒ AfterJedec PC MSL3 ☒ Testing at Room

☐ Testing at Hot ☐ Testing at Cold ☐ Sonoscan pre / post

☐ WPT pre / post

☐ WBS pre / post ☐ Die visual inspection post trial ☐ Die cross section post trial

P=2.08atm Ta=121°C, 96hrs

0 hrs 0/77 0/77 0/77

96 hrs 0/77 0/77 0/77

4 TC

Temperature Cycling

[JESD22-A104]

☒ AfterJedec PC MSL3 ☒ Testing at Room ☒ Testing at Hot

☒ Testing at Cold

☒ Sonoscan pre / post ☒ WPT pre / post

☒ WBS pre / post


Ta=-50°C /+150 °C 1000 cyc

0 cyc 0/77 0/77 0/77

500 cyc 0/77 0/77 0/77

1000 cyc 0/77 0/77 0/77

5

HTSL High

Temperature Storage Lifetime

[JESD22-A103] ☒ AfterJedec PC MSL3 ☒After 1k W/E cyc @125°C ☒ Testing at Room

☒ Testing at Hot

☐ Testing at Cold

☐ Sonoscan pre / post ☐ WPT pre / post ☐ WBS pre / post


Ta= 150ºC, All0 Pattern

1000hrs

0 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.





3.1 Lifetime stress test (Q100 Group B) Test

Step Results

Notes N TEST NAME CONDITIONS [SPEC] Lot 1 Lot 2 Lot 3

6 HTOL

High Temp. Operating Life

[JESD22-A108]

☐ After Jedec PC MSL3 ☐ After 100 TC ☒ After 1k W/E cyc @125°C ☒ Testing at Room, Hot, Cold ☒ Drift Analysis on Key

parameters at Room, Hot, Cold

Ta=125ºC, Tj=150°C VDD+20% 1000hrs

0 hrs 0/77 0/77 0/77

168 hrs 0/77 0/77 0/77

500 hrs 0/77 0/77 0/77

1000 hrs 0/77 0/77 0/77

7 LTOL

Low Temp. Operating Life

[JESD22-A108]

☐ After Jedec PC MSL3 ☐ After 100 TC ☒ After 1k W/E cyc @125°C ☒ Testing at Room, Hot, Cold ☐ Drift Analysis on Key

parameters at Choose an item.

Ta= -40ºC, VDD+20%

1000hrs

0 hrs N.P. 0/77 N.P.

168 hrs N.P. 0/77 N.P.

500 hrs N.P. 0/77 N.P.

1000 hrs N.P. 0/77 N.P.

8 ELFR

Early Life Failure Rate

[AEC Q100-008] ☒ Testing at Room, Hot

Ta= 125ºC, Tj=150°C, 48 hrs

48hrs Running Runni

ng Runni

ng

9

HTDR High Temp.

Data Retention

[AEC Q100-005]

☐ After Jedec PC MSL3 ☒ After 1k W/E cyc @125°C ☒ Vth Drift Analysis


2000hrs

0 hrs 0/77 0/77 0/77

168 hrs 0/77 0/77 0/77

500 hrs 0/77 0/77 0/77

1000 hrs 0/77 0/77 0/77

2000 hrs 0/77 0/77 0/77

10.a FET @25°C

[AEC Q100-005]

☒ Drift Analysis on Flash key parameters at Room

Ta= 25ºC

100k Write/Erase cyc

10k cyc 0/77 0/77 0/77

50k cyc 0/77 0/77 0/77

100k cyc 0/77 0/77 0/77

10.b

HTDR After FET

☒ Vth Drift Analysis

Ta= 150ºC, All0 Pattern 168hrs (1000hrs monitoring)

168 hrs 0/77 0/77 0/77

Test Step Results Notes





N TEST NAME CONDITIONS [SPEC] Lot 1 Lot 2 Lot 3

11.a FET @125°C

[AEC Q100-005]

☒ Drift Analysis on Flash key parameters at Room

Ta= 125ºC


10k cyc Running Runni

ng Runni

ng


ng Runni

ng


ng Runni

ng

250k cyc N.P. N.P. N.P.

11.b HTDR After FET



168 hrs Running Runni

ng Runni

ng

12.a FET @-40°C

[AEC Q100-005]

☒ Drift Analysis on Flash key parameters at Choose an item.

Ta= -40ºC


10k cyc N.P. N.P. 0/77

50k cyc N.P. N.P. 0/77

100k cyc N.P. N.P. 0/77

250k cyc N.P. N.P. N.P.

12.b HTDR After FET



168 hrs N.P. N.P. 0/77

13

LTDR Low Temp.

Data Retention

[AEC Q100-005]


After 0k W/E cyc @25°C

Ta= 60ºC, All0 Pattern 2000hrs

0 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.

2000 hrs 0/77 N.P. N.P.

14

LTDR Low Temp.

Data Retention

[AEC Q100-005]




0 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.

2000 hrs 0/77 N.P. N.P.

15

LTDR Low Temp.

Data Retention

[AEC Q100-005]




0 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.

2000 hrs 0/77 N.P. N.P.





Test Step

Results Notes


16

LTDR Low Temp.

Data Retention

[AEC Q100-005]




0 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.

2000 hrs 0/77 N.P. N.P.

17 Flip Bit

[AEC Q100-005]


After 1 W/E cyc @25°C

Ta= 25ºC, Chk Pattern 1000hrs

0 hrs N.P. 0/77 N.P.

168 hrs N.P. 0/77 N.P.

500 hrs N.P. 0/77 N.P.

1000 hrs N.P. 0/77 N.P.

18.a

Read Disturb


Ta= 25ºC; 4,5V Stress





3.1 Electrical verification test (Q100 Group E) Test

Step RESULTS

Notes N TEST NAME

CONDITIONS [AEC Q100] Cut 3.0

1.a ESD HBM HBM = 2kV Final result PASSED

1.b ESD MM MM = 200V Final result PASSED

1.c ESD CDM CDM = 500V / 750V corner only Final result PASSED

2.a LU Current Injection = Level B +/- 100 mA Final result PASSED

2.b LU Supply Voltage = Level B 1.5xVmax Final result PASSED





4 REVISION TRACKING Rev 0.1: First document release with incomplete results available.



PICTUS 512K CUT 3.4 - CROLLES

Auth: L. Cola Approved: P. Zabberoni Date: 22/02/2013 Page: 1 of 8

Preliminary Reliability Report Fab Transfer

General Information Locations

Product Line FP5003 Wafer fab location Crolles 2

Product Description Pictus 512k cut 3.4 Assembly plant location ST KIRKOP - MALTA

Commercial Product SPC560P50 Product Group APG Final Assessment

Product division MID

Reliability assessment

Qualification exercise on going

Package LQFP144 Silicon process technology CMOS M10

DOCUMENT HISTORY

Version Date Author Comment 0.1 29/01/2013 L. Cola First document draft

0.5 07/02/2013 L. Cola First document release with preliminary results available 0.6 22/02/2013 L. Cola Document Format review

RELEASED DOCUMENT





TABLE OF CONTENTS

1 RELIABILITY EVALUATION OVERVIEW.................... ..................................................................................... 3

1.1 OBJECTIVES ............................................................................................................................................... 3 1.2 CONCLUSIONS ............................................................................................................................................ 3

2 TRACEABILITY ...................................... ........................................................................................................... 4 2.1 WAFER FAB INFORMATION ........................................................................................................................... 4 2.2 PACKAGE OUTLINE/MECHANICAL DATA ......................................................................................................... 4 2.3 FINAL TESTING INFORMATION: ...................................................................................................................... 4 2.4 LOT INFORMATION: ..................................................................................................................................... 4

3 RELIABILITY PLAN AND TESTS RESULTS ................ ................................................................................... 5 3.1 CONDITIONS ............................................................................................................................................... 5 3.2 TABLES ENTRY LEGEND ............................................................................................................................... 5 3.3 LIFETIME STRESS TEST (Q100 GROUP B) .................................................................................................... 5 3.4 ELECTRICAL VERIFICATION TEST (Q100 GROUP E) ....................................................................................... 7

4 REVISION TRACKING ................................. ...................................................................................................... 8





1 RELIABILITY EVALUATION OVERVIEW

1.1 Objectives Aim of this document is to report the reliability trials results achieved on Pictus 512k Cut 3.4

qualification exercise, in order to release the device to production volume in Crolles. Pictus 512k Cut 3.4 is processed in Crolles2 FAB using CMOS M10 (90 nm) technology and it

is assembled in Malta-ST assy in LQFP144 package. Pictus 512k Cut 3.4 embeds the ST Flash module. Considering that Pictus 512K is the first M10 product with 4 metal layers and ST Flash diffused

in Crolles, no similarity with other products could be considered. The qualification exercise is based on three diffusion lots of Cut 3.4 coming from Crolles2: assy

reports required on all the qualification lots. The M10 (90nm technology) process is qualified in R8 Fab since wk 22, 2009. The qualification exercise for this new product is in respect of Q100 revG.

1.2 Conclusions Qualification exercise is still ongoing. Die oriented qualification trials have been completed with positive results. Neither functional

nor parametric rejects were detected at final electrical testing. Parameter drift analysis performed on samples submitted to die oriented test showed a good

stability of the main electrical monitored parameters. ESD & Latch-Up completed with positive results.





2 TRACEABILITY

2.1 Wafer fab information DIE FEATURES

Diffusion Site Crolles 2

Wafer Diameter (inches) 12

Process Technology CMOS M10

Passivation USG – Nit UV

Die finishing back side Lapped Silicon

2.2 Package outline/Mechanical data LQFP 144

Package Description LQFP 144 20x20x1.4

Assembly Site ST KIRKOP – MALTA

Die Attach material GLUE ABLEBOND 3280T

Molding compound SUMITOMO EME-G700LS D14mm W3.7g

Substrate/Leadframe FRAME LQFP 144L 20x20 6x6 DS.1mmOpB RgAg Wires bonding materials/diameters

WIRE Au 2N GPG2 D0.9 BL9-13 sp2x2

2.3 Final testing information: PACKAGE FEATURES

Electrical Testing manufacturing location : ST KIRKOP – MALTA

Tester : Teradyne J750

2.4 Lot Information: Product Lot # Package Diffusion

Pictus 512k Cut 3.4

L1 LQFP144 Q204IKD

L2 LQFP144 Q205EAK

L3 LQFP144 Q205CZA





3 RELIABILITY PLAN AND TESTS RESULTS

3.1 Conditions Room test temperature is 25°C Hot test temperature is 125°C Cold test temperature is -40°C

3.2 Tables entry legend Symbol How to read ☐ Action or condition has not to be considered ☒ The action/condition has been done/applied during the trial

N.P. The trial or readout is not in the Qualification Plan and thus has not been performed

3.3 Lifetime stress test (Q100 Group B) Test

Step Results


1 HTOL

High Temp. Operating Life

[JESD22-A108]

☐ After Jedec PC MSL3 ☐ After 100 TC ☒ After 1k W/E cyc @125°C ☒ Testing at Room, Hot, Cold ☒ Drift Analysis on Key

parameters at Room, Hot, Cold

Ta=125ºC, Tj=150°C VDD+20% 1000hrs

0 hrs 0/77 0/77 0/77

168 hrs 0/77 0/77 0/77

500 hrs 0/77 0/77 0/77

1000 hrs 0/77 0/77 0/77

2 ELFR

Early Life Failure Rate

[AEC Q100-008] ☒ Testing at Room, Hot, Cold

Ta= 125ºC, Tj=150°C, 48 hrs

48hrs Running Running Running

3

HTDR High Temp.

Data Retention

[AEC Q100-005]

☐ After Jedec PC MSL3 ☒ After 1k W/E cyc @125°C ☒ Vth Drift Analysis


1000hrs (2000hrs monitoring)

0 hrs 0/77 0/77 0/77

168 hrs 0/77 0/77 0/77

500 hrs 0/77 0/77 0/77

1000 hrs 0/77 0/77 0/77

2000 hrs 0/77 0/77 0/77

4.a FET @25°C

[AEC Q100-005]

☒ Drift Analysis on Flash key parameters at Room, Hot, Cold

Ta= 25ºC


10k cyc 0/77 0/77 0/77

50k cyc 0/77 0/77 0/77

100k cyc 0/77 0/77 0/77

4.b HTDR After FET



168 hrs 0/77 0/77 0/77





Test Step

Results Notes


5.a FET @125°C

[AEC Q100-005]


Ta= 125ºC


10k cyc 0/77 N.P. N.P.

50k cyc 0/77 N.P. N.P.

100k cyc 0/77 N.P. N.P.

5.b HTDR After FET



168 hrs 0/77 N.P. N.P.

6.a FET @-40°C

[AEC Q100-005]


Ta= -40ºC


10k cyc 0/77 N.P. N.P.

50k cyc 0/77 N.P. N.P.

100k cyc 0/77 N.P. N.P.

6.b HTDR After FET



168 hrs 0/77 N.P. N.P.

7

LTDR Low Temp.

Data Retention

[AEC Q100-005]



0 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.

2000 hrs 0/77 N.P. N.P.

8

LTDR Low Temp.

Data Retention

[AEC Q100-005]



0 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.

2000 hrs 0/77 N.P. N.P.

9

LTDR Low Temp.

Data Retention

[AEC Q100-005]



0 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.

2000 hrs 0/77 N.P. N.P.

10 Flip Bit

[AEC Q100-005]


Ta= 25ºC, Chk Pattern 1000hrs

0 hrs 0/77 N.P. N.P.

168 hrs 0/77 N.P. N.P.

500 hrs 0/77 N.P. N.P.

1000 hrs 0/77 N.P. N.P.





Test

Step Results


11.a Read

Disturb


Ta= 25ºC; 4,5V Stress





4 REVISION TRACKING Rev 0.6:

1. Format adjustment on header 2. Added Qualification ongoing statement (page 3)

Rev 0.5:

3. First document release with incomplete results available. Rev 0.1: First document draft

Public Products List®

PCN Title : M10 PROCESS: CROLLES 12" SECOND SOURCE QUALIFICATION PCN Reference : APG-MID/13/7698 PCN Created on : 07-MAR-2013

Subject : Public Products List

Dear Customer,

Please find below the Standard Public Products List impacted by the change:

ST COMMERCIAL PRODUCT

SPC560P44L3BEAAR SPC560P44L3BEAAY SPC560P44L3CEABRSPC560P44L3CEABY SPC560P44L3CEFAR SPC560P44L3CEFAYSPC560P44L5CEFAR SPC560P44L5CEFAY SPC560P44L5CEFBRSPC560P44L5CEFBY SPC560P50L3BEABR SPC560P50L3BEABYSPC560P50L3BEFAR SPC560P50L3BEFAY SPC560P50L3CEFARSPC560P50L3CEFAY SPC560P50L3CEFBR SPC560P50L3CEFBYSPC560P50L5BEAAR SPC560P50L5BEAAY SPC560P50L5BEABRSPC560P50L5BEABY SPC560P50L5BEFAR SPC560P50L5BEFAYSPC560P50L5BEFBR SPC560P50L5BEFBY SPC560P50L5CEFARSPC560P50L5CEFAY SPC560P50L5CEFBR SPC560P50L5CEFBYSPC563M64L5COAR SPC563M64L5COAY SPC563M64L5COBR SPC563M64L5COBY SPC563M64L7COAR SPC563M64L7COAY SPC563M64L7COBR SPC563M64L7COBY SPC564A74B4CFAR SPC564A74B4CFAY SPC564A74L7CFAR SPC564A74L7CFAY SPC564A80B4CFAR SPC564A80B4CFAY SPC564A80B4COBR SPC564A80B4COBY SPC564A80L7CFAR SPC564A80L7CFAY SPC564A80L7CFBR SPC564A80L7CFBY SPC564A80L7CFCR SPC564A80L7COBR SPC564A80L7COBY SPC564L54L3BCFQRSPC564L54L3BCFQY SPC564L54L3BCOQR SPC564L54L3BCOQYSPC564L60L3BCOQR SPC564L60L5BCOQR SPC56EL60L3CBFQYSPC56EL60L3CBFSY SPC56EL60L3CCFQR SPC56EL60L3CCFQYSPC56EL60L3CCFSR SPC56EL60L3CCFXY SPC56EL60L5BBFQRSPC56EL60L5BBFQY SPC56EL60L5CBFQY SPC56EL60L5CBFSRSPC56EL60L5CBFSY SPC56EL60L5CBFXY SPC56EL60L5CBOSRSPC56EL60L5CBOSY SPC56EL60L5CCOSR SPC56EL70L5CBFR SPC56EL70L5CBFY SPC56EL70L5CBZR SPC56EL70L5CBZY

1/1

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7698PpPrdtLst_7698

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