physics of mos structures part i

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  • 8/2/2019 Physics of MOS Structures Part I

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    IHP - MicroelectronicsIm Technologiepark 2515236 Frankfurt (Oder)

    Germany

    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    Physics ofMetal-Oxide-Semiconductor

    (MOS) Structures(Part I)

    Thomas Schrder

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    Overview

    2) Physics of MOS - Structures

    1) MOS structures in important semiconductor device classes

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    Overview of MOS structures in important device applications

    Logic devices: Metal - Oxide Semiconductor Field Effect Transistor

    Besides isolation (see image) of the individual transistorsfrom each other, thermally grown silicon dioxide (SiO2)

    plays a crucial role in the performance of the transistoras the gate dielectric layer.

    transistor physics and the role of dielectricswill be discussed in the lectures held on

    12/2/ 2005

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    Overview of MOS structures in important device applications

    Volatile Memory devices: Dynamic random access memory (DRAM)

    Dielectrics play a crucial role to guarantee the storage ofsufficient charge despite continuously

    shrinking device dimensions

    Volatile memories and the role of dielectrics

    will be discussed in the lectures held on12 / 9 / 2005

    Q is S CC CC

    C V A V d

    = =

    Yesterday:

    planar cells

    Today:

    3D cells

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    Overview of MOS structures in important device applications

    Nonvolatile Memory devices: Flotox and Flash Concepts

    Charge is injected (write) and driven out (erase)by high voltage pulses

    Nonvolatile memories and the role of dielectricwill be discussed in the lectures held on

    12 / 16 / 2005

    Today`s market leader:

    Q /T S CG

    V C =

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    Overview of MOS structures in important device applications

    Nonvolatile Memory devices: Ferroelectric random access memory (Fe-RAM)

    Ferroelectrics allow to store informationwhen the power is switched off

    Volatile memories and the role of dielectricswill be discussed in the lectures held on

    12 / 16 / 2005

    Today and more to come in future:

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    flash FLOTOX

    DRAM

    StorageREQUIREMENTS

    Electrically Stable Interface with

    Few Defect ChargesImportant Important

    Standard

    CMOS

    Nonvoltatile Memories

    -- Negligible

    High Mobility for High Speed Vital Important Negligible Negligible

    Negligible

    Low Leakage &

    Few Dielectrics BreakdownsImportant Important Important Vital

    High Reliability against Hot Carriersinjected from substrate

    Important Important Negligible

    Important

    Thermal & Chemical Stability

    high temp. (850-1000 C)Important Important -- --

    High Reliability against Carriersflowing through films (high QBD, etc.)

    Important Vital Vital

    Important

    High Dielectric Constant Negligible Negligible Negligible Important

    Good Coverage on Steps Negligible Negligible Negligible

    Gate Dielectrics

    in Active FET's

    used as

    Passive Elements

    Overview of MOS strucures in important device applications

    Scaling makes the development of advanced dielectric layersa hot topic in materials research

    Ongoing scaling requires tothin out the dielectric layer

    Dielectric layers need to meet very differentrequirements specific for each application

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    Overview

    2) Physics of MOS - Structures

    1) MOS structures in important semiconductor device classes

  • 8/2/2019 Physics of MOS Structures Part I

    9/13

    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    ( )/ 2 0ms m g F x E q + + =( / )

    F t A i In N n = for p-type( / )

    F t D i In N n = for n-type

    Ideal MOS - Structure

    Very simple system geometry .. but quite complicate physics

    Let`s start with some idealizations:

    1) Work function difference is zero

    Thermal voltage: kt/q

    2) No charged defects in the insulator 3) No current over the dielectric (perfect insulator)

    Ideal MOS structuredrawn for p-type Si

    Fermi Potential

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    Ideal MOS Structure at different biases VG

    If you bias the metal gate at different gate voltages VG, threedifferent situations can in principle arise:(discussion is based here on p-type Si)

    Accumulation;majority carriers accumulate in semiconductor surface region

    Depletion;

    negative charge appears in semiconductor surface regionbecause majority carriers are chased away(uncompensated acceptor atoms rest behind)

    and minority carriers are attracted

    Inversion;

    high negative charge is induced insemiconductor surface region

    more minority than majority carriers(Ei crosses over EF in surface region (intrinsic condition) )

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    / /

    D in(x) N e =n et t =

    / /

    A i p(x)=N e =n et t

    Derive a relationship between the charge in thesemiconductor and the surface band bending

    Band bending:

    zero inside the semiconductor;

    Band bending

    Surface Potential

    Surface potential:

    referenced to Fermi potential

    Note:Arrow downwards (upwards):

    positive (negative) band bending

    Fermi Potential

    Result:Band bending is the sum of surface plus Fermi potential

    Using the band bending (or surface potential) as a function of the distance x from the interface, the chargecarrier concentration can be described as a function of x:

    intrinsic carrier concentrationFor specific doping level NA and ND

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    [ ]2

    D A2

    s s

    (x) q=- =- p(x)-n(x)+N -N

    x

    tA)

    D

    - = 2 F( ,Nx L

    s tD

    AL = qN

    From these relations, the 1 D Poisson equation is solved under the following assumptions:

    1) NA is uniform over x ; 2) Boltzmann statistics; 3) no surface charge quantization

    First Integration:Electric field is givenby potential gradient

    1 D Poisson equation:non-uniform volume charge

    density causes curvatureof potential

    t- / /2

    A t i A tF( ,N )= e + / -1+(n /N ) (e - / -1)t

    Debye Length

    just forcompleteness

    Derive a relationship between the charge in thesemiconductor and the surface band bending

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    IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany www.ihp-microelectronics.com 2005 - All rights reserved

    s ts s s s A

    D

    Q - = 2 F( ,N )L

    m

    The relationship between the charge in thesemiconductor surface and the surface band bending then reads:

    Solid Line: NA = 4*1015 cm-3 ; Dotted Line: NA = 2*10

    17 cm-3

    Influences of doping concentration:1) certainly, Fermi level is a function of doping

    2) the more p-type the wafer, the higher thepotential for inversion

    Accumulation:From the sign of surface band bending:

    semiconductor charge is positive

    Depletion:From the sign of surface band bending:

    semiconductor charge is negative

    Inversion:From the sign of surface band bending:semiconductor charge is negative

    (a) L = 100 nm Transistor; (b) L = 10 nm Transistor:dielectrics has to survive higher electric fields

    Derive a relationship between the charge in thesemiconductor and the surface band bending