pic assenbler tips & tricks
TRANSCRIPT
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Tips and Tricks
Tips and TricksTips and TricksUsing PICmicroUsing PICmicro MCUsMCUs
Tips and TricksTips and TricksUsing PICmicroUsing PICmicro MCUsMCUs
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Tips and Tricks
Increments and DecrementsIncrements and DecrementsIncrements and DecrementsIncrements and Decrements
q 16-Bit Incrementincfsz LOgoto $+2incf HI
q 16-Bit Decrementdecf LOincfsz LO,Wgoto $+2decf HI
q
8-Bit Decrement to 0xFFNOT_AT_FF :decf REGincfsz REG,Wgoto NOT_AT_FF
AT_FF:
q 16-Bit Incrementincfsz LOgoto $+2incf HI
q 16-Bit Decrementdecf LOincfsz LO,Wgoto $+2decf HI
q
8-Bit Decrement to 0xFFNOT_AT_FF :decf REGincfsz REG,Wgoto NOT_AT_FF
AT_FF:
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Tips and Tricks
ComparisonsComparisonsComparisonsComparisons
q 8-Bit Range TestEnter with value to be tested in W.Exits with Carry set if W is in the range [LOVAL toHIVAL], inclusive.
addlw 255-HIVALaddlw (HIVAL-LOVAL)+1
q Compare and SwapCompare the values in registers X and Y. If Y < X,
swap them.
movf X,W ;GRAB X.subwf Y,W ;Y >= X?bc $+3 ;IF SO, JUMP AHEAD.addwf X ;OTHERWISE, X = X + (Y-X) = Y,
subwf Y ; AND Y = Y - (Y-X) = X.
q 8-Bit Range TestEnter with value to be tested in W.Exits with Carry set if W is in the range [LOVAL toHIVAL], inclusive.
addlw 255-HIVALaddlw (HIVAL-LOVAL)+1
q Compare and SwapCompare the values in registers X and Y. If Y < X,swap them.
movf X,W ;GRAB X.subwf Y,W ;Y >= X?bc $+3 ;IF SO, JUMP AHEAD.addwf X ;OTHERWISE, X = X + (Y-X) = Y,subwf Y ; AND Y = Y - (Y-X) = X.
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Tips and Tricks
ComparisonsComparisonsComparisonsComparisons
MinimumEnter with three values stored in registers N1, N2, and N3.Exit with min(N1,N2,N3) in MIN, N1-3 unchanged, W scrambled.
movf N1,w
subwf N2,W
movf N1,W
skpc
movf N2,W
movwf MIN
subwf N3,W
skpc
addwf MIN
MinimumEnter with three values stored in registers N1, N2, and N3.Exit with min(N1,N2,N3) in MIN, N1-3 unchanged, W scrambled.
movf N1,w
subwf N2,W
movf N1,W
skpc
movf N2,W
movwf MIN
subwf N3,W
skpc
addwf MIN
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Tips and Tricks
Bit-ManipulationBit-ManipulationBit-ManipulationBit-ManipulationReverse 7 Bits
Enter with 0ABCDEFG in W. Exits with 0GFEDCBA in W.
movwf source ;source = 0ABCDEFG.
swapf source,w ;W= DEFG0ABC.
btfsc source,3 ;If D = 1, invert D and the 0.
xorlw 0x88 ;After this line, W = 0EFGDABC.
btfsc source,6 ;If A = 1, invert bits A and C.
xorlw 0x05 ;
btfsc source,4 ;If C = 1, invert A and C again.
xorlw 0x05 ;After this line, W = 0EFGDCBA.
btfsc source,2 ;Do the same with E and G.
xorlw 0x50 ;
btfsc source,0 ;
xorlw 0x50 ;After this line, W = 0GFEDCBA.
Reverse 7 BitsEnter with 0ABCDEFG in W. Exits with 0GFEDCBA in W.
movwf source ;source = 0ABCDEFG.
swapf source,w ;W= DEFG0ABC.
btfsc source,3 ;If D = 1, invert D and the 0.
xorlw 0x88 ;After this line, W = 0EFGDABC.
btfsc source,6 ;If A = 1, invert bits A and C.
xorlw 0x05 ;
btfsc source,4 ;If C = 1, invert A and C again.
xorlw 0x05 ;After this line, W = 0EFGDCBA.
btfsc source,2 ;Do the same with E and G.
xorlw 0x50 ;
btfsc source,0 ;
xorlw 0x50 ;After this line, W = 0GFEDCBA.
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Tips and Tricks
Bit-ManipulationBit-ManipulationBit-ManipulationBit-Manipulationq Rotate in Place
Rotate without inserting an extra bit from the carry.Easily extended to multi-bit rotates. Enter with ABCDEFGH inREG. Exits with BCDEFGHA in REG, W scrambled.
rlf REG,Wrlf REG
q Bit-CopyCopy bits from one register to the same position in another.
movf SOURCE,W ;The DEST bits in the positions to;which were copying must not change
xorwf DEST,W ;between this xorwf instruction and
;the xorwf DEST below.
andlw 00000111B ;A "1" in each bit-position were;copying..;this example copies the three LSBs.
xorwf DEST
q Rotate in PlaceRotate without inserting an extra bit from the carry.Easily extended to multi-bit rotates. Enter with ABCDEFGH inREG. Exits with BCDEFGHA in REG, W scrambled.
rlf REG,Wrlf REG
q Bit-CopyCopy bits from one register to the same position in another.
movf SOURCE,W ;The DEST bits in the positions to;which were copying must not change
xorwf DEST,W ;between this xorwf instruction and
;the xorwf DEST below.
andlw 00000111B ;A "1" in each bit-position were;copying..;this example copies the three LSBs.
xorwf DEST
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Tips and Tricks
Bit-ManipulationBit-ManipulationBit-ManipulationBit-Manipulation
q Bit CounterCount the number of "1" bits in a register. On exit, W containsthe number of "1" bits in REG, and REG is scrambled.
rrf REG,Wandlw 0x44subwf REG
movf REG,Wandlw 0x33addwf REG
rrf REG
andlw 0x11addwf REG
rrf REGswapf REG,Waddwf REG,Wandlw 0x0F
q Bit CounterCount the number of "1" bits in a register. On exit, W containsthe number of "1" bits in REG, and REG is scrambled.
rrf REG,Wandlw 0x44
subwf REG
movf REG,Wandlw 0x33addwf REG
rrf REG
andlw 0x11addwf REG
rrf REGswapf REG,Waddwf REG,Wandlw 0x0F
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Tips and Tricks
Bit-ManipulationBit-ManipulationBit-ManipulationBit-Manipulation
q Bit-Number [0-7] to Bitmask [00000001-10000000]; Enter with bit number [0-7] in BITNUM. Exits with bit
mask in W.
movlw 0x01
btfsc BITNUM,1
movlw 0x04
movwf temp
btfsc BITNUM,0
addwf temp
btfsc BITNUM,2
swapf temp
movf temp,w
q Bit-Number [0-7] to Bitmask [00000001-10000000]; Enter with bit number [0-7] in BITNUM. Exits with bit
mask in W.
movlw 0x01
btfsc BITNUM,1
movlw 0x04
movwf temp
btfsc BITNUM,0
addwf temp
btfsc BITNUM,2
swapf temp
movf temp,w
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Tips and Tricks
Bit-ManipulationBit-ManipulationBit-ManipulationBit-Manipulationq
Bit-Setting without Affecting W or Statusq
Bit-Setting without Affecting W or StatusSet to zero:
clrf reg
Set to a power of two:
clrf reg
bsf reg,bit
Set to 255:
clrf reg
decfsz reg
Set a right-aligned group of bits:
clrf reg ;Set bitsbsf reg,6 ;0-5.
decfsz reg ;
Set a left-aligned group of bits:
clrf reg ;Set bits
decfsz reg ;4-7.
bcf reg,4 ;
incfsz reg ;
General method, 2-4 bits set:
clrf reg
bsf reg,bit1
bsf reg,bit2
bsf reg,bit3
bsf reg,bit4
General method, 5-7 bits set:
clrf reg
decfsz reg
bcf reg,unbit1
bcf reg,unbit2
bcf reg,unbit3
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Tips and Tricks
DelaysDelaysDelaysDelaysq
Constant Delay 0-1027 Cyclesq
Constant Delay 0-1027 CyclesWAIT MACRO CYCLES
LOCAL X
IF ((CYCLES) > 1027)ERROR "MUST BE = 0 CYCLES!"ENDIF
X = (CYCLES)%4
IF (X == 1)NOPENDIF
IF (X == 2)GOTO $+1ENDIF
IF (X == 3)NOPGOTO $+1ENDIF
X = (CYCLES)/4
IF (X)
IF (X == 256)X = 0
ENDIF
MOVLW XADDLW -1SKPZGOTO $-2ENDIF
ENDM
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Tips and Tricks
DelaysDelaysDelaysDelaysq
Non-Constant Delay 20-271 Cyclesq
Non-Constant Delay 20-271 Cycles SKIP:
RRF COUNTER
RRF COUNTER
MOVLW 4
SUBWF COUNTER
BCF COUNTER,6
BCF COUNTER,7
LOOP:
NOP
DECFSZ COUNTER
GOTO LOOP
RETURN
MOVLW [NUMBER OF CYCLES]
CALL DELAY
....
; DELAY 20-271 CYCLES. ENTER WITH
; NUMBER OF CYCLES TO DELAY IN W.
;
; DELAY IS INCLUSIVE OF "MOVLW",
; CALL, AND RETURN OVERHEAD.
DELAY:
MOVWF COUNTER
BTFSC COUNTER, 0
GOTO $+1
BTFSS COUNTER, 1
GOTO SKIP
NOP
GOTO $+1
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Tips and Tricks
DelaysDelaysDelaysDelays
Trading Stack Space for RAMTrading Stack Space for RAM
Delay131072: call Delay16384
Delay114688: call Delay16384
Delay98304: call Delay16384
Delay81920: call Delay16384
Delay65536: call Delay16384Delay49152: call Delay16384
Delay32768: call Delay16384
Delay16384: call Delay2048
Delay14336: call Delay2048
Delay12288: call Delay2048
Delay10240: call Delay2048
Delay8192: call Delay2048
Delay6144: call Delay2048
Delay4096: call Delay2048
Delay2048: call Delay256
Delay1792: call Delay256
Delay1536: call Delay256
Delay1280: call Delay256
Delay1024: call Delay256
Delay768: call Delay256
Delay512: call Delay256
Delay256: call Delay32
Delay224: call Delay32
Delay192: call Delay32Delay160: call Delay32
Delay128: call Delay32
Delay96: call Delay32
Delay64: call Delay32
Delay48: call Delay32
Delay32: call Delay4
Delay28: call Delay4
Delay24: call Delay4
Delay20: call Delay4
Delay16: call Delay4
Delay12: call Delay4
Delay8: call Delay4
Delay4: return
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Tips and Tricks
MathMathMathMath
q16-Bit Subtract with Valid Carry-Out
movf SOURCE_LO,W ;DEST = DEST - SOURCE.
subwf DEST_LO ;Note that the Z flag is
movf SOURCE_HI,W ;invalid after the
skpc ;subtraction.incfsz SOURCE_HI,W ;
subwf DEST_HI
;
q8-Bit Add with Valid Carry-In/Out
movf SOURCE,W ;DEST = DEST + SOURCE + CARRYskpnc ;Carry is valid after the
incf SOURCE,W ;addition.
addwf DEST ;
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Tips and Tricks
MathMathMathMath
q RAM-Efficient Moving-Window Average
;CALCULATE NEW_AVERAGE = (255 * OLD_AVERAGE + NEW_SAMPLE)/256.
;ENTER WITH THE NEW SAMPLE IN W. EXITS WITH THE NEW AVERAGE IN W.
AVERAGE:
addwf SUMLO ;SUM = SUM + SAMPLE.movf SUMHI,W ;(AND WHILE WE'RE HERE, PUT THE OLD
skpnc ;AVERAGE IN W).
incf SUMHI ;
subwf SUMLO ;ADJUST THE SUM BY SUBTRACTING THE OLD
skpc ;AVERAGE FROM THE NEW SUM.
decf SUMHI ;
movf SUMHI,W ;W=THE NEW AVERAGE (ADJUSTED SUM/256)
return ;RETURN.
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Tips and Tricks
MathMathMathMath
qTricks with Known-Zero Registers
x rlf KZ,W ;DEST = DEST + SOURCE +
CARRY.
addwf SOURCE,W ;Carry-out is only valid if SOURCE
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Tips and Tricks
MathMathMathMath
qEven Parity
;Enter with input in register "X". Exits with
; even parity in bits 1, 2, 3, 4, and 5 of
;register "X".
;; 7 words, 7 cycles.
swapf X,W
xorwf X
rrf X,Wxorwf X
rrf X,W
rlf X
xorwf X
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Tips and Tricks
MathMathMathMath
qEven Parity;Enter with input in register X. Branches to "ZERO" or "ONE";depending on parity. Doesnt modify register X. For odd
;parity, replace "GOTO ZERO" with "GOTO ONE", and vice-versa.
;19 words. 5 or 7 cycles, including branch to ZERO or ONE.
SWAPF X,WXORWF X,WANDLW 00001111B
ADDWF PC
GOTO ZERO
GOTO ONEGOTO ONE
GOTO ZERO
GOTO ONE
GOTO ZERO
GOTO ZERO
GOTO ONEGOTO ONE
GOTO ZERO
GOTO ZERO
GOTO ONE
GOTO ZERO
GOTO ONEGOTO ONE
ZERO:
....
ONE:
....
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Tips and Tricks
MPASM TipsMPASM TipsMPASM TipsMPASM Tips
qEQU vs. #defineequ1 equ 5+3 ;MPASM will replace future
;occurrences of "equ1" with the
;value 8.
#define def1 5+3 ;MPASM will replace future
;occurrences of "def1" with the
;string"5+3".
x equ 3*equ1 ;This line is equivalent to "x
;equ 3*8", so x = 24.
y equ 3*def1 ;THIS line, on the other hand,
;is equivalent to "y equ 3*5+3",
;so y = 18.
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Tips and Tricks
MPASM TipsMPASM TipsMPASM TipsMPASM Tipsq
Accessing Registers Above 0x7FMethod #1:REG EQU xxx - 128 ;Generates no warnings, but also
.... ;doesnt allow REG to be viewed
MOVWF REG ;in MPLAB Watch Windows.
Method #2:MOVWF REG ;Generates an MPASM warning.
Method #3:
MOVWF REG & 0x7F ;Generates no warning, even when
;accidentally used with a
;page-0 register.Method #4:
MOVWF REG ^ 0x80 ;Generates no warning when used
;correctly, but does generate a
;warning if accidentally used
;with a page-0 register.
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Tips and Tricks
MPASM TipsMPASM TipsMPASM TipsMPASM Tips
qHIGH-and-LOW vs. Shift-and-AND
BIGNUM EQU 0x123456
LSB EQU LOW (BIGNUM) ;LSB will always be set to
;0x56.
MSB EQU HIGH (BIGNUM) ;Some versions of MPASM will
;set "MSB" to 0x12; others
;will set it to 0x34.
SAFEMSB EQU (BIGNUM>>16) & 0xFF
;This method will always set
;"SAFEMSB" to 0x12.
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Tips and Tricks
TimingTimingTimingTimingq
Exact Sync to the TMR0 Prescaler;Here, TMR0:PRE must be 01:3 or 02:0
BTFSS TMR0,BIT1GOTO $+1
; Here, TMR0:PRE must be 02:2
GOTO $+1
; TMR0 always increments from 02 to ;03 right here. When we reloadTMR0, ;we need to add 4 to the reloadvalue
;because the MOVLW/MOVWF takes 2;cycles and theres an additional 2-;cycle synchronization delay. TMR0;will resume incrementing at EXACTLY;the moment when it would have rolled;over from 03 to 04.
MOVLW RELOAD+4MOVWF TMR0
; Enter this section with TMR0; between 128 and 255, inclusive,; and the prescaler divide-by-; ratio set to divide-by-4.
WAITFOR0:
BTFSC TMR0,BIT7GOTO WAITFOR0
; Here, TMRO:PRESCALER can be; 00:2 or 00:3 or 01:0.
BTFSS TMR0,BIT0GOTO $+1
; Here, TMR0:PRE must be 01:1; or 01:2.
GOTO $+1
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Tips and Tricks
TimingTimingTimingTiming
q16-Bit Pulse-Width Measurement with 5-Cycle Resolution
;Enter with PULSE_WIDTH_HI:LO set to 0000. Exits ; ;
when PORT,PIN goes low.
CHECK_PULSE:
INCFSZ PULSE_WIDTH_LO
DECF PULSE_WIDTH_HI
BTFSC PORT,PIN
GOTO CHECK_PULSE
DONE:
MOVF PULSE_WIDTH_LO,W
ADDWF PULSE_WIDTH_HI
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Tips and Tricks
Hardware InterfacingHardware InterfacingHardware InterfacingHardware Interfacing
qZero I/O-Pin PICmicro-to- PICmicro CommunicationYour Master PICmicro controls the Slave PICmicro's MCLR line. The Master
normally keeps the Slave's MCLR line high (out of reset). When the Master
wants to send a message, it pulls the Slave's MCLR line low, then pulls it high
for a short time before pulling it low, then high again. The "message" is the time
between MCLR-low pulses.
Message error-proofing methods:
Redundancy: Send the message two or more times and require that the Slavesee consecutive, identical messages before acting on them.Parity: Send your message, then follow it with a "parity message that brings thetotal time-between-MCLR-low-pulses time to some constant value.Framing: Send a unique-length "start of message" pulse, then your messagepulse, then a unique-length "end of message pulse. The Slave doesn't acceptthe message unless it sees the "start" and "end" pulses around it.
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Tips and Tricks
qSetting ADCON0: Clock Select bits
q4 A/D clock (Tad) selections :qFosc/2, Fosc/8, Fosc/32 and Frc(internal RC)qTad Min. = 1.6 uS for VREF => 3.0V or 3.0uS for VREF < 3.0V
For fastest A/D response, calculate the Tad which is closest to the
Minimum value for Tad
Example: VREF = 5.0V, Fosc = 4.0 MHz
qFor fastest A/D response, select Fosc/8 (2.0 uS).
If Frc is selected, instead of Fosc/8, then Min. time would be 2.0us, butthe Max. time would be 6.0us I.e. 3 times slower than the best A/Dresponse time.
qFor fastest response, select Fosc = 5.0 MHz (Tad = 1.6uS)instead of 4.0Mhz (Tad = 2.0 uS).
Hardware InterfacingHardware InterfacingHardware InterfacingHardware Interfacing
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Tips and Tricks
q
Setting ADCON0: GO/DONEqTo start an A/D conversion the GO bit should be set to 1.Note: ADON and GO bit should not be set in the same instructionqOn conversion complete, GO/DONE = 0 & ADIF = 1.Fastest check of A/D conversion completion:
Bit test ADIF or the GO/DONE bit in tight loop .
btfsc ADCON0,DONEgoto $-1
Time for check = 3Tcycles
qChecking A/D completion using Interrupts takes:3T cycles for interrupt latency10T cycles for Context Saving + 1T cycle for ADIF check
Total = 14 T cycles
Hardware InterfacingHardware InterfacingHardware InterfacingHardware Interfacing
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Tips and Tricks
q
A/D Conversion in SleepqReduces digital noise during A/D conversion.
qEnable Frc mode for TadqEnable or disable A/D InterruptqStart A/D conversion and goto sleep
qOn A/D Completion:qIf interrupt is enabled then CPU wakes up from sleepqIf interrupt is disabled then CPU does not wake up from sleep,
but A/D circuit is turned OFF (ADON is still set).
qIn Crystal mode conversion in sleep is slow since most crystals take 2mS or more to wake-up
qFor fast conversion in sleep, use RC oscillator
Hardware InterfacingHardware InterfacingHardware InterfacingHardware Interfacing
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Tips and Tricks
MiscellaneousMiscellaneousMiscellaneousMiscellaneous
qDirect Modification of PC (or PCL)For example, to calculate 2^W,
where W is in the range [0-7]:
TBL 1,2,4,8,16,32,64,128
assembles to:
ADDWF PCL
ADDLW 0
ADDLW -1
ADDLW -3
ADDLW -7ADDLW -15
ADDLW -31
ADDLW -63
ADDLW 121
TBL: MACRO A,B,C,D,E,F,G,H
LOCAL X
ADDWF PCL
X: ADDLW HIGH (A)+1 - HIGH (B)
ADDLW HIGH (B)+1 - HIGH (C)ADDLW HIGH (C)+1 - HIGH (D)
ADDLW HIGH (D)+1 - HIGH (E)
ADDLW HIGH (E)+1 - HIGH (F)
ADDLW HIGH (F)+1 - HIGH (G)
ADDLW HIGH (G)+1 - HIGH (H)
ADDLW HIGH (H)-7
IF ((HIGH $) != (HIGH X))
ERROR "TABLE CROSSES PAGE
ERROR BOUNDARIES! DO
ERROR SOMETHING!
ENDIF
ENDM
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Tips and Tricks
MiscellaneousMiscellaneousMiscellaneousMiscellaneousq
"Switch" Statement; ENTER WITH VALUE TO BE TESTED IN W.
XORLW VAL1 ;IF W = VAL1, GOTO CASE1.
BZ CASE1 ;
XORLW VAL2^VAL1 ;IF W = VAL2, GOTO CASE2.
BZ CASE2 ;
XORLW VAL3^VAL2 ;IF W = VAL3, GOTO CASE3.
BZ CASE3 ;
XORLW VAL4^VAL3 ;IF W = VAL4, GOTO CASE4.
BZ CASE4 ;
etc...
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Tips and Tricks
ResourcesResourcesResourcesResources
q PICLIST Internet Mailing ListTo subscribe, send e-mail to:
[email protected] the following in the message body:
subscribe piclistset piclist reproend
q PICLIST Archiveshttp://anick.simplenet.com/piclist/
q www.microchip.com
q Embedded Control Handbook
q PICLIST Internet Mailing ListTo subscribe, send e-mail to:
[email protected] the following in the message body:
subscribe piclistset piclist reproend
q PICLIST Archiveshttp://anick.simplenet.com/piclist/
q www.microchip.com
q Embedded Control Handbook