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PICO-IMX6UL-STARTKIT NXP i.MX6Ultralite December 7, 2016

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PICO-IMX6UL-STARTKIT

NXP i.MX6Ultralite

December 7, 2016

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

Page 2 of 41

TABLE OF CONTENTS

1. PICO-IMX6UL-STARTKIT Product Overview ..................................................................................... 3

1.1. PICO-IMX6UL System-on-Module Overview ............................................................................... 4

1.2. PICO-IMX6UL Carrier Baseboard Overview ................................................................................ 4

2. Core Components ............................................................................................................................... 5

2.1. NXP i.MX6Ultralite Cortex-A7 Processor ..................................................................................... 5

2.2. NXP PF3000 Power Management IC (PMIC) .............................................................................. 6

2.3. Memory (SKHynix) ....................................................................................................................... 7

2.4. eMMC Storage (Kingston) ............................................................................................................ 7

2.5. Broadcom BCM4343W WiFi/Bluetooth SiP Module ..................................................................... 8

3. PICO-IMX6UL-STARTKIT Interfaces and Connectors ..................................................................... 11

3.1. Power Input Connector ............................................................................................................... 11

3.2. System RESET Button ............................................................................................................... 11

3.3. Fast Ethernet .............................................................................................................................. 12

3.4. Audio Interface ........................................................................................................................... 12

3.5. Universal Serial Bus (USB) Host Interface ................................................................................. 13

3.6. Universal Serial Bus (USB) OTG Interface ................................................................................ 13

3.6. UART Debug Interface ............................................................................................................... 14

3.7. Serial Boot or eMMC Boot Control Pins ..................................................................................... 16

3.8. Expansion Header Pins .............................................................................................................. 17

4. Booting up the PICO-IMX6UL-STARTKIT ........................................................................................ 21

4.1.1. Overview .................................................................................................................................. 21

4.1.2 i.MX6UL boot process details ................................................................................................... 21

4.1.3 Changing PICO-IMX6UL-STARTKIT boot mode ..................................................................... 21

4.1.4 Preparing a bootable software image ....................................................................................... 23

4.1.4.1 Procedure overview ........................................................................................................... 23

4.1.4.2 eMMC boot overview ......................................................................................................... 23

4.1.4.3 Preparing an OS image ..................................................................................................... 23

4.1.4.4 Creating the image file from a block device ....................................................................... 24

4.2. Programming PICO-IMX6UL-EMMC using a Windows host ..................................................... 25

4.2.1. Preparing the setup ............................................................................................................. 25

4.2.2. Using sb_loader ................................................................................................................... 26

4.2.3. Using WinDiskImager to flash the eMMC ............................................................................ 28

4.3. Programming PICO-IMX6UL-STARTKIT eMMC using a Linux host ......................................... 29

4.3.1. Using imx_usb tool and flashing the eMMC ........................................................................ 29

4.3.2. Copying files to eMMC without an image file ....................................................................... 29

5. PICO-IMX6UL PICO Compute Module Pin Assignment ................................................................... 30

6. PICO-IMX6UL Compute Module Pinmux Overview ......................................................................... 37

7. Disclaimer and Important Notice ....................................................................................................... 40

8. Schematics ........................................................................................................................................ 41

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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1. PICO-IMX6UL-STARTKIT Product Overview The PICO-IMX6UL-STARTKIT is a 2 board development board consisting of a System-on-Module and a carrier baseboard and optimized for the Internet-of-Things (IoT). Figure 1 - PICO-IMX6UL-STARTKIT IC Identification and Overview

Figure 2 - PICO-IMX6UL-STARTKIT Connector Overview

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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1.1. PICO-IMX6UL System-on-Module Overview The PICO-IMX6UL System-on-Module (PICO-IMX6UL-EMMC) has 3 Hirose high-speed 70 pin board-to-board connectors and integrates the NXP i.MX6Ultralite, Memory, eMMC, Power Management IC (PMIC) and WiFi / Bluetooth on the module. Figure 3 - PICO-IMX6UL System-on-Module

Figure 4 - PICO-IMX6UL System-on-Module Signal Overview

1.2. PICO-IMX6UL Carrier Baseboard Overview The PICO-IMX6UL Carrier Baseboard (PICO-HOBBIT-FL) has 3 Hirose high-speed 70 pin board-to-board connectors that connect to the System-on-Module and provides the real-world interfaces such as audio, network, USB and a large number of signals on the various pin headers. Figure 5 - PICO-HOBBIT-FL Carrier Board

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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2. Core Components

2.1. NXP i.MX6Ultralite Cortex-A7 Processor The i.MX 6UltraLite is an ultra-efficient processor family with featuring Freescale’s advanced implementation of the single ARM Cortex®-A7 core, which operates at speeds of up to 528 MHz.

The device is composed of the following major subsystems:

o Single-core ARM Cortex-A7 MPCore™ Platform

o 32 KBytes L1 Instruction Cache o 32 KBytes L1 Data Cache o Private Timer and Watchdog o TrustZone support o Cortex-A7 NEON MPE (Media Processing Engine) Co-processor

PXP—PiXel Processing Pipeline for imagine resize, rotation, overlay and CSC. Offloading key

pixel processing operations are required to support the LCD display applications. Figure 6 - NXP i.MX6Ultralite Processor Blocks

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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2.2. NXP PF3000 Power Management IC (PMIC) The PICO-IMX6UL-STARTKIT has on onboard NXP PF3000 power management integrated circuit (PMIC) that features a configurable architecture supporting the numerous outputs with various current ratings as well as programmable voltage and sequencing required by the components on the PICO-IMX6UL-STARTKIT Compute Module. To perform a hard-reset of the PICO-IMX6UL-STARTKIT a software reset signal can be implemented.

CPU BALL

CPU PAD NAME

Pinmux (mode) Signal V I/O Description

E9 LCD_RESET lcdif.RESET (mode0)

RESET 3V3 I Connected to the PWRON signal of PMIC

The PICO-IMX6UL Compute Module as well has an RESET signal routed on connector E1_36 this pin is connected to the RESET Button on the PICO-IMX6UL-STARTKIT. Simply pressing this button will RESET the PICO-IMX6UL-STARTKIT.

Connector Signal V I/O Description

E1_36 RESET 3V3 I Connected to the PWRON signal of PMIC on the PICO Compute Module. Connected to the RESET Button on the PICO-IMX6UL.

Figure 7 - PICO-IMX6UL-STARTKIT Reset Button Location

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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2.3. Memory (SKHynix) The PICO-IMX6UL integrates 512MB (4Gbit) Double Data Rate III (DDR3) Synchronous DRAM in a single (16 bit) channel configuration. SK Hynix 2Gbit low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operation at 1.35V. More information can be retrieved from SKHynix.

2.4. eMMC Storage (Kingston) The PICO-IMX6UL onboard 4GB eMMC device is connected on the SD1 pins of the i.MX6Ultralite processor in an 8 bit width configuration. Kingston e•MMC™ products follow the JEDEC e•MMC™ 4.5 standard. It is an ideal universal storage solutions for many electronic devices, including smartphones, tablet PCs, PDAs, eBook readers, digital cameras, recorders, MP3, MP4 players, electronic learning products, digital TVs and set-top boxes. E•MMC™ encloses the MLC NAND and e•MMC™ controller inside as one JEDEC standard package, providing a standard interface to the host. The e•MMC™ controller directly manages NAND flash, including ECC, wear-leveling, IOPS optimization and read sensing. The Kingston NAND Device is fully compatible with the JEDEC Standard Specification No.JESD84-B45. More information can be retrieved from Kingston.

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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2.5. Broadcom BCM4343W WiFi/Bluetooth SiP Module The PICO-IMX6UL comes with an onboard WiFI/Bluetooth SIP module. The 802.11bgn + BT SiP module is a small sized BGA mounted module that provides full function of 802.11bgn and Bluetooth class 4.0 +HS The small size & low profile physical design make it easier for system design to enable high performance wireless connectivity without space constrain. The low power consumption and excellent radio performance make it the best solution for OEM customers who require embedded 802.11ac Wi-Fi + Bluetooth features. The SIP module is based on Broadcom BCM4343W chipset which is a WiFi + BT SOC. The Radio architecture & high integration MAC/BB chip provide excellent sensitivity with rich system performance. In addition to WEP 64/128, WPA and TKIP, AES, CCX is supported to provide the latest security requirement on your network. The SiP module is designed to operate with a single antenna for WiFi and Bluetooth to be connected to the u.FL connector (separate purchase, please purchase partnumber “WBANTENNAKIT”) Figure 8 - PICO-IMX6UL WiFi / Bluetooth Module and Antenna Connector Location

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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Table 1 - WiFi Signal Description

CPU BALL

PAD NAME Pinmux (mode)

Signal I/O Description

D7 NAND_DATA00 usdhc2.DATA0 (mode1)

SDIO_D0 I/O MMC/SDIO Data bit 0

B7 NAND_DATA01 usdhc2.DATA1 (mode1)

SDIO_D1 I/O MMC/SDIO Data bit 1

A7 NAND_DATA02 usdhc2.DATA2 (mode1)

SDIO_D2 I/O MMC/SDIO Data bit 2

D6 NAND_DATA03 usdhc2.DATA3 (mode1)

SDIO_D3 I/O MMC/SDIO Data bit 3

C8 NAND_WE_B usdhc2.CMD (mode1)

SDIO_CMD I/O MMC/SDIO Command

D8 NAND_RE_B usdhc2.CLK (mode1)

SDIO_CLK I/O MMC/SDIO Clock

C6 NAND_DATA04 gpio4.IO[6] (mode5)

WL_HOST_WAKE O General purpose interface pin. This pin is high-impedance on power up and reset. Subsequently, it becomes an input or output through software control. This pin has a programmable weak pull-up/down.

A6 NAND_DATA06 gpio4.IO[8] (mode5)

WL_REG_ON I Used by PMU (OR-gated with BT_REG_ON) to power up or power down internal BCM4339 regulators used by the WLAN section. This pin is also a low-asserting reset for WLAN only (Bluetooth is not affected by this pin).

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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Table 2 - Bluetooth Signal Description

CPU BALL

PAD NAME Pinmux (mode)

Signal I/O Description

M16 GPIO1_IO04 uart5.TX (mode8)

BT_UART_RXD I Bluetooth UART Serial Input. Serial data input for the HCI UART Interface

M17 GPIO1_IO05 uart5.RX (mode8)

BT_UART_TXD O Bluetooth UART Serial Output. Serial data output for the HCI UART Interface.

M15 GPIO1_IO09 uart5.CTS_B (mode8)

BT_UART_CTS I/O Bluetooth UART Clear to Send. Active-low clear-to-send signal for the HCI UART interface.

N17 GPIO1_IO08 uart5.RTS_B (mode8)

BT_UART_RTS I/O Bluetooth UART Request to Send. Active-low request-to-send signal for the HCI UART interface.

N14 JTAG_TRST_B sai2.TX_DATA (mode2)

BT_PCM_IN I PCM data input

M14 JTAG_TCK sai2.RX_DATA (mode2)

BT_PCM_OUT O PCM data output

N16 JTAG_TDI sai2.TX_BCLK (mode2)

BT_PCM_CLK I/O PCM clock

N15 JTAG_TDO sai2.TX_SYNC (mode2)

BT_PCB_SYNC I/O PCM sync signal

N9 SNVS_TAMPER8 gpio5.IO[8] (mode5)

BT_WAKE I Bluetooth device wake-up: Signal from the host to the module indicating that the host requires attention. • Asserted: Bluetooth device must wake-up or remain awake. • Deserted: Bluetooth device may sleep when sleep criteria are met. The polarity of this signal is software configurable and can be asserted high or low.

R6 SNVS_TAMPER9 gpio5.IO[9] (mode5)

BT_RST_N I Low asserting reset for BT core

B6 NAND_DATA05 gpio4.IO[7] (mode5)

BT_HOST_WAKE O Host UART wake up. Signal from the module to the host indicating that the module requires Attention. • Asserted: Host device must wake-up or remain awake. • Deserted: Host device may sleep when sleep criteria are met. The polarity of this signal is software configurable and can be asserted high or low.

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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3. PICO-IMX6UL-STARTKIT Interfaces and Connectors

3.1. Power Input Connector The PICO-IMX6UL-STARTKIT operates with a standard 5VDC power adaptor with at least 1.0 Ampere. The connector dimensions are 5.5mm (barrel) / 2.1mm (tip). Figure 9 - PICO-IMX6UL-STARTKIT Power Jack Location

3.2. System RESET Button Figure 10 - PICO-IMX6UL-STARTKIT Reset Button Location

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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3.3. Fast Ethernet The PICO-IMX6UL-STARTKIT features a 10/100 Mbit/s Fast Ethernet MAC compliant with the IEEE802.3-2002 standard. The MAC layer provides compatibility with half- or full-duplex 10/100 Mbit/s Ethernet LANs. Figure 11 - PICO-IMX6UL-STARTKIT RJ-45 Network Connector Location

3.4. Audio Interface The PICO-IMX6UL-STARTKITs comes with an Audio jack which is compliant with the CTIA standard. A standard mobile phone headset will work. Figure 12 - PICO-IMX6UL-STARTKIT Audio Jack Location

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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3.5. Universal Serial Bus (USB) Host Interface The PICO-IMX6UL-STARTKIT features a standard USB 2.0 Host Connector. Figure 13 - PICO-IMX6UL-STARTKIT USB HOST Connector Location

3.6. Universal Serial Bus (USB) OTG Interface The PICO-IMX6UL-STARTKIT incorporates a single USB Host/OTG controller. The signals are routed to a USB Type-C connector. Figure 14- PICO-IMX6UL-STARTKIT USB OTG Type-C Connector Location

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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3.6. UART Debug Interface The PICO-IMX6UL-STARTKIT Universal Asynchronous Receiver/Transmitter (UART) serial debug interface can be easily connected with an FTDI branded USB to Serial cable such as the FTDI TTL-232R-3V3-WE. The debug interface can be found on the PICO-IMX6UL-STARTKIT at the following physical location and in software can be accessed over UART6. Figure 15 - PICO-IMX6UL-STARTKIT Serial Debug Thru holes Location

While using the FTDI TTL-232R-3V3-WE only the brown/yellow/black cable should be connected to the following pins. All other wires of the cable can be left unconnected.

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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Figure 16 - Debug Cable Connection (FTDI TTL-232R-3V3-WE)

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3.7. Serial Boot or eMMC Boot Control Pins The PICO-IMX6UL-STARTKIT has a number of pins to override the default boot media (eMMC) and enter in Serial Boot Loader mode. Figure 17 - PICO-IMX6UL-STARTKIT Boot Control Pins

Boot from eMMC Serial Boot Loader

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3.8. Expansion Header Pins The PICO-IMX6UL-STARTKIT has a number of expansion headers that can be used to connect displays, sensors, motors, and external devices. Figure 18 - PICO-IMX6UL-STARTKIT Mikrobus Header Location

PIN i.MX6UL CPU PAD NAME Signal V I/O Description

JP5_1 J14 UART1_RTS USDHC1_CD_B 3V3 I/O General Purpose Input Output with PWM control

JP5_2 F3 CSI_HSYNC GPIO4_IO20 3V3 I/O General Purpose Input Output

JP5_3 H16 UART3_RXD UART3_RX 3V3 I Universal Asynchronous Receive Transmit receive data signal

JP5_4 H17 UART3_TXD UART3_TXD 3V3 O Universal Asynchronous Receive Transmit transmit data signal

JP5_5 F17 UART5_TXD I2C2_SCL 3V3 I/O I2C bus clock line

JP5_6 G13 UART5_RXD I2C2_SDA 3V3 I/O I2C bus data line

JP5_7 5V Power 5V P 5V Power

JP5_8 GND P Ground

PIN i.MX6UL CPU PAD NAME Signal V I/O Description

JP6_1 Analog Pin 3V3 ADC081C027 Analog signal accessible over I2C2

JP6_2 PMIC RESET RESET 3V3 I Reset power signal

JP6_3 NC Not Connected

JP6_4 J16 UART2_RXD ECSPI3_SCLK 3V3 O Serial Peripheral Interface clock signal

JP6_5 J15 UART2_RTS ECSPI3_MISO 3V3 I Serial Peripheral Interface master input slave output signal

JP6_6 H14 UART2_CTS ECSPI3_MOSI 3V3 O Serial Peripheral Interface master output slave input signal

JP6_7 3V3 Power 3V3 P 3V3 Power

JP6_8 GND P Ground

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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Figure 19 - PICO-IMX6UL-STARTKIT Expansion Header Location

PIN i.MX6UL CPU PAD NAME Signal V I/O Description

JP1_1 3V3 Power 3V3 P 3V3 Power

JP1_2 3V3 Power 3V3 P 3V3 Power

JP1_3 NC Not Connected

JP1_4 3V3 Power 3V3 P 3V3 Power

JP1_5 NC Not Connected

JP1_6 B4 NAND_ALE PWM3_OUT 3V3 O LCD Backlight brightness Control

JP1_7 NC Not Connected

JP1_8 NC Not Connected

JP1_9 NC Not Connected

JP1_10 NC Not Connected

JP1_11 NC Not Connected

JP1_12 NC Not Connected

JP1_13 NC Not Connected

JP1_14 NC Not Connected

JP1_15 NC Not Connected

JP1_16 3V3 Power 3V3 P 3V3 Power

JP1_17 NC Not Connected

JP1_18 GND P Ground

JP1_19 GND P Ground

JP1_20 GND P Ground

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

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PIN i.MX6UL CPU PAD NAME Signal V I/O Description

JP2_1 B9 LCD_DATA0 LCDIF_DATA0 3V3 O LCD Pixel Data bit 0

JP2_2 E12 LCD_DATA10 LCDIF_DATA10 3V3 O LCD Pixel Data bit 10

JP2_3 A9 LCD_DATA1 LCDIF_DATA1 3V3 O LCD Pixel Data bit 1

JP2_4 D12 LCD_DATA11 LCDIF_DATA11 3V3 O LCD Pixel Data bit 11

JP2_5 E10 LCD_DATA2 LCDIF_DATA2 3V3 O LCD Pixel Data bit 2

JP2_6 C12 LCD_DATA12 LCDIF_DATA12 3V3 O LCD Pixel Data bit 12

JP2_7 D10 LCD_DATA3 LCDIF_DATA3 3V3 O LCD Pixel Data bit 3

JP2_8 B12 LCD_DATA13 LCDIF_DATA13 3V3 O LCD Pixel Data bit 13

JP2_9 C10 LCD_DATA4 LCDIF_DATA4 3V3 O LCD Pixel Data bit 4

JP2_10 A12 LCD_DATA14 LCDIF_DATA14 3V3 O LCD Pixel Data bit 14

JP2_11 B10 LCD_DATA5 LCDIF_DATA5 3V3 O LCD Pixel Data bit 5

JP2_12 D13 LCD_DATA15 LCDIF_DATA15 3V3 O LCD Pixel Data bit 15

JP2_13 A10 LCD_DATA6 LCDIF_DATA6 3V3 O LCD Pixel Data bit 6

JP2_14 C13 LCD_DATA16 LCDIF_DATA16 3V3 O LCD Pixel Data bit 16

JP2_15 D11 LCD_DATA7 LCDIF_DATA7 3V3 O LCD Pixel Data bit 7

JP2_16 B13 LCD_DATA17 LCDIF_DATA17 3V3 O LCD Pixel Data bit 17

JP2_17 B11 LCD_DATA8 LCDIF_DATA8 3V3 O LCD Pixel Data bit 8

JP2_18 A13 LCD_DATA18 LCDIF_DATA18 3V3 O LCD Pixel Data bit 18

JP2_19 A11 LCD_DATA9 LCDIF_DATA9 3V3 O LCD Pixel Data bit 9

JP2_20 D14 LCD_DATA19 LCDIF_DATA19 3V3 O LCD Pixel Data bit 19

PIN i.MX6UL CPU PAD NAME Signal V I/O Description

JP3_1 3V3 Power 3V3 P 3V3 Power

JP3_2 3V3 Power 3V3 P 3V3 Power

JP3_3 N8 SNVS_TAMPER5 GPIO5_IO05 3V3 O LCD backlight enable/disable

JP3_4 C14 LCD_DATA20 LCDIF_DATA20 3V3 O LCD Pixel Data bit 20

JP3_5 P14 JTAG_TMS GPIO1_IO11 3V3 O LCD Voltage On

JP3_6 B14 LCD_DATA21 LCDIF_DATA21 3V3 O LCD Pixel Data bit 21

JP3_7 G13 UART5_RXD I2C2_SDA 3V3 I/O I2C bus data line

JP3_8 A14 LCD_DATA22 LCDIF_DATA22 3V3 O LCD Pixel Data bit 22

JP3_9 F17 UART5_TXD I2C2_SCL 3V3 I/O I2C bus clock line

JP3_10 B16 LCD_DATA23 LCDIF_DATA23 3V3 O LCD Pixel Data bit 23

JP3_11 L17 GPIO1_IO03 I2C1_SDA 3V3 I/O I2C bus data line

JP3_12 A8 LCD_CLK LCDIF_CLK 3V3 O LCD Pixel Clock

JP3_13 L14 GPIO1_IO02 I2C1_SCL 3V3 I/O I2C bus clock line

JP3_14 C9 LCD_VSYNC LCDIF_VSYNC 3V3 O LCD Vertical Synchronization

JP3_15 K16 UART1_RXD I2C3_SDA 1V8 I/O I2C bus data line

JP3_16 D9 LCD_HSYNC LCDIF_HSYNC 3V3 O LCD Horizontal Synchronization

JP3_17 K14 UART1_TXD I2C3_SCL 1V8 I/O I2C bus clock line

JP3_18 B8 LCD_ENABLE LCDIF_ENABLE 3V3 O LCD dot enable pin signal

JP3_19 GND P Ground

JP3_20 GND P Ground

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PIN i.MX6UL CPU PAD NAME Signal V I/O Description

JP4_1 5V Power 5V P 5V Power

JP4_2 5V Power 5V P 5V Power

JP4_3 5V Power 5V P 5V Power

JP4_4 F2 CSI_VSYNC GPIO4_IO19 3V3 I/O General Purpose Input Output

JP4_5 5V Power 5V P 5V Power

JP4_6 E4 CSI_DATA00 GPIO4_IO21 3V3 I/O General Purpose Input Output

JP4_7 H14 UART2_CTS ECSPI3_MOSI 3V3 O Serial Peripheral Interface master output slave input signal

JP4_8 E3 CSI_DATA01 GPIO4_IO22 3V3 I/O General Purpose Input Output

JP4_9 J15 UART2_RTS ECSPI3_MISO 3V3 I Serial Peripheral Interface master input slave output signal

JP4_10 E2 CSI_DATA02 GPIO4_IO23 3V3 I/O General Purpose Input Output

JP4_11 J16 UART2_RXD ECSPI3_SCLK 3V3 O Serial Peripheral Interface clock signal

JP4_12 E1 CSI_DATA03 GPIO4_IO24 3V3 I/O General Purpose Input Output

JP4_13 NC Not Connected

JP4_14 K15 UART1_CTS GPIO4_IO18 3V3 I/O General Purpose Input Output

JP4_15 J17 UART2_TXD ECSPI3_SS0 3V3 Serial Peripheral Interface Chip Select 1 signal

JP4_16 F3 CSI_HSYNC GPIO4_IO20 3V3 I/O General Purpose Input Output

JP4_17 GND P Ground

JP4_18 P11 SNVS_TAMPER2 GPIO5_IO02 3V3 I/O General Purpose Input Output

JP4_19 GND P Ground

JP4_20 GND P Ground

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4. Booting up the PICO-IMX6UL-STARTKIT

4.1.1. Overview The boot mode for the PICO-IMX6UL-STARTKIT is controlled with jumpers on the baseboard. Normally, the board is intended to boot from the on-board eMMC flash, but sometimes the board needs to be booted from an external source. This can happen for example if the eMMC contains a faulty bootloader. This document guides how the on-board eMMC flash of a PICO-IMX6UL-STARTKIT can be flashed from a host PC.

4.1.2 i.MX6UL boot process details When the boot jumpers are set to eMMC boot, the ROM code will attempt to boot from eMMC. If there is no bootable software present, the board will revert to "serial download mode". The name "serial download mode" is slighlty misleading, since the mode has grown past UART communication and nowadays is a way to access the board over an USB OTG port, or in the case of PICO-IMX6UL-STARTKIT, the USB type C port.

4.1.3 Changing PICO-IMX6UL-STARTKIT boot mode To force the board into serial download mode using a PICO-IMX6UL-STARTKIT, change the boot mode jumpers J1 to 1-2 and jumper J4 to 2-3, as pictured below.

With this jumper setting, the board will not even attempt to boot from eMMC, but always expect it to be programmed over the USB type C connector. To set the boot mode to eMMC, restore the jumpers J1 to 2-3 and jumper J4 to 1-2 (as pictured below).

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In this mode the board will attempt to boot from eMMC, but can in some circumstances revert to serial download mode. This can happen for instance if the eMMC is not bootable. Note that "half-booting" software, like a u-boot that does not initialize memory timings for correct operation, will be interpreted as booting. More technically, if the ROM code finds the correct signature 1kB into the eMMC, it considers the board bootable from eMMC. To verify your PICO-IMX6UL-STARTKIT is in serial download mode, connect a USB cable between the host PC and the PICO-IMX6UL-STARTKIT. Power up the board. If a USB device with name "Freescale Semiconductor in Recovery Mode" appears, the board is in serial download mode.

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4.1.4 Preparing a bootable software image This section explains how software should be laid out inside the eMMC for a succesful boot. There are also steps how to prepare software to be programmed into the PICO-IMX6UL-STARTKIT eMMC.

4.1.4.1 Procedure overview The procedure recommended here for programming the board is:

1. Prepare a file containing a bit-by-bit copy of what should be in eMMC (an "image" file). The layout of such files is described in sections 4.1.4.2 and 4.1.4.3.

2. Booting the board in serial download mode 3. Accessing the eMMC as a mass storage device (see chapters 4.2 and 4.3) 4. Copying the eMMC image file to the board 5. Booting the image

4.1.4.2 eMMC boot overview This section describes how to use a Linux computer to prepare an image file of eMMC content. This step can be omitted, but is useful for creating image files which are easily distributable (since it is a all-in-one file). A conventional Linux image consists of

u-boot bootloader

kernel

devicetree

root filesystem

and sometimes, an initial ramdisk

The usual set up is that the kernel, device tree and the optional RAM disk is placed in a FAT partition as the first partition, and the OS filesystems occupies the remaining partitions. Linux systems usually occupy just the second partition, and in case a swap partition, also the third partition, but other operating systems can make use of more advanced partition schemes. Convenient ways to prepare an image using a Linux computer is using a block device (like a USB stick or an SD card) or a loopback device. It is also possible to access the eMMC as a mass storage device and manually place the data in the right place. See section 4.3.x.

4.1.4.3 Preparing an OS image This section describes how to prepare the eMMC contents so the system can boot. This is intended for those wanting to prepare their own image, and not to use an image already provided by someone else. The device is assumed to be a block device (like USB stick or SD card), but can beneficially be the eMMC itself (see chapter 4.2 and 4.3 on how to access the eMMC as a block device on a host PC). Here the block device is denoted /dev/sdX; care must be taken that the right device is used. First, partition your device. Leave the first 1MB (or so) unpartitioned so that the first partition starts about 1MB into the device. The reason for this is that the u-boot bootloader needs to reside in unpartitioned space in the beginning of the block device. The first partition is usually a FAT partition containing the Linux kernel as a zImage and the device tree blob (dtb) file. If an initial ramdisk is used, the initrd files can also reside in the FAT partition. The second partition is usually the Linux root file system. Keep in mind when partitioning that the eMMC is limited in size to approximately 4GB, and not let your image become too large to fit.

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Then copy your bootloader (u-boot) 1kB into the image. On a Linux host, the following command can be used. Remember to replace /dev/sdX with the appropriate device or image file. # dd if=u-boot.imx of=/dev/sdX bs=1k seek=1 conv=notrunc oflag=dsync Thereafter format the additional partitions, with the expected file systems, copy the files there.

4.1.4.4 Creating the image file from a block device As a last step create the image file from your block device. This can be done using the following Linux commands: First list the partitions in the block device: # fdisk -lc /dev/sdX The output looks something like:

Disk /dev/sdX: 3965 MB, 3965190144 bytes

122 heads, 62 sectors/track, 1023 cylinders

Units = cylinders of 7564 * 512 = 3872768 bytes

Sector size (logical/physical): 512 bytes / 512 bytes

I/O size (minimum/optimal): 512 bytes / 512 bytes

Disk identifier: 0x0005ffff

Device Boot Start End Blocks Id System

/dev/sdX1 2 4 8192+ 83 FAT12

/dev/sdX2 4 85 307200 83 Linux

/dev/sdX3 85 363 1048576 82 Linux swap

To extract the OS image from this issue the command # dd if=/dev/sdX of=image.img bs=3872768 count=85 The blocksize (bs= parameter) is taken from the line "Units = cylinders of 7564 * 512 = 3872768 bytes" and the count parameter is the end of the last non-swap partition, /dev/sdX2.

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4.2. Programming PICO-IMX6UL-EMMC using a Windows host This section guides on how to use a Windows 7 computer to access the eMMC on a PICO-IMX6UL-STARTKIT, and how to program an image file to the eMMC. Tools needed:

sb_loader_imx6ul.exe (or similar)

a "bootbomb" file that can be dropped on the board, enabling it to be accessible as a USB Mass Storage device

Windiskimager or similar tool that allows raw writing of block devices.

An eMMC image file to be programmed to the eMMC flash of the board.

And optionally, a serial terminal emulator program For convenience, there is a downloadable tool package containing the three first items at: www.hobbitboard.org

4.2.1. Preparing the setup First attach a USB Type C peripheral cable to the board, and the other end to the host PC. Set the boot jumpers to serial download mode, power up the board, and verify that a "SE Blank 6UL" device appears (as below):

Next, download the tools package. Copy the folder inside the ZIP file to the Desktop.

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4.2.2. Using sb_loader Then start a command prompt by clicking on the start menu, and in the "Search programs and files" box enter "cmd" (see below):

In the command line interface, navigate to the PICO-IMX6UL-STARTKIT tools package and the sb_loader folder inside it by typing the following commands:

cd Desktop cd hobbitboard_tools-20160322 cd windows cd sb_loader

(see screenshot below)

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Next run sb_loader to boot the image on the board. Issue the command:

sb_loader_imx6ul.exe -f ..\..\bootbomb-20160306.imx The loader will push the image to the board, and a mass storage device will appear (in the example below it gets the letter F:)

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4.2.3. Using WinDiskImager to flash the eMMC Start win32diskimager, and open the image file that is to be used. In the image below the file pico-imx6ul-buildroot-2016030.img is used as an example. NOTE: It is important that you use the mass storage device that appeared when using sb_loader, using the wrong device might corrupt your hard drive!

After WinDiskImager finishes, power off the board, set the boot jumpers back to eMMC boot and power up the board.

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4.3. Programming PICO-IMX6UL-STARTKIT eMMC using a Linux host This section describes how to program the eMMC using a Linux computer. The description below is less verbose as the one for Windows systems. Tools needed are:

imx_usb loader

a "bootbomb" file that can be dropped on the board, enabling it to be accessible as a USB Mass Storage device

And, preferrably, an eMMC image file to be programmed to the eMMC flash of the board. As above, the two first items are included in the tools package at: www.hobbitboard.org

4.3.1. Using imx_usb tool and flashing the eMMC Boot the board in serial download mode. Connect the USB type C cable to the board and the other end to the host PC. It is possible to use the command 'lsusb' to verify that the board really is in serial download mode. If so, then there is a "Freescale Semiconductor" device present in the list: Bus 002 Device 033: ID 15a2:007d Freescale Semiconductor, Inc. Then drop the boot image on the board with the command # ./imx_usb bootbomb.imx After a few seconds a USB Mass Storage Device appears. Now it is possilble to use commands like 'dd' to program the eMMC on the board, for instance copying an operating system image file to the board can be done with: # dd if=image.img of=/dev/sdX bs=1M oflag=dsync where sdX is the mass storage device corresponding to the PICO-IMX6UL-STARTKIT EMMC. After this, change the jumpers back to eMMC boot and reboot the board.

4.3.2. Copying files to eMMC without an image file It is also possible to assemble an image directly in the eMMC of the PICO-IMX6UL-STARTKIT. To do so, perform the steps in chapter 4.1.4.3 using the Mass Storage block device presented after running the imx_usb tool.

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5. PICO-IMX6UL PICO Compute Module Pin Assignment Want to make your own carrier baseboard and want to use the PICO-IMX6UL-STARTKIT PICO

Compute Module. Here is the complete pinout.

PIN CPU BALL

CPU PAD NAME Signal V I/O Description

E1_1 GND P Ground

E1_2 VSYS P System input power (4.0 to 5.25V)

E1_3 K13 GPIO1_IO00 USB_OTG1_PWR 3V3 I USB OTG ID Pin

E1_4 VSYS P System input power (4.0 to 5.25V)

E1_5 GND P Ground

E1_6 VSYS P System input power (4.0 to 5.25V)

E1_7 NC Not Connected

E1_8 3V3 P System 3.3V Output

E1_9 GND P Ground

E1_10 3V3 P System 3.3V Output

E1_11 GND P Ground

E1_12 1V8 P System 1.8V Output (same as E1 connector I/O voltage levels)

E1_13 GND P Ground

E1_14 VSYS P System input power (4.0 to 5.25V)

E1_15 GND P Ground

E1_16 U15 USB_OTG1_DP USB_OTG_DP USB I/O Universal Serial Bus differential pair positive signal

E1

X1

X2

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PIN CPU BALL

CPU PAD NAME Signal V I/O Description

E1_17 R8 ONOFF SRC_RESET_B 3V3 I Power ON button input signal

E1_18 T15 USB_OTG1_DN USB_OTG1_DN USB I/O Universal Serial Bus differential pair negative signal

E1_19 L15 GPIO1_IO01 GPIO1_IO01 1V8 I Over current detect input pin to monitor USB power over current

E1_20 T12 USB_OTG1_VBUS USB_OTG1_VBUS 5V I/O Universal Serial Bus power

E1_21 K17 GPIO1_IO06 USB_OTG_ PWR_WAKE

USB I Universal Serial Bus power enable

E1_22 E5 CSI_PIXCLK UART6_RX 1V8 I Universal Asynchronous Receive Transmit receive data signal

E1_23 NC Not Connected

E1_24 F2 CSI_VSYNC GPIO4_IO19 1V8 I/O General Purpose Input Output

E1_25 F3 CSI_HSYNC GPIO4_IO20 1V8 I/O General Purpose Input Output

E1_26 E4 CSI_DATA00 GPIO4_IO21 1V8 I/O General Purpose Input Output

E1_27 F5 CSI_MCLK UART6_TX 1V8 O Universal Asynchronous Receive Transmit transmit data signal

E1_28 E3 CSI_DATA01 GPIO4_IO22 1V8 I/O General Purpose Input Output

E1_29 NC Not Connected

E1_30 E2 CSI_DATA02 GPIO4_IO23 1V8 I/O General Purpose Input Output

E1_31 NC Not Connected

E1_32 E1 CSI_DATA03 GPIO4_IO24 1V8 I/O General Purpose Input Output

E1_33 D15 ENET1_RX_ER PWM8_OUT 1V8 I/O General Purpose Input Output with PWM control

E1_34 K15 UART1_CTS GPIO4_IO18 1V8 I/O General Purpose Input Output

E1_35 F14 ENET1_TX_CLK PWM7_OUT 1V8 I/O General Purpose Input Output with PWM control

E1_36 PMIC RESET RESET 1V8 I Reset power signal

E1_37 NC Not Connected

E1_38 NC Not Connected

E1_39 NC Not Connected

E1_40 NC Not Connected

E1_41 F17 UART5_TXD I2C2_SCL 1V8 I/O I2C bus clock line

E1_42 G17 UART4_TXD GPIO4_IO28 1V8 I/O General Purpose Input Output

E1_43 G13 UART5_RXD I2C2_SDA 1V8 I/O I2C bus data line

E1_44 G16 UART4_RXD GPIO4_IO29 1V8 I/O General Purpose Input Output

E1_45 K14 UART1_TXD I2C3_SCL 1V8 I/O I2C bus clock line

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PIN CPU BALL

CPU PAD NAME Signal V I/O Description

E1_46 H17 UART3_TXD UART3_TXD 1V8 O Universal Asynchronous Receive Transmit transmit data signal

E1_47 K16 UART1_RXD I2C3_SDA 1V8 I/O I2C bus data line

E1_48 P11 SNVS_TAMPER2 GPIO5_IO02 1V8 I/O General Purpose Input Output

E1_49 NC Not Connected

E1_50 D2 CSI_DATA06 SAI1_RX_DATA 1V8 I Integrated Interchip Sound (I2S) channel receive data line

E1_51 NC Not Connected

E1_52 D3 CSI_DATA05 SAI1_TX_BCLK 1V8 O Integrated Interchip Sound (I2S) channel word clock signal

E1_53 J17 UART2_TXD ECSPI3_SS0 1V8 Serial Peripheral Interface Chip Select 1 signal

E1_54 D4 CSI_DATA04 SAI1_TX_SYNC 1V8 O

Integrated Interchip Sound (I2S) channel frame synchronization signal

E1_55 J16 UART2_RXD ECSPI3_SCLK 1V8 O Serial Peripheral Interface clock signal

E1_56 D1 CSI_DATA07 SAI1_TX_DATA 1V8 O Integrated Interchip Sound (I2S) channel transmit data line

E1_57 H14 UART2_CTS ECSPI3_MOSI 1V8 O Serial Peripheral Interface master output slave input signal

E1_58 NC Not Connected

E1_59 J15 UART2_RTS ECSPI3_MISO 1V8 I Serial Peripheral Interface master input slave output signal

E1_60 NC Not Connected

E1_61 H16 UART3_RXD UART3_RX 1V8 I Universal Asynchronous Receive Transmit receive data signal

E1_62 NC Not Connected

E1_63 G14 UART3_RTS UART3_RTS 1V8 O Universal Asynchronous Receive Transmit request to send signal

E1_64 NC Not Connected

E1_65 H15 UART3_CTS UART3_CTS 1V8 O Universal Asynchronous Receive Transmit clear to send signal

E1_66 NC Not Connected

E1_67 NC Not Connected

E1_68 NC Not Connected

E1_69 NC Not Connected

E1_70 NC Not Connected

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PIN CPU BALL

CPU PAD NAME Signal V I/O Description

X1_1 GND P Ground

X1_2 GND P Ground

X1_3 NC Not Connected

X1_4 NC Not Connected

X1_5 NC Not Connected

X1_6 NC Not Connected

X1_7 GND P Ground

X1_8 B16 LCD_DATA23 LCDIF_DATA23 3V3 O LCD Pixel Data bit 23

X1_9 NC Not Connected

X1_10 A14 LCD_DATA22 LCDIF_DATA22 3V3 O LCD Pixel Data bit 22

X1_11 NC Not Connected

X1_12 B14 LCD_DATA21 LCDIF_DATA21 3V3 O LCD Pixel Data bit 21

X1_13 GND P Ground

X1_14 C14 LCD_DATA20 LCDIF_DATA20 3V3 O LCD Pixel Data bit 20

X1_15 NC Not Connected

X1_16 D14 LCD_DATA19 LCDIF_DATA19 3V3 O LCD Pixel Data bit 19

X1_17 NC Not Connected

X1_18 A13 LCD_DATA18 LCDIF_DATA18 3V3 O LCD Pixel Data bit 18

X1_19 GND P Ground

X1_20 B13 LCD_DATA17 LCDIF_DATA17 3V3 O LCD Pixel Data bit 17

X1_21 NC Not Connected

X1_22 C13 LCD_DATA16 LCDIF_DATA16 3V3 O LCD Pixel Data bit 16

X1_23 NC Not Connected

X1_24 D13 LCD_DATA15 LCDIF_DATA15 3V3 O LCD Pixel Data bit 15

X1_25 GND P Ground

X1_26 A12 LCD_DATA14 LCDIF_DATA14 3V3 O LCD Pixel Data bit 14

X1_27 NC Not Connected

X1_28 B12 LCD_DATA13 LCDIF_DATA13 3V3 O LCD Pixel Data bit 13

X1_29 NC Not Connected

X1_30 C12 LCD_DATA12 LCDIF_DATA12 3V3 O LCD Pixel Data bit 12

X1_31 GND P Ground

X1_32 D12 LCD_DATA11 LCDIF_DATA11 3V3 O LCD Pixel Data bit 11

X1_33 F15 ENET1_TXEN ENET2_MDIC 3V3 Management data clock reference

X1_34 E12 LCD_DATA10 LCDIF_DATA10 3V3 O LCD Pixel Data bit 10

X1_35 E14 ENET1_TXD1 ENET2_MDIO 3V3 Management data

X1_36 A11 LCD_DATA9 LCDIF_DATA9 3V3 O LCD Pixel Data bit 9

X1_37 D16 ENET2_RXER GPIO2_IO15 3V3 Ethernet reset

X1_38 B11 LCD_DATA8 LCDIF_DATA8 3V3 O LCD Pixel Data bit 8

X1_39 N11 SNVS_TAMPER6 GPIO5_IO06 3V3 Ethernet interrupt output

X1_40 D11 LCD_DATA7 LCDIF_DATA7 3V3 O LCD Pixel Data bit 7

X1_41 L16 GPIO1_IO07 ANATOP_ENET_ REF_CLK2

3V3 Synchronous Ethernet recovered clock

X1_42 A10 LCD_DATA6 LCDIF_DATA6 3V3 O LCD Pixel Data bit 6

X1_43 B15 ENET2_TXEN ENET2_TX_EN 3V3 RMII transmit enable

X1_44 B10 LCD_DATA5 LCDIF_DATA5 3V3 O LCD Pixel Data bit 5

X1_45 B17 ENET2_CRS_DV ENET2_RX_EN 3V3 RMII receive data valid

X1_46 C10 LCD_DATA4 LCDIF_DATA4 3V3 O LCD Pixel Data bit 4

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PIN CPU

BALL CPU PAD NAME Signal V I/O Description

X1_47 GND P Ground

X1_48 D10 LCD_DATA3 LCDIF_DATA3 3V3 O LCD Pixel Data bit 3

X1_49 D17 ENET2_TXCLK ENET2_TX_CLK 3V3 O RMII transmit clock

X1_50 E10 LCD_DATA2 LCDIF_DATA2 3V3 O LCD Pixel Data bit 2

X1_51 A15 ENET2_TXD0 ENET2_TX_DATA0 3V3 O RMII transmit data 0

X1_52 A9 LCD_DATA1 LCDIF_DATA1 3V3 O LCD Pixel Data bit 1

X1_53 A16 ENET2_TXD1 ENET2_TX_DATA1 3V3 O RMII transmit data 1

X1_54 B9 LCD_DATA0 LCDIF_DATA0 3V3 O LCD Pixel Data bit 0

X1_55 NC Not Connected

X1_56 N8 SNVS_TAMPER5 GPIO5_IO05 3V3 O LCD backlight enable/disable

X1_57 NC Not Connected

X1_58 D9 LCD_HSYNC LCDIF_HSYNC 3V3 O LCD Horizontal Synchronization

X1_59 GND P Ground

X1_60 B8 LCD_ENABLE LCDIF_ENABLE 3V3 O LCD dot enable pin signal

X1_61 NC Not Connected

X1_62 C9 LCD_VSYNC LCDIF_VSYNC 3V3 O LCD Vertical Synchronization

X1_63 C17 ENET2_RXD0 ENET2_RX_DATA0 3V3 I RMII receive data 0

X1_64 A8 LCD_CLK LCDIF_CLK 3V3 O LCD Pixel Clock

X1_65 C16 ENET2_RXD1 ENET2_RX_DATA1 3V3 I RMII receive data 1

X1_66 B4 NAND_ALE PWM3_OUT 3V3 O LCD Backlight brightness Control

X1_67 NC Not Connected

X1_68 P14 JTAG_TMS GPIO1_IO11 3V3 O LCD Voltage On

X1_69 NC Not Connected

X1_70 GND P Ground

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PIN CPU BALL

CPU PAD NAME Signal V I/O Description

X2_1 GND P Ground

X2_2 GND P Ground

X2_3 T10 BOOT_MODE0 BOOT_MODE0 1V8 I Boot Select pin

X2_4 NC Not Connected

X2_5 U10 BOOT_MODE1 BOOT_MODE1 1V8 I Boot Select pin

X2_6 NC Not Connected

X2_7 B12 LCD_DATA13 BT_CFG13 1V8 I Boot Select pin

X2_8 GND P Ground

X2_9 A12 LCD_DATA14 BT_CFG14 1V8 I Boot Select pin

X2_10 NC Not Connected

X2_11 GND P Ground

X2_12 NC Not Connected

X2_13 L14 GPIO1_IO02 I2C1_SCL 3V3 I/O I2C bus clock line

X2_14 GND P Ground

X2_15 L17 GPIO1_IO03 I2C1_SDA 3V3 I/O I2C bus data line

X2_16 NC Not Connected

X2_17 GND P Ground

X2_18 NC Not Connected

X2_19 F16 ENET1_RXD0 CAN1_TX 3V3 I/O CAN (controller Area Network) transmit signal

X2_20 GND P Ground

X2_21 E17 ENET1_RXD1 CAN1_RX 3V3 I/O CAN (controller Area Network) receive signal

X2_22 NC Not Connected

X2_23 GND P Ground

X2_24 NC Not Connected

X2_25 E16 ENET1_RX_EN CAN2_TX 3V3 I/O CAN (controller Area Network) transmit signal

X2_26 GND P Ground

X2_27 E15 ENET1_TXD0 CAN2_RX 3V3 I/O CAN (controller Area Network) receive signal

X2_28 NC Not Connected

X2_29 GND P Ground

X2_30 NC Not Connected

X2_31 NC Not Connected

X2_32 GND P Ground

X2_33 NC Not Connected

X2_34 NC Not Connected

X2_35 NC Not Connected

X2_36 NC Not Connected

X2_37 NC Not Connected

X2_38 GND P Ground

X2_39 NC Not Connected

X2_40 NC Not Connected

X2_41 NC Not Connected

X2_42 NC Not Connected

X2_43 NC Not Connected

X2_44 GND P Ground

X2_45 NC Not Connected

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PIN CPU BALL

CPU PAD NAME Signal V I/O Description

X2_46 T13 USB_OTG2_DN USB_OTG2_DN 3V3 I/O Universal Serial Bus differential pair negative signal

X2_47 NC Not Connected

X2_48 U13 USB_OTG2_DP USB_OTG2_DP 3V3 I/O Universal Serial Bus differential pair positive signal

X2_49 NC Not Connected

X2_50 U12 USB_OTG2_VBUS USB_OTG2_VBUS 5V I/O Universal Serial Bus power

X2_51 GND P Ground

X2_52 R10 SNVS_TAMPER0 GPIO5_IO00 3V3 I

Active low input, to inform USB overcurrent condition (low = overcurrent detected)

X2_53 NC Not Connected

X2_54 GND P Ground

X2_55 NC Not Connected

X2_56 NC Not Connected

X2_57 NC Not Connected

X2_58 NC Not Connected

X2_59 NC Not Connected

X2_60 GND P Ground

X2_61 NC Not Connected

X2_62 NC Not Connected

X2_63 NC Not Connected

X2_64 NC Not Connected

X2_65 NC Not Connected

X2_66 GND P Ground

X2_67 NC Not Connected

X2_68 NC Not Connected

X2_69 NC Not Connected

X2_70 NC Not Connected

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6. PICO-IMX6UL Compute Module Pinmux Overview Many signals on the PICO-IMX6UL can be configured to support other interfaces. The table below gives an overview of all pins that can be modified. The default operation mode which is compatible with other PICO Compute Modules has been highlighted.

PIN CPU BALL PADNAME MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6 MODE8

E1_3 K13 GPIO1_IO00 i2c2.SCL gpt1.CAPTURE1

usb.OTG1_PWR

anatop.ENET_REF_CLK1

mqs.RIGHT gpio1.IO[0] enet1.1588_EVENT0_IN

wdog3.WDOG_B

E1_17 R8 ONOFF src.RESET_B

E1_19 L15 GPIO1_IO01 i2c2.SDA gpt1.COMPARE1

usb.OTG1_OC

anatop.ENET_REF_CLK2

mqs.LEFT gpio1.IO[1] enet1.1588_EVENT0_OUT

wdog2.WDOG_B

E1_21 K17 GPIO1_IO06 enet1.MDIO anatop.ENET_REF_CLK1

usb.OTG_PWR_WAKE

csi.MCLK usdhc2.WP gpio1.IO[6] enet2.1588_EVENT1_IN

uart1.CTS_B

E1_22 E5 CSI_PIXCLK csi.PIXCLK usdhc2.WP rawnand.CE3_B

i2c1.SCL weim.OE gpio4.IO[18] enet1.MDC uart6.RX

E1_24 F2 CSI_VSYNC csi.VSYNC usdhc2.CLK sim1.PORT1_CLK

i2c2.SDA weim.RW gpio4.IO[19] enet2.MDIO uart6.RTS_B

E1_25 F3 CSI_HSYNC csi.HSYNC usdhc2.CMD sim1.PORT1_PD

i2c2.SCL weim.LBA_B gpio4.IO[20] enet2.MDC uart6.CTS_B

E1_26 E4 CSI_DATA00 csi.DATA[2] usdhc2.DATA0

sim1.PORT1_RST_B

ecspi2.SCLK weim.AD[0] gpio4.IO[21] wdog3.WDOG_B

uart5.TX

E1_27 F5 CSI_MCLK csi.MCLK usdhc2.CD_B

rawnand.CE2_B

i2c1.SDA weim.CS0_B gpio4.IO[17] enet1.MDIO uart6.TX

E1_28 E3 CSI_DATA01 csi.DATA[3] usdhc2.DATA1

sim1.PORT1_SVEN

ecspi2.SS0 weim.AD[1] gpio4.IO[22] sai1.MCLK uart5.RX

E1_30 E2 CSI_DATA02 csi.DATA[4] usdhc2.DATA2

sim1.PORT1_TRXD

ecspi2.MOSI weim.AD[2] gpio4.IO[23] sai1.RX_SYNC

uart5.RTS_B

E1_32 E1 CSI_DATA03 csi.DATA[5] usdhc2.DATA3

sim2.PORT1_PD

ecspi2.MISO weim.AD[3] gpio4.IO[24] sai1.RX_BCLK

uart5.CTS_B

E1_33 D15 ENET1_RXER

enet1.RX_ER

uart7.RTS_B pwm8.OUT csi.DATA[23] weim.CRE gpio2.IO[7] global wdog

E1_34 K15 UART1_CTS uart1.CTS_B enet1.RX_CLK

usdhc1.WP csi.DATA[4] kpp.ROW[1] gpio1.IO[18] src.INT_BOOT

usdhc2.WP

E1_35 F14 ENET1_TXCLK

enet1.TX_CLK

uart7.CTS_B pwm7.OUT csi.DATA[22] anatop.ENET_REF_CLK2

gpio2.IO[6] gpt1.CLK

E1_41 F17 UART5_TXD uart5.TX enet2.CRS i2c2.SCL csi.DATA[14] kpp.ROW[7] gpio1.IO[30] csu.CSU_ALARM_AUT[0]

ecspi2.MOSI

E1_42 G17 UART4_TXD uart4.TX enet2.TDATA[2]

i2c1.SCL csi.DATA[12] kpp.ROW[6] gpio1.IO[28] csu.CSU_ALARM_AUT[2]

ecspi2.SCLK

E1_43 G13 UART5_RXD uart5.RX enet2.COL i2c2.SDA csi.DATA[15] kpp.COL[7] gpio1.IO[31] csu.CSU_INT_DEB

ecspi2.MISO

E1_44 G16 UART4_RXD uart4.RX enet2.TDATA[3]

i2c1.SDA csi.DATA[13] kpp.COL[6] gpio1.IO[29] csu.CSU_ALARM_AUT[1]

ecspi2.SS0

E1_45 K14 UART1_TXD uart1.TX enet1.RDATA[2]

i2c3.SCL csi.DATA[2] kpp.ROW[0] gpio1.IO[16] snvs_hp_wrapper.VIO_5_CTL

spdif.OUT

E1_46 H17 UART3_TXD uart3.TX enet2.RDATA[2]

uart2.RTS_B csi.DATA[1] kpp.ROW[4] gpio1.IO[24] gpt1.COMPARE3

anatop.OTG1_ID

E1_47 K16 UART1_RXD uart1.RX enet1.RDATA[3]

i2c3.SDA csi.DATA[3] kpp.COL[0] gpio1.IO[17] snvs_hp_wrapper.VIO_5

spdif.IN

E1_48 P11 SNVS_TAMPER2

snvs_lp_wrapper.TAMPER[2]

gpio5.IO[2]

E1_50 D2 CSI_DATA06 csi.DATA[8] usdhc2.DATA6

sim2.PORT1_SVEN

ecspi1.MOSI weim.AD[6] gpio4.IO[27] sai1.RX_DATA

usdhc1.RESET_B

E1_52 D3 CSI_DATA05 csi.DATA[7] usdhc2.DATA5

sim2.PORT1_RST_B

ecspi1.SS0 weim.AD[5] gpio4.IO[26] sai1.TX_BCLK

usdhc1.CD_B

E1_53 J17 UART2_TXD uart2.TX enet1.TDATA[2]

i2c4.SCL csi.DATA[6] kpp.ROW[2] gpio1.IO[20] gpt1.CAPTURE2

ecspi3.SS0

E1_54 D4 CSI_DATA04 csi.DATA[6] usdhc2.DATA4

sim2.PORT1_CLK

ecspi1.SCLK weim.AD[4] gpio4.IO[25] sai1.TX_SYNC

usdhc1.WP

E1_55 J16 UART2_RXD uart2.RX enet1.TDATA[3]

i2c4.SDA csi.DATA[7] kpp.COL[2] gpio1.IO[21] gpt1.COMPARE1

ecspi3.SCLK

E1_56 D1 CSI_DATA07 csi.DATA[9] usdhc2.DATA7

sim2.PORT1_TRXD

ecspi1.MISO weim.AD[7] gpio4.IO[28] sai1.TX_DATA

usdhc1.VSELECT

E1_57 H14 UART2_CTS uart2.CTS_B enet1.CRS can2.RX csi.DATA[8] kpp.ROW[3] gpio1.IO[22] gpt1.CLK ecspi3.MOSI

E1_59 J15 UART2_RTS uart2.RTS_B enet1.COL can2.TX csi.DATA[9] kpp.COL[3] gpio1.IO[23] gpt1.COMPARE2

ecspi3.MISO

E1_61 H16 UART3_RXD uart3.RX enet2.RDATA[3]

uart2.CTS_B csi.DATA[0] kpp.COL[4] gpio1.IO[25] caam_wrapper.RNG_OSC_OBS

epit1.OUT

E1_63 G14 UART3_CTS uart3.CTS_B enet2.RX_CLK

can1.RX csi.DATA[10] kpp.ROW[5] gpio1.IO[26] ccm.WAIT epit2.OUT

E1_65 H15 UART3_RTS uart3.RTS_B enet2.TX_ER can1.TX csi.DATA[11] kpp.COL[5] gpio1.IO[27] ccm.STOP wdog1.WDOG_B

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

Page 38 of 41

PIN CPU BALL PADNAME MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6 MODE8

X1_8 B16 LCD_DATA23

lcdif.DATA[23]

uart8.RTS_B ecspi1.MISO csi.DATA[15] weim.DATA[15]

gpio3.IO[28] src.BT_CFG[31]

usdhc1.DATA3

X1_10 A14 LCD_DATA22

lcdif.DATA[22]

uart8.CTS_B ecspi1.MOSI csi.DATA[14] weim.DATA[14]

gpio3.IO[27] src.BT_CFG[30]

usdhc1.DATA2

X1_12 B14 LCD_DATA21

lcdif.DATA[21]

uart8.RX ecspi1.SS0 csi.DATA[13] weim.DATA[13]

gpio3.IO[26] src.BT_CFG[29]

usdhc1.DATA1

X1_14 C14 LCD_DATA20

lcdif.DATA[20]

uart8.TX ecspi1.SCLK csi.DATA[12] weim.DATA[12]

gpio3.IO[25] src.BT_CFG[28]

usdhc1.DATA0

X1_16 D14 LCD_DATA19

lcdif.DATA[19]

uart7.RTS_B global wdog csi.DATA[11] weim.DATA[11]

gpio3.IO[24] src.BT_CFG[27]

usdhc1.CLK

X1_18 A13 LCD_DATA18

lcdif.DATA[18]

uart7.CTS_B ca7_platform.EVENTO

csi.DATA[10] weim.DATA[10]

gpio3.IO[23] src.BT_CFG[26]

usdhc1.CMD

X1_20 B13 LCD_DATA17

lcdif.DATA[17]

uart7.RX ca7_platform.TRACE_CTL

csi.DATA[0] weim.DATA[9]

gpio3.IO[22] src.BT_CFG[25]

usdhc1.DATA7

X1_22 C13 LCD_DATA16

lcdif.DATA[16]

uart7.TX ca7_platform.TRACE_CLK

csi.DATA[1] weim.DATA[8]

gpio3.IO[21] src.BT_CFG[24]

usdhc1.DATA6

X1_24 D13 LCD_DATA15

lcdif.DATA[15]

sai3.TX_DATA

ca7_platform.TRACE[15]

csi.DATA[23] weim.DATA[7]

gpio3.IO[20] src.BT_CFG[15]

usdhc1.DATA5

X1_26* A12 LCD_DATA14

lcdif.DATA[14]

sai3.RX_DATA

ca7_platform.TRACE[14]

csi.DATA[22] weim.DATA[6]

gpio3.IO[19] src.BT_CFG[14]

usdhc1.DATA4

X1_28* B12 LCD_DATA13

lcdif.DATA[13]

sai3.TX_BCLK

ca7_platform.TRACE[13]

csi.DATA[21] weim.DATA[5]

gpio3.IO[18] src.BT_CFG[13]

usdhc1.RESET_B

X1_30 C12 LCD_DATA12

lcdif.DATA[12]

sai3.TX_SYNC

ca7_platform.TRACE[12]

csi.DATA[20] weim.DATA[4]

gpio3.IO[17] src.BT_CFG[12]

ecspi1.RDY

X1_32 D12 LCD_DATA11

lcdif.DATA[11]

sai3.RX_BCLK

ca7_platform.TRACE[11]

csi.DATA[19] weim.DATA[3]

gpio3.IO[16] src.BT_CFG[11]

can2.RX

X1_33 F15 ENET1_TXEN

enet1.TX_EN uart6.RTS_B pwm6.OUT csi.DATA[21] enet2.MDC gpio2.IO[5] mqs.LEFT

X1_34 E12 LCD_DATA10

lcdif.DATA[10]

sai3.RX_SYNC

ca7_platform.TRACE[10]

csi.DATA[18] weim.DATA[2]

gpio3.IO[15] src.BT_CFG[10]

can2.TX

X1_35 E14 ENET1_TXD1

enet1.TDATA[1]

uart6.CTS_B pwm5.OUT csi.DATA[20] enet2.MDIO gpio2.IO[4] GPIO1_IO04

X1_36 A11 LCD_DATA09

lcdif.DATA[9] sai3.MCLK ca7_platform.TRACE[9]

csi.DATA[17] weim.DATA[1]

gpio3.IO[14] src.BT_CFG[9]

can1.RX

X1_37 D16 ENET2_RXER

enet2.RX_ER

uart8.RTS_B sim2.PORT0_SVEN

ecspi4.SS0 weim.ADDR[25]

gpio2.IO[15] global wdog

X1_38 B11 LCD_DATA08

lcdif.DATA[8] spdif.IN ca7_platform.TRACE[8]

csi.DATA[16] weim.DATA[0]

gpio3.IO[13] src.BT_CFG[8]

can1.TX

X1_39 N11 SNVS_TAMPER6

snvs_lp_wrapper.TAMPER[6]

gpio5.IO[6]

X1_40 D11 LCD_DATA07

lcdif.DATA[7] pwm8.OUT ca7_platform.TRACE[7]

enet2.1588_EVENT3_OUT

spdif.EXT_CLK

gpio3.IO[12] src.BT_CFG[7]

ecspi1.SS3

X1_41 L16 GPIO1_IO07 enet1.MDC anatop.ENET_REF_CLK2

usb.OTG_HOST_MODE

csi.PIXCLK usdhc2.CD_B

gpio1.IO[7] enet2.1588_EVENT1_OUT

uart1.RTS_B

X1_42 A10 LCD_DATA06

lcdif.DATA[6] pwm7.OUT ca7_platform.TRACE[6]

enet2.1588_EVENT3_IN

spdif.LOCK gpio3.IO[11] src.BT_CFG[6]

ecspi1.SS2

X1_43 B15 ENET2_TXEN

enet2.TX_EN uart8.RX sim2.PORT0_CLK

ecspi4.MOSI weim.ACLK_FREERUN

gpio2.IO[13] usb.OTG2_OC

X1_44 B10 LCD_DATA05

lcdif.DATA[5] pwm6.OUT ca7_platform.TRACE[5]

enet2.1588_EVENT2_OUT

spdif.OUT gpio3.IO[10] src.BT_CFG[5]

ecspi1.SS1

X1_45 B17 ENET2_CRS_DV

enet2.RX_EN

uart7.TX sim1.PORT0_RST_B

i2c4.SCL weim.ADDR[26]

gpio2.IO[10] usb.OTG1_PWR

X1_46 C10 LCD_DATA04

lcdif.DATA[4] pwm5.OUT ca7_platform.TRACE[4]

enet2.1588_EVENT2_IN

spdif.SR_CLK

gpio3.IO[9] src.BT_CFG[4]

sai1.TX_DATA

X1_48 D10 LCD_DATA03

lcdif.DATA[3] pwm4.OUT ca7_platform.TRACE[3]

enet1.1588_EVENT3_OUT

i2c4.SCL gpio3.IO[8] src.BT_CFG[3]

sai1.RX_DATA

X1_49 D17 ENET2_TXCLK

enet2.TX_CLK

uart8.CTS_B sim2.PORT0_RST_B

ecspi4.MISO anatop.ENET_REF_CLK1

gpio2.IO[14] anatop.OTG2_ID

X1_50 E10 LCD_DATA02

lcdif.DATA[2] pwm3.OUT ca7_platform.TRACE[2]

enet1.1588_EVENT3_IN

i2c4.SDA gpio3.IO[7] src.BT_CFG[2]

sai1.TX_BCLK

X1_51 A15 ENET2_TXD0

enet2.TDATA[0]

uart7.RX sim1.PORT0_SVEN

i2c4.SDA weim.EB_B[2]

gpio2.IO[11] usb.OTG1_OC

X1_52 A9 LCD_DATA01

lcdif.DATA[1] pwm2.OUT ca7_platform.TRACE[1]

enet1.1588_EVENT2_OUT

i2c3.SCL gpio3.IO[6] src.BT_CFG[1]

sai1.TX_SYNC

X1_53 A16 ENET2_TXD1

enet2.TDATA[1]

uart8.TX sim2.PORT0_TRXD

ecspi4.SCLK weim.EB_B[3]

gpio2.IO[12] usb.OTG2_PWR

X1_54 B9 LCD_DATA00

lcdif.DATA[0] pwm1.OUT ca7_platform.TRACE[0]

enet1.1588_EVENT2_IN

i2c3.SDA gpio3.IO[5] src.BT_CFG[0]

sai1.MCLK

X1_56 N8 SNVS_TAMPER5

snvs_lp_wrapper.TAMPER[5]

gpio5.IO[5]

X1_58 D9 LCD_HSYNC

lcdif.HSYNC lcdif.RS uart4.CTS_B sai3.TX_BCLK

wdog3.WDOG_RST_B_DEB

gpio3.IO[2] ecspi2.SS1

X1_60 B8 LCD_ENABLE

lcdif.ENABLE lcdif.RD_E uart4.RX sai3.TX_SYNC

weim.CS3_B gpio3.IO[1] ecspi2.RDY

X1_62 C9 LCD_VSYNC lcdif.VSYNC lcdif.BUSY uart4.RTS_B sai3.RX_DATA

wdog2.WDOG_B

gpio3.IO[3] ecspi2.SS2

X1_63 C17 ENET2_RXD0

enet2.RDATA[0]

uart6.TX sim1.PORT0_TRXD

i2c3.SCL enet1.MDIO gpio2.IO[8] wdog1.WDOG_RST_B_DEB

X1_64 A8 LCD_CLK lcdif.CLK lcdif.WR_RWN

uart4.TX sai3.MCLK weim.CS2_B gpio3.IO[0] wdog1.WDOG_RST_B_DEB

X1_65 C16 ENET2_RXD1

enet2.RDATA[1]

uart6.RX sim1.PORT0_CLK

i2c3.SDA enet1.MDC gpio2.IO[9] wdog2.WDOG_RST_B_DEB

X1_66 B4 NAND_ALE rawnand.ALE usdhc2.RESET_B

qspiA_DQS pwm3.OUT weim.ADDR[17]

gpio4.IO[10] ecspi3.SS1

X1_68 P14 JTAG_TMS sjc.TMS gpt2.CAPTURE1

sai2.MCLK ccm.CLKO1 ccm.WAIT gpio1.IO[11] sdma.EXT_EVENT[1]

epit1.OUT

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

Page 39 of 41

PIN CPU BALL PADNAME MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6 MODE8

X2_3 T10 BOOT_MODE0

src.BOOT_MODE[0]

gpio5.IO[11]

X2_5 U10 BOOT_MODE1

src.BOOT_MODE[1]

gpio5.IO[12]

X2_7* B12 LCD_DATA13

lcdif.DATA[13]

sai3.TX_BCLK

ca7_platform.TRACE[13]

csi.DATA[21] weim.DATA[5]

gpio3.IO[18] src.BT_CFG[13]

usdhc1.RESET_B

X2_9* A12 LCD_DATA14

lcdif.DATA[14]

sai3.RX_DATA

ca7_platform.TRACE[14]

csi.DATA[22] weim.DATA[6]

gpio3.IO[19] src.BT_CFG[14]

usdhc1.DATA4

X2_13** L14 GPIO1_IO02 i2c1.SCL gpt1.COMPARE2

usb.OTG2_PWR

anatop.ENET_REF_CLK_25M

usdhc1.WP gpio1.IO[2] enet1.1588_EVENT1_IN

uart1.TX

X2_15** L17 GPIO1_IO03 i2c1.SDA gpt1.COMPARE3

usb.OTG2_OC

osc32k.32K_OUT

usdhc1.CD_B

gpio1.IO[3] enet1.1588_EVENT1_OUT

uart1.RX

X2_19 F16 ENET1_RXD0

enet1.RDATA[0]

uart4.RTS_B pwm1.OUT csi.DATA[16] can1.TX gpio2.IO[0] usdhc1.LCTL

X2_21 E17 ENET1_RXD1

enet1.RDATA[1]

uart4.CTS_B pwm2.OUT csi.DATA[17] can1.RX gpio2.IO[1] usdhc2.LCTL

X2_25 E16 ENET1_CRS_DV

enet1.RX_EN

uart5.RTS_B osc32k.32K_OUT

csi.DATA[18] can2.TX gpio2.IO[2] usdhc1.VSELECT

X2_27 E15 ENET1_TXD0

enet1.TDATA[0]

uart5.CTS_B anatop.24M_OUT

csi.DATA[19] can2.RX gpio2.IO[3] usdhc2.VSELECT

X2_52 R10 SNVS_TAMPER0

snvs_lp_wrapper.TAMPER[0]

gpio5.IO[0]

NOTE*: Pin X1_26 and X1_28 are also routed to pin X2_7 and X2_9 NOTE**: Pin X2_13 and X2_15 can only be used for I2C function and should not be used in another pinmux mode.

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

Page 40 of 41

7. Disclaimer and Important Notice Wandboard.org reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to Wandboard.org terms and conditions of sale supplied at the time of order acknowledgment. Wandboard.org warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Wandboard.org standard warranty. Testing and other quality control techniques are used to the extent Wandboard.org deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. Wandboard.org assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using Wandboard.org components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. Wandboard.org does not warrant or represent that any license, either express or implied, is granted under any Wandboard.org patent right, copyright, mask work right, or other Wandboard.org intellectual property right relating to any combination, machine, or process in which Wandboard.org products or services are used. Information published by Wandboard.org regarding third-party products or services does not constitute a license from Wandboard.org to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from Wandboard.org under the patents or other intellectual property of Wandboard.org. Wandboard.org products are not authorized for use in safety-critical applications (such as life support) where a failure of the Wandboard.org product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Wandboard.org products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by Wandboard.org. Further, Buyers must fully indemnify Wandboard.org and its representatives against any damages arising out of the use of Wandboard.org products in such safety-critical applications. Wandboard.org products are neither designed nor intended for use in military/aerospace applications or environments unless the Wandboard.org products are specifically designated by Wandboard.org as military grade or "enhanced plastic." Only products designated by Wandboard.org as military-grade meet military specifications. Buyers acknowledge and agree that any such use of Wandboard.org products which Wandboard.org has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. Wandboard.org products are neither designed nor intended for use in automotive applications or environments unless the specific Wandboard.org products are designated by Wandboard.org as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, Wandboard.org will not be responsible for any failure to meet such requirements.

PICO-IMX6UL HARDWARE MANUAL – VER 1.00 – DEC 7 2016

Page 41 of 41

8. Schematics

WANDBOARD DESIGN AND DISCLAIMER These design materials referred to in this document are *NOT SUPPORTED* and DO NOT constitute a reference design. "Community" support is available via resources at Wandboard.org forums. THERE IS NO WARRANTY FOR THE DESIGN MATERIALS, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE DESIGN MATERIALS "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCEOF THE DESIGN MATERIALS IS WITH YOU. SHOULD THE DESIGN MATERIALS PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. This board was designed as an evaluation and development tool. It was not designed with any other application in mind. As such, these design materials may or may not be suitable for any other purposes. If used, the design material becomes your responsibility as to whether or not it meets your specific needs or your specific applications and may require changes to meet your requirements. On the following pages you will find the schematics of the PICO-IMX6UL-EMMC Compute Module and the PICO-HOBBIT Carrier Baseboard. Components marked with -x are not populated.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

P01 Index

P06 WLAN AP6335

PCB

P04 IMX6UL PERI

PAGE

PICO-IMX6UL-EMMC REV:A1

GND

TITLE

P05 IMX6UL PERII

P08 Expansion CONN.

P02 IMX6UL PWR

P03 IMX6UL DDR3L

Components marked -X are not populated (DNP)

L=10, 37 x 40mm

P07 PC32PF3000A7EP

THERE IS NO WARRANTY FOR THE DESIGN MATERIALS, TO THE EXTENTPERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED INWRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDETHE DESIGN MATERIALS "AS IS" WITHOUT WARRANTY OF ANY KIND,EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR APARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY ANDPERFORMANCE OF THE DESIGN MATERIALS IS WITH YOU. SHOULD THEDESIGN MATERIALS PROVE DEFECTIVE, YOU ASSUME THE COST OF ALLNECESSARY SERVICING, REPAIR OR CORRECTION.

WANDBOARD DESIGN AND DISCLAIMER

PICO-IMX6UL-EMMCA1

INDEX

WANDBOARD.ORG

C

1 8Wednesday, November 30, 2016

Title

Size Document Number Rev

Date: Sheet of

FM11FM40S-X

HOLE1

MC134D75

FM5FM40S-X

FM8FM40S-X

PCBPCB10TN111RA1PCB1

FM3FM40S-X

HOLE2

MC134D75

FM6FM40S-X

FM7FM40S-X

FM9FM40S-X

FM4FM40S-X

FM12FM40S-X

HOLE3

MC134D75

FM10FM40S-X

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IMX6UL POWER eMMC

PICO-IMX6UL-EMMCA1

CPU POWER

WANDBOARD.ORG

C

2 8Wednesday, November 30, 2016

Title

Size Document Number Rev

Date: Sheet of

NVCC_PLL_OUT

VDD_HIGH_IN

VDD_SNVS_CAP

VDD_HIGH_CAP

VDD_ARM_CAP

VDD_SNVS_IN

VDD_SOC_CAP

DAT6

SD1_DATA0

SD1_CMD

SD1_DATA3

DAT5DAT4

DAT7

SD1_CLK

SD1_DATA2SD1_DATA1

SD1_DATA6

SD1_DATA4SD1_DATA5

SD1_DATA7

SD1_CD

SD1_DATA04SD1_DATA14

SD1_DATA34SD1_DATA24

SD1_CMD4SD1_CLK4

SD1_DATA44

SD1_DATA74

SD1_DATA54SD1_DATA64

SD1_CD5,8

GNDGND

GND

GND

GNDGND

GND

GND

GND

GND

VDD_ARM_SOC_IN

VDD_HIGH_IN

VDD_SNVS_3V3

VDD_SNVS_IN

VDD_HIGH_CAP

VDD_SOC_CAP

VDD_ARM_CAP

DCDC_3V3

GNDGND

GN

D

NVCC_SD

NVCC_SD

GND

NVCC_UART

0402C9

4.7

U/1

0V

/X5R

-C2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C11

0201

R345

10K

-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C4

0402C17

10U

/6.3

V/X

5R

-C2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C2

0201

R354

10K

-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C16

0402C12

4.7

U/1

0V

/X5R

-C2

0201R351 0-R1

0201

R346

10K

-R1

0201R350 0-R1

0402

C171

2.2U/16V/X5R-C2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C19

0402C15

10U

/6.3

V/X

5R

-C2

0201

R340

10K

-R1

0805C177

10U

/10V

/X5R

-C5

D1 RB521S30T1G

A C

0201R352 0-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C1

0201

0.1

U/1

6V

/X5R

-CC

1

C180

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C18

0201

R341

10K

-R1

0201

R342

10K

-R1

0201R353 0-R1

0402C3

22U

/6.3

V/X

5R

-C2

0201

0.1

U/1

6V

/X5R

-CC

1

C178

0201

R343

10K

-R1

i.MX6UL - POWER

V11.19

LDO_ARM_SOC

LDO_2P5

LDO_1P1

LDO_SNVS

U2A

PCIMX6G3CVM05AA

A1U1

C3

G3

J5

L3

N3

R3N5

R5

C7

F7

G7

H7

L7

M7

R7

F8

M8

G9G10G11H11

P13

G8H8

K10

H10

K9

J9J8

F9

M9F10 M10

C11

F11

M11

R11

F12

K8

G12

H12 J12

K12

L12

T14

U14

C15

G15

R16

A17

R17

U17

J7

K7

R14

N12

N13

P12

J10

H9

L8L9L10

J11

L11

K11

G5

F6

E8E11

M12

R15

VSS1VSS45

VSS3

VSS16

VSS23

VSS28

VSS36

VSS38VSS37

VSS39

VSS4

VSS10

VSS18

VSS21

VSS29

VSS31

VSS40

VSS11

VSS32

VDD_ARM_CAP1VDD_ARM_CAP2VDD_ARM_CAP3VDD_ARM_CAP4

NVCC_PLL

VDD_SOC_CAP1VDD_SOC_CAP2

VDD_SOC_IN6

VDD_SOC_IN2

VDD_SOC_IN5

VDD_SOC_IN3VDD_SOC_CAP3

VSS12

VSS33VSS13 VSS34

VSS5

VSS14

VSS35

VSS41

VSS15

VDD_SOC_CAP5

VSS19

VSS22 VSS25

VSS27

VSS30

VSS44

VSS46

VSS6

VSS20

VSS42

VSS2

VSS43

VSS47

VSS24

VSS26

VDD_HIGH_CAP1

VDD_SNVS_CAP

VDD_HIGH_IN

VDD_SNVS_IN

VDD_SOC_IN4

VDD_SOC_IN1

VDD_SOC_CAP7VDD_SOC_CAP8VDD_SOC_CAP9

VDD_SOC_CAP4

VDD_SOC_CAP10

VDD_SOC_CAP6

VSS17

VSS9

VSS7VSS8

NGND_KEL0

VDD_HIGH_CAP2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C6

0201

R344

10K

-R1

0402C7

22U

/6.3

V/X

5R

-C2

0201

0.1

U/1

6V

/X5R

-CC

1

C179

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C13

0201

R355

10K

-R1-X

0201

0.1

U/1

6V

/X5R

-CC

1

C167

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C10

0201

R349

10K

-R1-X

0402C8

22U

/6.3

V/X

5R

-C2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C14

U1

EMMC04G-S100-A08

A3A4A5B2

E6F5

J10K9

E7G5H10

P3P5N4M4C6

K8C2

M6M5

B3B4B5B6

J1J2J3J5

J12J13J14K1K2K3K6K7

K10K12K13K14

L1L2L3

L12L13L14M1M2M3M7M8M9

M10M11M12M13M14

N1N3N6N7N8N9

N10N11N12N13N14

P1P2P7P8P9

P11P12P13P14

C4N2N5P4P6

A9A10A11A12A13A14B1B7B8B9B10B11B12B13B14C1C3C5C7C8C9

C11C10

C12C13C14D1D2D3D4D12D13D14E1E2E3E5E8E9E10E12E13E14F1F2F3F10F12F13F14G1G2G3G10G12G13G14

H1H2H3H4H5

H12H13H14

A1A2A6A7A8

P10

K5

DAT0DAT1DAT2DAT3

VDDFVDDFVDDFVDDF

VSSVSSVSS

VCCQVCCQVCCQVCCQVCCQ

VSSCREG

CLKCMD

DAT4DAT5DAT6DAT7

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNCNCNC

VSSQVSSQVSSQVSSQVSSQ

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNC

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNCNCNCNCNCNCNC

NCNCNCNCNC

NC

RESET

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C5

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IMX6UL DDR3L

MT41K256M16HA-125:E

PICO-IMX6UL-EMMCA1

IMX6UL DDR3L

WANDBOARD.ORG

C

3 8Wednesday, November 30, 2016

Title

Size Document Number Rev

Date: Sheet of

DRAM_SDCLK0_N

DRAM_SDBA0DRAM_SDBA1DRAM_SDBA2

DRAM_SDQS1_PDRAM_SDQS1_NDRAM_DQM1

DRAM_SDCKE0

DRAM_RESET_B

ZQPAD

DRAM_ODT1DRAM_ODT0

DRAM_CS0_BDRAM_CS1_B

DRAM_RAS_BDRAM_CAS_BDRAM_SDWE_B

DRAM_SDCLK0_PDRAM_SDCLK0_N

DRAM_SDCKE1

DRAM_SDQS0_NDRAM_SDQS0_P

DRAM_DQM0

DRAM_SDQS0_N

DRAM_DATA5

DRAM_SDQS1_P

DRAM_ADDR3

DRAM_ADDR10

DRAM_ADDR7

DRAM_ADDR15

DRAM_DATA3

DRAM_SDQS1_N

DRAM_DATA7

DRAM_ADDR1

DRAM_DATA6

DRAM_DATA11

DRAM_SDCLK0_N

DRAM_DATA14

DRAM_SDQS0_N

DRAM_ADDR12

DRAM_ADDR11

DRAM_DATA7

DRAM_SDCKE0

DRAM_SDCKE1

DRAM_ADDR4

DRAM_ADDR0

DRAM_DATA12

DRAM_SDQS0_P

DRAM_DQM0

DRAM_ODT0

DRAM_ADDR2

DRAM_SDQS1_N

DRAM_DATA15

DRAM_DATA8

DRAM_DATA6

DRAM_ADDR15

DRAM_ADDR8

DRAM_DATA8

DRAM_RESET_B

DRAM_CS0_B

DRAM_ADDR13

DRAM_CS1_B

DRAM_SDBA0DRAM_DATA13

DRAM_SDQS1_P

DRAM_DATA12

DRAM_DATA1

DRAM_ADDR5

DRAM_ADDR3

DRAM_ZQ0

DRAM_RAS_B

DRAM_DATA11

DRAM_DATA3

DRAM_ZQ1

DRAM_DATA14

DRAM_DQM1

DRAM_ODT1

DRAM_DATA10DRAM_ADDR14

DRAM_SDBA1

DRAM_ADDR9

DRAM_ADDR4

DRAM_ADDR12

DRAM_ADDR6

DRAM_DATA[0:15]

DRAM_ADDR8

DRAM_SDCLK0_P

DRAM_SDWE_BDRAM_CAS_B

DRAM_DATA0DRAM_ADDR1

DRAM_DATA15

DRAM_DATA1

DRAM_SDQS0_P

DRAM_ADDR10

DRAM_DATA5

DRAM_SDBA2

DRAM_ADDR5

DRAM_ADDR13

DRAM_SDCLK0_P

DRAM_DATA13

DRAM_ADDR2

DRAM_DATA0

DRAM_DATA4

DRAM_DATA9

DRAM_ADDR7DRAM_ADDR9

DRAM_ADDR14

DRAM_ADDR0

DRAM_ADDR6

DRAM_DATA2

DRAM_DATA9

DRAM_DATA4

DRAM_DATA2

DRAM_ADDR[0:15]

DRAM_DATA10

DRAM_ADDR11

GND

GND

GN

D

GND

GND

GNDGND

GND GND GNDG

ND

GND

VDD_HIGH_CAP

DRAM_1V35

DRAM_VREF

DRAM_1V35

DRAM_1V35

DRAM_VREF

DRAM_VREF

DRAM_1V35

GND

0402C37

10U

/6.3

V/X

5R

-C2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C55

0201R39 240-1%-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C33

4G_DDR3_SDRAM_256MX16

U5

H5TC4G63CFR-PBA

N3P7P3N2P8P2R8R2T8R3

M2N8M3

B2

D9

G7

K2

K8

N1

N9

R1

R9

A1

A8

C1

C9

A9

B3

E1

G8

J2

J8

M1

M9

P1

P9

T1

T9

B1

B9

D1

D8

E2

L1L9M7

T7

E3F7F2F8H3H8G2H7

L7R7N7

F3G3

C7B7

D7C3C8C2A7A2B8A3

D2

E9

F1

H2

H9

E8

F9

G1

G9

T3

J9J1

J7K7K9

L2J3K3L3

T2

K1

M8H1

L8

E7D3

A0A1A2A3A4A5A6A7A8A9

BA0BA1BA2

VD

D1

VD

D2

VD

D3

VD

D4

VD

D5

VD

D6

VD

D7

VD

D8

VD

D9

VD

DQ

1V

DD

Q2

VD

DQ

3V

DD

Q4

VS

S1

VS

S2

VS

S3

VS

S4

VS

S5

VS

S6

VS

S7

VS

S8

VS

S9

VS

S10

VS

S11

VS

S12

VS

SQ

1V

SS

Q2

VS

SQ

3V

SS

Q4

VS

SQ

5

NC_L1NC_L9NC_M7

A14

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7

A10/APA11A12/BC

LDQSLDQS

UDQSUDQS

DQ8DQ9

DQ10DQ11DQ12DQ13DQ14DQ15

VD

DQ

5V

DD

Q6

VD

DQ

7V

DD

Q8

VD

DQ

9V

SS

Q6

VS

SQ

7V

SS

Q8

VS

SQ

9

A13

NC_J9NC_J1

CKCKCKE

CSRASCASWE

RESET

ODT

VREFCAVREFDQ

ZQ

LDMUDM

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C490201

0.2

2U

/6.3

V/X

5R

-CC

1

C43

0201

R42

1.5K-1%-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C35

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C42

0201

2.2

P-C

C1

C57

0201R35 10K-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C41

0201R38 10K-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C40

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C500201

0.2

2U

/6.3

V/X

5R

-CC

1

C39

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C51

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C34

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C45

0201

R40

1.5K-1%-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C38

0402C44

22U

/6.3

V/X

5R

-C2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C46

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C36

0402C59

4.7

U/1

0V

/X5R

-C2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C52

0201R37 240-1%-R1

0201

R41470-R1

0201

0.1

U/1

6V

/X5R

-CC

1

C62

0201R36 240-1%-R1

0201

0.1

U/1

6V

/X5R

-CC

1

C58

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C53

0201R34 10K-R1

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C470201

0.2

2U

/6.3

V/X

5R

-CC

1

C54

i.MX6UL - DDR

V11.19

U2C

PCIMX6G3CVM05AA

P4

L5H2K1M2K4L1G2H4J4L2M4K3L4H3G1K5

N4

J2

N2H5

M5

G4

M1H1

P1P2

K2

M3J3

N1F1

J1

T4U6T6U7U8T8

P6P7

T5U4

T7

U2U3U5R4P5P3R2

T1T2

R1

T3

G6H6J6K6L6M6

N6

DRAM_VREF

DRAM_ADDR00DRAM_ADDR01DRAM_ADDR02DRAM_ADDR03DRAM_ADDR04DRAM_ADDR05DRAM_ADDR06DRAM_ADDR07DRAM_ADDR08DRAM_ADDR09DRAM_ADDR10DRAM_ADDR11DRAM_ADDR12DRAM_ADDR13DRAM_ADDR14DRAM_ADDR15

DRAM_ZQPAD

DRAM_CAS

DRAM_CS0DRAM_CS1

DRAM_RAS

DRAM_RESET

DRAM_SDBA0DRAM_SDBA1

DRAM_SDCLK0_PDRAM_SDCLK0_N

DRAM_SDBA2

DRAM_SDCKE0DRAM_SDCKE1

DRAM_ODT0DRAM_ODT1

DRAM_SDWE

DRAM_DATA00DRAM_DATA01DRAM_DATA02DRAM_DATA03DRAM_DATA04DRAM_DATA05

DRAM_SDQS0_PDRAM_SDQS0_N

DRAM_DATA06DRAM_DATA07

DRAM_DQM0

DRAM_DATA08DRAM_DATA09DRAM_DATA10DRAM_DATA11DRAM_DATA12DRAM_DATA13DRAM_DATA14

DRAM_SDQS1_PDRAM_SDQS1_N

DRAM_DATA15

DRAM_DQM1

NVCC_DRAM1NVCC_DRAM2NVCC_DRAM3NVCC_DRAM4NVCC_DRAM5NVCC_DRAM6

NVCC_DRAM_2P5

0201

2.2

P-C

C1

C61

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C48

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IMX6UL PERI I

3V3

1V8

3V3

3V3

3V3

3V3

3V3

PWM3

PICO-IMX6UL-EMMCA1

IMX6UL PERI I

WANDBOARD.ORG

C

4 8Wednesday, November 30, 2016

Title

Size Document Number Rev

Date: Sheet of

USB_OTG_DNUSB_OTG_DP

USB_HOST_DNUSB_HOST_DP

LCD_PCLK

LCD_DELCD_HSYNCLCD_VSYNCLCD_RESET

LCD_DATA0LCD_DATA1LCD_DATA2LCD_DATA3LCD_DATA4LCD_DATA5LCD_DATA6LCD_DATA7LCD_DATA8LCD_DATA9LCD_DATA10LCD_DATA11LCD_DATA12LCD_DATA13LCD_DATA14LCD_DATA15LCD_DATA16LCD_DATA17LCD_DATA18LCD_DATA19LCD_DATA20LCD_DATA21LCD_DATA22LCD_DATA23

CAN1_TXCAN1_RX

CAN2_RX

CAN2_TX

ENET2_TXD0ENET2_TXD1

ENET2_TX_CLK_R

ENET2_nRST

ENET2_TXEN

nWDOG

ENET2_TX_CLK

SD1_CLK

SD1_DATA2

SD1_CLK_R

SD1_DATA3

SD1_DATA1SD1_DATA0

LCD_DATA[23:0]

SD1_CMDSD1_CMD_R

SD1_DATA0_R

ENET2_RXD0ENET2_RXD1

ENET2_REF_CLK ENET_REFCLK

ENET_MDCENET_MDIO

USB_OTG_PWR

USB_OTG_ID

PWM8_3V

UART5_TXDUART5_RXD

UART5_CTSUART5_RTS

I2C1_SCLI2C1_SDA

ENET_REFCLK

PWM7_3V

FAULT

SD2_DATA0

SD2_DATA2SD2_DATA3

SD2_CMD

LCD_BLT_CTRL

BT_HOST_WAKEWL_REG_ON

WL_HOST_WAKE

SD1_DATA4

SD1_DATA5SD1_DATA6

ENET2_CRS_DV

GPIO_P32SAI1_SYNC

GPIO_P25

UART6_RXD

GPIO_P30

UART6_TXD

GPIO_P24

GPIO_P26

SAI1_RXSAI1_BCLK

GPIO_P28

SAI1_TX

SD2_DATA1

SD2_CLKSD1_DATA7

USB_OTG_DP 8

USB_HOST_DP 8USB_HOST_DN 8

LCD_PCLK 8

LCD_DE 8LCD_HSYNC 8LCD_VSYNC 8

SD1_CMD 2SD1_CLK 2

SD1_DATA0 2

nWDOG 7

CAN1_RX 8

ENET2_TX_CLK 8

ENET2_TXD0 8ENET2_TXD1 8

ENET2_CRS_DV 8

ENET2_TXEN 8

SD1_DATA2 2SD1_DATA1 2

SD1_DATA3 2

LCD_DATA[23:0] 5,8

USB_OTG_DN 8

ENET2_RXD0 8ENET2_RXD1 8

ENET2_REF_CLK8

ENET_MDIO 8

USB_OTG_PWR 8

CAN1_TX 8

CAN2_RX 8

CAN2_TX 8

ENET_MDC 8

USB_OTG_ID 8

PWM8_3V 8

UART5_TXD 6UART5_RXD 6

UART5_RTS 6UART5_CTS 6

I2C1_SCL 7,8I2C1_SDA 7,8

ENET2_nRST 8

PWM7_3V 8

FAULT 8

SD2_DATA1 6SD2_DATA2 6

SD2_DATA0 6

SD2_DATA3 6

SD2_CLK 6SD2_CMD 6

BT_HOST_WAKE 6WL_HOST_WAKE 6

WL_REG_ON 6

SD1_DATA4 2

SD1_DATA5 2SD1_DATA6 2

SD1_DATA7 2LCD_BLT_CTRL 8

GPIO_P30 8

SAI1_SYNC 8SAI1_BCLK 8

GPIO_P32 8

UART6_RXD 8

SAI1_TX 8SAI1_RX 8

UART6_TXD 8

GPIO_P25 8GPIO_P24 8

GPIO_P26 8GPIO_P28 8

GND

GND

GND

GND

GND

GND

GND

GND

NVCC_NAND

NVCC_CSI

NVCC_ENET

NVCC_SD

NVCC_LCDIF

VDDUSB

NVCC_GPIO

VDDA_ADC_3P3

GND

USB_OTG_VBUS

USB_HOST_VBUS

NVCC_SD

DCDC_3V3

GND

GND

GND

DCDC_3V3

i.MX6UL - USB

LDO_USB

V11.19

U2F

PCIMX6G3CVM05AA

T12

U16

T15U15

R12

U12 T13U13

USB_OTG1_VBUS

USB_OTG1_CHD

USB_OTG1_DNUSB_OTG1_DP

VDD_USB_CAP

USB_OTG2_VBUS USB_OTG2_DNUSB_OTG2_DP

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C70

i.MX6UL - SD

NVCC_SD1

V11.19

U2I

PCIMX6G3CVM05AA

C2C1

B3B2B1A2

C4

SD1_CMDSD1_CLK

SD1_DATA0SD1_DATA1SD1_DATA2SD1_DATA3

NVCC_SD1 0201R274 0-R1

0603

10U

/16V

/X5R

-C3

C67

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C64

i.MX6UL - LCD

NVCC_LCD1

V11.19

U2D

PCIMX6G3CVM05AA

E9

B9A9E10D10C10B10A10D11B11A11E12D12C12B12A12D13C13B13A13D14C14B14A14B16

D9

A8

B8

C9

E13

LCD_RESET

LCD_DATA00LCD_DATA01LCD_DATA02LCD_DATA03LCD_DATA04LCD_DATA05LCD_DATA06LCD_DATA07LCD_DATA08LCD_DATA09LCD_DATA10LCD_DATA11LCD_DATA12LCD_DATA13LCD_DATA14LCD_DATA15LCD_DATA16LCD_DATA17LCD_DATA18LCD_DATA19LCD_DATA20LCD_DATA21LCD_DATA22LCD_DATA23

LCD_HSYNC

LCD_CLK

LCD_ENABLE

LCD_VSYNC

NVCC_LCD

0201R275 0-R1

0201

0.1

U/1

6V

/X5R

-CC

1

C73

i.MX6UL - NAND

NVCC_NAND

V11.19

U2J

PCIMX6G3CVM05AA

C5B5

B4A4D8

A3

D7B7A7D6C6B6A6A5

C8D5

E7

E6

NAND_CE0NAND_CE1

NAND_ALENAND_CLENAND_RE

NAND_READY

NAND_DATA00NAND_DATA01NAND_DATA02NAND_DATA03NAND_DATA04NAND_DATA05NAND_DATA06NAND_DATA07

NAND_WENAND_WP

NVCC_NAND

NAND_DQS

0201

R2836.8K-R1

0201

1U/6.3V/X5R-CC1 C172

i.MX6UL - ENET

NVCC_ENET

V11.19

U2H

PCIMX6G3CVM05AA

E17

E15E14F15F14

D15

F13

F16

E16

A15A16B15D17C17C16D16B17

ENET1_RX_DATA1

ENET1_TX_DATA0ENET1_TX_DATA1

ENET1_TX_ENENET1_TX_CLK

ENET1_RX_ER

NVCC_ENET

ENET1_RX_DATA0

ENET1_RX_EN

ENET2_TX_DATA0ENET2_TX_DATA1

ENET2_TX_ENENET2_TX_CLK

ENET2_RX_DATA0ENET2_RX_DATA1

ENET2_RX_ERENET2_RX_EN

0201R44 0-R1

0201

R2846.8K-R1

0402C74

1U

/10V

/X5R

-C2

i.MX6UL - GPIO

NVCC_GPIO

V11.19

U2K

PCIMX6G3CVM05AA

J13 K13L15L14L17M16M17K17L16N17M15

NVCC_GPIO GPIO1_IO00GPIO1_IO01GPIO1_IO02GPIO1_IO03GPIO1_IO04GPIO1_IO05GPIO1_IO06GPIO1_IO07GPIO1_IO08GPIO1_IO09

0201R50 10-R1

i.MX6UL - CSI

NVCC_CSI

V11.19

U2E

PCIMX6G3CVM05AA

F2

E5F5

E4

F3

E3E2E1D4D3D2D1

F4

CSI_VSYNC

CSI_PIXCLKCSI_MCLK

CSI_DATA00

CSI_HSYNC

CSI_DATA01CSI_DATA02CSI_DATA03CSI_DATA04CSI_DATA05CSI_DATA06CSI_DATA07

NVCC_CSI

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C71

0402C66

1U

/10V

/X5R

-C2

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C72

0201 R49

10K-R1

0201R321 4.7K-R1

0402C69

1U

/10V

/X5R

-C2

0201

0.1

U/1

6V

/X5R

-CC

1

C68

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C65

0201

0.2

2U

/6.3

V/X

5R

-CC

1

C63

i.MX6UL - ADC

V11.19

U2G

PCIMX6G3CVM05AA

M13

L13

ADC_VREFH

VDDA_ADC_3P3

0201R52 10-R1

0201R48

10K-R1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IMX6UL PERI II

1V8

Boot ModeR90

0 1

R82

1 0

R89

SD1 1

R84

00

R92R91

CFG1_5 CFG2_4CFG1_6 CFG1_4 CFG2_5CFG1_7

R85R83

CFG2_3

0

CFG2_6

Boot Config Select

eMMC(DEFAULT) 0 1 1 0 1 0 0 0

LOW Hi

IMX6UL BOOT TYPE

Internal Boot

Serial DownloaderLOW

BMODE[0:1]

Hi

MODE1MODE0

R288 OFF: DDR3L 256MBR288 ON : DDR3L 512MB

GPIO5_1:

PICO-IMX6UL-EMMCA1

IMX6UL PERI II

WANDBOARD.ORG

C

5 8Wednesday, November 30, 2016

Title

Size Document Number Rev

Date: Sheet of

ON_OFF

BOOT_MODE1

BOOT_MODE0

XTALI_R

OSC_CLK

POR_B

BT_CFG2_6

BT_CFG4_7 LCD_DATA23

BT_CFG4_4 LCD_DATA20

BT_CFG2_4 LCD_DATA12

BT_CFG1_4 LCD_DATA4

BT_CFG4_2 LCD_DATA18

BT_CFG2_3 LCD_DATA11

BT_CFG4_5 LCD_DATA21

BT_CFG1_6 LCD_DATA6

BT_CFG4_6 LCD_DATA22

BT_CFG2_5 LCD_DATA13

BT_CFG4_1 LCD_DATA17

BT_CFG1_7 LCD_DATA7

BT_CFG4_3 LCD_DATA19

BT_CFG4_0 LCD_DATA16

BT_CFG1_5 LCD_DATA5

BT_CFG2_6 LCD_DATA14

BT_CFG1_1 LCD_DATA1BT_CFG1_0 LCD_DATA0

BT_CFG2_1 LCD_DATA9BT_CFG2_0 LCD_DATA8

BT_CFG1_3 LCD_DATA3BT_CFG1_2 LCD_DATA2

BT_CFG2_2 LCD_DATA10BT_CFG2_7 LCD_DATA15

Y1_4Y1_1

OSC_CLK

Y1_4

Y1_1

BT_CFG2_5

GPIO5_3

I2C3_SDAI2C3_SCL

GPIO_P48_3V

BT_nRSTGPIO5_7

USB_HOST_OC

BT_WAKEENET2_nINTPMIC_nINT

LCD_BLT_EN

GPIO_P44

UART3_TXD

SPI3_MOSI

PMIC_nINT

ENET2_nINT

USB_HOST_OC

BOOT_MODE1

SPDIF_TX

SPI3_CS0

XTALO

SAI2_RX

GPIO5_7

GPIO_P48_3V

RTC_XTALO

PMIC_STBY_REQ

I2C2_SDA

UART3_RTS

LCD_BLT_EN

PMIC_ON_REQ

XTALI

LCD_VDD_EN

I2C2_SCL

RTC_XTALI

BOOT_MODE0

BT_WAKE

SAI2_TXSAI2_SYNC

GPIO_P42

I2C2_SDA

UART3_CTS

GPIO5_3

GPIO5_1

TEST_MODE

UART3_RXD

GPIO_P34

I2C3_SDA

BT_nRST

I2C2_SCL

GPIO5_1

SPI3_MISO

SPI3_SCLK

I2C3_SCL

SAI2_BCLK

BOOT_MODE1BOOT_MODE0

SD1_CDPMIC_STBY_REQ7PMIC_ON_REQ7

I2C3_SCL 8

POR_B7

ENET2_nINT8

PMIC_nINT7

ON_OFF8

SPI3_CS0 8

BT_CFG2_6 4,8

LCD_DATA[23:0] 4,8

BT_nRST6

UART3_CTS 8

SAI2_SYNC 6

UART3_RXD 8UART3_RTS 8

I2C3_SDA 8

SPI3_SCLK 8

SPI3_MISO 8

SAI2_TX 6

SAI2_BCLK 6

SPI3_MOSI 8

BT_WAKE6

UART3_TXD 8

SAI2_RX 6

USB_HOST_OC8

GPIO_P42 8GPIO_P44 8

I2C2_SCL 8I2C2_SDA 8

BT_CFG2_5 4,8

GPIO5_76

LCD_VDD_EN 8

LCD_BLT_EN8

BOOT_MODE1 8BOOT_MODE0 8

SD1_CD 2,8

GPIO_P48_3V8

GPIO_P34 4

GND

GNDGNDGND

GND

VDD_HIGH_IN

GND

GND

VDD_SNVS_IN

GND

GND

DCDC_3V3

GNDGND

VDD_SNVS_3V3

VDD_SNVS_3V3

NVCC_UART

GN

D

GND

GND

VDD_HIGH_IN

GND

VDD_SNVS_3V3

VLDO_1V8VLDO_1V8

GND

GND

RN1 10K-RSS8P41 82 73 64 5

0402R312

0-R2-X

0201R308 1M-R1

i.MX6UL - CONTROL

VDD_SNVS_IN

NVCC_GPIO

VDDHIGH_CAP

NVCC_PLL

VDD_SNVS_CAP

VDDHIGH_IN

V11.19

NVCC_UART

U2B

PCIMX6G3CVM05AA

M14P14N16N15N14P15

T10U10

P8R8

P17

T11

N7

T17T16

U9T9

P16

U11

R10

R13

R9P11P10P9N8

N11N10N9R6

K14K16J14K15

J17J16H14J15

G16

H13

G14H15

F17G13

H17H16

G17

JTAG_TCKJTAG_TMSJTAG_TDI

JTAG_TDOJTAG_TRSTJTAG_MOD

BOOT_MODE0BOOT_MODE1

PORONOFF

CCM_CLK1_P

RTC_XTALI

TEST_MODE

XTALOXTALI

CCM_PMIC_STBY_REQSNVS_PMIC_ON_REQ

CCM_CLK1_N

RTC_XTALO

SNVS_TAMPER0

GPANAIO

SNVS_TAMPER1SNVS_TAMPER2SNVS_TAMPER3SNVS_TAMPER4SNVS_TAMPER5SNVS_TAMPER6SNVS_TAMPER7SNVS_TAMPER8SNVS_TAMPER9

UART1_TX_DATAUART1_RX_DATA

UART1_RTSUART1_CTS

UART2_TX_DATAUART2_RX_DATA

UART2_RTSUART2_CTS

UART4_RX_DATA

NVCC_UART

UART3_RTSUART3_CTS

UART5_TX_DATAUART5_RX_DATA

UART3_TX_DATAUART3_RX_DATA

UART4_TX_DATA

0402R281 0-R2

0201R56 1K-R1

0201R296 1M-R1

0402C80

18P

-C2

Y124MHZ-FSX3M-4S-X

1 3

24

0402R112 10K-R2

0402

R84

1K

-R2-X

OSC-24MHz-FCO-336B-4S

OSC2

4

2

1

3

VCC

GND

OE

CLK

0402R347 10K-R2-X

0201

18P

-CC

1

C77

0402R87 10K-R2-X

0201

R322

2.2K-R1

0201R305 1M-R1

0402

R68

2.2M-R2-X

0201

R324

2.2K-R1

0201

0.1

U/1

6V

/X5R

-CC

1

C75

0402R126 10K-R2

0201R309 1M-R1

02010.1U/16V/X5R-CC1

C176

0402 R288

10K-R2

0402R62 1M-R2-X

0201R311 1M-R1

0201

0.1

U/1

6V

/X5R

-CC

1-X

C76

0402R130 10K-R2

0402

R91

1K

-R2

RN3 10K-RSS8P41 82 73 64 5

U6

UM803RS

GV

R

GN

DV

CC

RESET

0402

R83

1K

-R2-X

0201R310 1M-R1

0402R64 499-1%-R2

0402 R316

0-R2

0402 R289

1M-R2

0201

18P

-CC

1

C78

0402R114 10K-R2

0402 R319

10K-R2-X

0402R128 10K-R2

0402R294 100K-R2-X

RN2 10K-RSS8P41 82 73 64 5

0402R66

0-R2-X

0201R54 1.5K-1%-R1

0201R303 1M-R1

0201

R323

2.2K-R1

0402R313

0-R2

0402 R306

1M-R2

0402R124 10K-R2

0402

R90

1K

-R2

0402R111 10K-R2

0402R280 0-R2

0201R314 1M-R1

0201

R325

2.2K-R1

RN4 10K-RSS8P4

1 82 73 64 5

0402

R92

1K

-R2-X

Y232.768KHZ-CM315-2S

1 2

0402R63 1K-1%-R2

0402C79

18P

-C2

0402R115 10K-R2

0201R293 10K-R1

0402R348 10K-R2-X

0201R61 10K-R1

0402

R85

1K

-R2-X

0402

R82

1K

-R2

0402

R89

1K

-R2-X

0402R99 10K-R2-X

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

WIFI+BT

50 Ohm

AP6212A: R333 OFF ,R327 ON ; Y4 26MHZ-FSX2S-4S

AP6335 : R333 ON ,R327 OFF ; Y4 37.4MHZ-FSX2S-4S

NOTE:

AP6212: R333 OFF ,R327 OFF ; Y4 26MHZ-FSX2S-4S

PICO-IMX6UL-EMMCA1

WLAN AP6335/6212A/6212

WANDBOARD.ORG

Custom

6 8Wednesday, November 30, 2016

Title

Size Document Number Rev

Date: Sheet of

UART_TXD

SD2_DATA1

WIFI_32K

SD2_DATA2

SD2_DATA0

UART_RXD

SD2_DATA3 UART5_RXDUART5_TXD

WL_HOST_WAKE UART5_CTS

BT_HOST_WAKE

UART_CTS_N

BT_WAKE

BT_nRST

XT

AL_IN

UART5_RTS

XT

AL_O

UT

WL_REG_ON

UART_RTS_N

SAI2_TX

SAI2_RXBT_PCM_CLKSAI2_BCLK

SAI2_SYNC

LPO_32K

XTAL_INA

XTAL_IN

XTAL_OUT

SD2_CLK

LPO_32K

SD2_CMD

WIFILED

WL_REG_ON

GPIO5_7

CLK

_R

EQ

SD

IO_V

SE

L

UART5_TXD 4UART5_CTS 4

UART5_RTS 4UART5_RXD 4

BT_nRST 5

SD2_CLK4

WL_HOST_WAKE4

SD2_DATA34SD2_DATA24

SD2_DATA04SD2_DATA14

WL_REG_ON4

SD2_CMD4

SAI2_TX5

SAI2_RX5SAI2_BCLK5

SAI2_SYNC5

BT_WAKE 5BT_HOST_WAKE 4

WL_REG_ON4

GPIO5_7 5

DCDC_3V3

DCDC_3V3

DCDC_3V3

GNDGND

GNDGND

GND

GND

GN

D

GN

D

GNDGND

GN

D

DCDC_3V3

DCDC_3V3

GND

GND

GND

DCDC_3V3

GNDGND

GND

GND

GN

D

0201R210 10K-R1

0201

R212100-R1

0201

R216

30K

-R1

OSC-32.768KAC-FCO-316A-4S/25X20

OSC1

4

2

1

3

VCC

GND

OE

CLK

GRN

LED1LED0603-G

CA

U15

AP6212

2

37

35

39

30

38

36

40

13

3 133

31

825

26

27

28

22

24

14

181716

19

15

9

12

34

4510

11

20

4243

41

44

32

67

21

29

23

454647W

L_B

T_A

NT

N_I2C_SCL

N_I2C_SDA

TX2

TC

XO

_IN

N_REG_PU

GND

TX1

WL_HOST_WAKE

GN

D

GN

DG

ND

GN

D

BT

_V

IO/N

_H

OS

T_W

AK

EP

CM

_O

UT

PC

M_C

LK

PC

M_IN

PC

M_S

YN

C

VDDIO

LP

O

SDIO_DATA_2

SDIO_DATA_0SDIO_DATA_CLKSDIO_DATA_CMD

SDIO_DATA_1

SDIO_DATA_3

VB

AT

WL_REG_ON

BT_RST_N

FM

_R

XN

_W

AK

E

XT

AL_IN

XT

AL_O

UT

GND

UART_TXDUART_RXD

UART_RTS_N

UART_CTS_N

GP

S_R

F

BT

_W

AK

EB

T_H

OS

T_W

AK

E

VIN_LDO_OUT

VD

D_T

CX

O

VIN

_LD

O

N_VDDSWPION_VDDSWP_OUT

N_VDDSWP_IN

0201R229 33-R1

0201R221 10-R1

L1SNR3015F-4R7M-T-PF

0201R211 560K-R1

0201R326 0-R1

0201

27P-CC1

C105

0201R219 10-R1

020110P-CC1-X

C104

ANT1MHF_20279

1

23

0201R328

680-R1

0201

R214

30K

-R1

0201

R217

30K

-R1

0201R327 0-R1-X

0402C107

4.7

U/1

0V

/X5R

-C2

0201

27P-CC1

C106

0201R333 0-R1-X

0402C102

4.7

U/1

0V

/X5R

-C2

0201R222 10-R1

0201R227 10-R1

0201

10P-CC1

C103

0402

C1084.7U/10V/X5R-C2

Y426MHZ-FSX2S-4S

1 3

24

0201

0.1

U/1

6V

/X5R

-CC

1

C110

020110P-CC1

C112

0201R220 10-R1

0201R218 10K-R1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PMIC

PICO-IMX6UL-EMMCA1

PMIC PFUZE3000

WANDBOARD.ORG

C

7 8Wednesday, November 30, 2016

Title

Size Document Number Rev

Date: Sheet of

PMIC_STANDBY

PMIC_nINT

nWDOG

I2C1_SCL

PMIC_STBY_REQ

POR_B

nRESET_BTN

PMIC_VHALF

PMIC_ON_REQ

I2C1_SDA

nWDOG4

I2C1_SDA4,8

nRESET_BTN8

PMIC_nINT5

I2C1_SCL4,8

POR_B5

PMIC_STBY_REQ5

PMIC_ON_REQ5

VDD_SNVS_3V3

GND

NVCC_LCDIF

GND

VDDA_ADC_3P3

DRAM_1V35

VDD_ARM_SOC_IN

GND

GND

GND

DCDC_3V3

GND

GND

NVCC_NAND

GND

GND

GND

VDD_SNVS_3V3

GND

SYS_4V4

GND

GND

VLDO_1V8

GND

VLPDDR2_1V8GND

VDD_SNVS_3V3

GND

VDD_HIGH_IN

DCDC_3V3

GND

SYS_4V4

GND

GND

VREFDDR

NVCC_SD

VDD_SNVS_3V3

GND

GND

GND

NVCC_ENET

GND

VDD_SNVS_3V3

VLDO2

GND

DCDC_3V3

DRAM_1V35

GND

GND

DCDC_3V3

VPERI_3V3

VPERI_3V3

VSYS

VDD_SNVS_3V3

VLDO_1V8NVCC_UARTNVCC_CSI

NVCC_GPIOGND

GND

GND

GND

SYS_4V4 VDD_SNVS_3V3

GND

NVCC_SD

0402

C122

1U

/10V

/X5R

-C2

Q3RYU002N05

G

SD

0201

470P

-CC

1

C121

0402C142 1U/10V/X5R-C2

0402R315 0-R2

0402C148 4.7U/10V/X5R-C2

0402C126 4.7U/10V/X5R-C2

0402C139

22U

/6.3

V/X

5R

-C2

0201R302 10K-R1

0603

22U

/10V

/X5R

-C3

C117

0201R258 100-R1

0402C158 1U/10V/X5R-C2

0201

0.1

U/1

6V

/X5R

-CC

1

C120

0201 0.1U/16V/X5R-CC1C154

0603

22U

/10V

/X5R

-C3

C113

0402C135

22U

/6.3

V/X

5R

-C2

0603R246 0.02-R3

0603R243 0.02-R3

0201R263

1M-R1

02010.1U/16V/X5R-CC1C157

0402R330 0-R2

0201

R248

1.5K-1%-R1

0402C115

4.7

U/1

0V

/X5R

-C2

D3

RB521S30T1G

AC

0201

R276

10K-R1

0402C144 1U/10V/X5R-C2

DCDC

LDO

U18

PC32PF3000A7EP

47

44

17

40

11

16

12

43

4846

42

8

10

45

7 6

9

45

39

13 14

38

36

37

35

33

34

32

30

31

29

2728

25

26

2221

41

18 19

20

15

1

2

3 23

2449

VD

DIO

VC

OR

ER

EF

SW2LX

GN

DR

EF

SW1BFB

VLDO2IN

GN

DR

EF

1

VC

OR

ED

IGPWRONSCL

VIN

SW1ALX

SW1BIN

STANDBYIC

TE

ST

SW1AIN SW1AFB

SW1BLX

SDA

VD

DO

TP

VLDO1IN VLDO1

VIN2

LICELL

SWBSTFB

SWBSTLX

VCC_SD

VSNVS

V33

LD

OG

VP

WR

SW3LX

SW3FBSW3IN

VREFDDR

GN

DR

EF

2

VLDO4VLDO34IN

VC

OR

E

SW2IN SW2FB

VLDO3

VLDO2

INT

SD_VSEL

RESETBMCU VHALF

VINREFDDRE

PA

D

0402C141

10U

/6.3

V/X

5R

-C2

0402C132

22U

/6.3

V/X

5R

-C2

L4 1.5UH/25201 2

0402R251 0-R2-X

0603R244 0.02-R3

0603R245 0.02-R3

0201

0.1

U/1

6V

/X5R

-CC

1

C160

02010.22U/6.3V/X5R-CC1C153

0402C138 4.7U/10V/X5R-C2

0402C152 4.7U/10V/X5R-C2

0402C146 4.7U/10V/X5R-C2

0402C140

22U

/6.3

V/X

5R

-C2

0603

22U

/10V

/X5R

-C3

C118

0201

R247

1.5K-1%-R1

0402C143 4.7U/10V/X5R-C2

0201 0.22U/6.3V/X5R-CC1C149

0201 R261

100K-R1

02010.2

2U

/6.3

V/X

5R

-CC

1C

123

0201

0.1

U/1

6V

/X5R

-CC

1C

125

0402

C124

1U

/10V

/X5R

-C2

0201

0.0

22U

/10V

/X5R

-CC

1

C175

0402C130 4.7U/10V/X5R-C2 0402

C133

10U

/6.3

V/X

5R

-C2

0201

R249

100K-R1

02010.1U/16V/X5R-CC1C156

0402C136

22U

/6.3

V/X

5R

-C2

0402R262 0-R2

0402R318 0-R2-X

0402C150 4.7U/10V/X5R-C2

0402C128

22U

/6.3

V/X

5R

-C2

0201

0.1U/16V/X5R-CC1

C161

0201 R259

100K-R1

0201

0.1

U/1

6V

/X5R

-CC

1C163

0402C131

22U

/6.3

V/X

5R

-C2

0201

0.1

U/1

6V

/X5R

-CC

1

C165

02010.22U/6.3V/X5R-CC1C155

0402C151 4.7U/10V/X5R-C2

0402C145 4.7U/10V/X5R-C2

U20

RT9193-33GB

2

51

34

GND

VOUTVIN

ENBP

0402C147 1U/10V/X5R-C2

0201

1000P

-CC

1

C159

Q2

FDMA908PZ

1234 5 6

7

8

0402C129

10U

/6.3

V/X

5R

-C2

0402C119

4.7

U/1

0V

/X5R

-C2

0603

10U

/16V

/X5R

-C3

C162

0201

0.1

U/1

6V

/X5R

-CC

1

C1160603

22U

/10V

/X5R

-C3

C114

D4

RB521S30T1G

AC

L2 1.5UH/25201 2

0201R255 10K-R1

0201

R257100K-R1

0402C164

4.7

U/1

0V

/X5R

-C2

0402C137

10U

/6.3

V/X

5R

-C2

0402C134 4.7U/10V/X5R-C2

0201R242 0-R1

L5 1.5UH/25201 2

0402C127

22U

/6.3

V/X

5R

-C2L3 1.5UH/25201 2

UM805RE

U19

1

23

4GND

RE

SE

TM

R

VCC

0402R273 0-R2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Board to Board

J3pin3 J3pin5

BMODE[0:1]

IMX6UL BOOT TYPE

Internal Boot

Serial DownloaderLOWHi

HiLOW

BOOT TYPE

PICO-IMX6UL-EMMCA1

Board to Board

WANDBOARD.ORG

C

8 8Wednesday, November 30, 2016

Title

Size Document Number Rev

Date: Sheet of

LCD_DATA21

LCD_DATA0

SPI3_MISO

LCD_DATA20

LCD_DATA1

UART3_RXD

LCD_VSYNC

LCD_DATA18

ENET2_TX_CLK

USB_OTG_ID

UART6_TXD

UART3_RTS

GPIO_P24

UART3_TXD

LCD_DATA19

I2C2_SDA

LCD_DE

ENET2_TXD0

GPIO_P28

ENET2_TXD1

LCD_DATA16

LCD_BLT_EN

ON_OFF

GPIO_P44

ENET2_CRS_DV

LCD_HSYNC

UART3_CTS

LCD_DATA17

ENET2_TXEN

SPI3_CS0SAI1_SYNC

GPIO_P30

LCD_PCLK

SAI1_TX

LCD_VDD_ENLCD_BLT_CTRL

GPIO_P25

LCD_DATA14

LCD_DATA2

LCD_DATA12

SAI1_RX

GPIO_P42

ENET_MDC

GPIO_P48I2C3_SCL

GPIO_P34

SAI1_BCLK

USB_OTG_DPUSB_OTG_DN

ENET2_nRST

LCD_DATA15

GPIO_P32

LCD_DATA13

nRESETOUT

USB_OTG_PWR

I2C3_SDA

ENET2_RXD1

GPIO_P26

LCD_DATA11

ENET2_RXD0

LCD_DATA10

CAN2_TX

I2C2_SCL

LCD_DATA9LCD_DATA8

LCD_DATA23

LCD_DATA6

CAN2_RX

LCD_DATA7

LCD_DATA22

LCD_DATA5

CAN1_TX

LCD_DATA3LCD_DATA4

CAN1_RX

ENET2_REF_CLK

UART6_RXDUSB_OTG_VBUS

SPI3_MOSISPI3_SCLK

I2C1_SCLI2C1_SDA

USB_HOST_DPUSB_HOST_VBUS

USB_HOST_DN

USB_HOST_OC

ENET_MDIO

ENET2_nINT

PWM7_1V8

FAULT

GPIO_P48_3VGPIO_P48PWM7_3VPWM7_1V8

nRESETOUT nRESET_BTN

PWM8_1V8

PWM8_1V8

PWM8_3V

BOOT_MODE0BOOT_MODE1BT_CFG2_5BT_CFG2_6

SD1_CD

USB_OTG_ID 4

I2C2_SCL 5

SPI3_SCLK 5

ENET_MDC4

SPI3_MOSI 5

ON_OFF 5

UART3_CTS 5

I2C3_SDA 5I2C3_SCL 5

SPI3_MISO 5

UART6_TXD 4

ENET2_CRS_DV4

UART3_TXD5

SPI3_CS0 5

UART3_RTS 5

USB_OTG_DP4

UART3_RXD 5

I2C2_SDA 5

USB_OTG_DN4

ENET2_REF_CLK4

I2C1_SDA4,7I2C1_SCL4,7

USB_HOST_DP 4USB_HOST_DN 4

CAN1_TX4

CAN2_TX4

CAN1_RX4

CAN2_RX4

LCD_DATA21 4,5

LCD_DATA11 4,5

LCD_DATA5 4,5

LCD_DATA20 4,5LCD_DATA19 4,5

LCD_DATA1 4,5

LCD_DATA17 4,5LCD_DATA18 4,5

LCD_DATA12 4,5

LCD_DATA15 4,5

LCD_DATA9 4,5

LCD_DATA16 4,5

LCD_DATA10 4,5

LCD_DATA7 4,5LCD_DATA8 4,5

LCD_DATA3 4,5LCD_DATA4 4,5

LCD_DATA2 4,5

LCD_DATA6 4,5

LCD_DATA22 4,5

LCD_DATA14 4,5

LCD_DATA0 4,5

LCD_DATA13 4,5

LCD_DATA23 4,5

LCD_HSYNC 4LCD_BLT_EN 5

LCD_DE 4LCD_VSYNC 4LCD_PCLK 4

LCD_VDD_EN 5LCD_BLT_CTRL 4

ENET2_TXD14ENET2_TXD04

ENET2_RXD04ENET2_RXD14

ENET2_TX_CLK4

ENET2_TXEN4

ENET2_nRST4

ENET2_nINT5

SAI1_BCLK4

SAI1_TX4SAI1_SYNC4

SAI1_RX4

UART6_RXD4 USB_OTG_PWR 4

GPIO_P25 4

USB_HOST_OC 5

FAULT 4

nRESET_BTN 7PWM7_3V 4

PWM8_3V 4

BOOT_MODE05

BT_CFG2_64,5BT_CFG2_54,5

BOOT_MODE15

SD1_CD 2,5

ENET_MDIO4

GPIO_P244GPIO_P264GPIO_P284GPIO_P304GPIO_P324GPIO_P345

GPIO_P425GPIO_P445

GPIO_P48_3V 5

VSYSVLDO_1V8

GND

GND GNDGNDGND

USB_OTG_VBUS

VPERI_3V3

USB_HOST_VBUS

VLDO_1V8 VDD_SNVS_3V3

GN

D

GN

D

GND

0201R336 150-R1

02010.1U/16V/X5R-CC1C169

U21

TXS0104ERGYR

12345

78

1011121314

6 9

15

VCCAA1A2A3A4

GNDOE

B4B3B2B1

VCCB

NC NC

GND

0201R356 0-R1-X

0201R337 150-R1

MTG

J3

DF40C-70DP-0.4V(51)

214368

5

107

1214

9

16

11

18

13

22

15

2426

17

28

19

3032

21

34

23

3638

25

40

27293133353739

20

4244

41434547495153555759

4648505254565860

6163656769

6264666870

MTG

J1

DF40C-70DP-0.4V(51)

2 14 368

5

107

1214

9

16

11

18

13

22

15

2426

17

28

19

3032

21

34

23

3638

25

40

27293133353739

20

4244

41434547495153555759

4648505254565860

6163656769

6264666870

0201R334 150-R1

MTG

J2

DF40C-70DP-0.4V(51)

214368

5

107

1214

9

16

11

18

13

22

15

2426

17

28

19

3032

21

34

23

3638

25

40

27293133353739

20

4244

41434547495153555759

4648505254565860

6163656769

6264666870

0201R301 10-R1-X

0201R335 150-R1

0201

0.1U/16V/X5R-CC1 C170

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

P01 Index

TITLEPAGE

P04 DC-DC & M-SD

L=6, 100 x 45 mm

P05 Audio & HEADER

P02 Expansion CONN.

P06 RMII / RGMII

HOBBIT6UL-BB REV:A1

GND

PCB

P07 HOST & Client USB

P03 IO LEVEL SHIFT

Components marked -X meansnot populated. (DNP)

WANDBOARD DESIGN AND DISCLAIMER

THERE IS NO WARRANTY FOR THE DESIGN MATERIALS, TO THE EXTENTPERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED INWRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDETHE DESIGN MATERIALS "AS IS" WITHOUT WARRANTY OF ANY KIND,EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR APARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY ANDPERFORMANCE OF THE DESIGN MATERIALS IS WITH YOU. SHOULD THEDESIGN MATERIALS PROVE DEFECTIVE, YOU ASSUME THE COST OF ALLNECESSARY SERVICING, REPAIR OR CORRECTION.

HOBBIT6UL-BB A1

INDEXWANDBOARD.ORG

Custom

1 7Monday, March 14, 2016

Title

Size Document Number Rev

Date: Sheet of

FM11FM40S-X

FM8FM40S-X

FM4FM40S-X

HOLE2

HOLE-X-6P-X

HOLE8

HOLE-X-6P-X

FM12FM40S-X

HOLE3

HOLE-X

HOLE4

NUT-50M30-501419D4BM-X

FM1FM40S-X

FM3FM40S-X

FM6FM40S-X

HOLE1

HOLE-X

HOLE6

NUT-50M30-501419D4BM-X

FM5FM40S-X

FM7FM40S-X

HOLE5

NUT-50M30-501419D4BM-X

FM2FM40S-X

FM10FM40S-X

PCBPCB06TN93RA1PCB1

HOLE7

HOLE-X

FM9FM40S-X

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Board to Board

HOBBIT6UL-BBA1

Expansion CONN.WANDBOARD.ORG

Custom

2 7Monday, March 14, 2016

Title

Size Document Number Rev

Date: Sheet of

GPIO_P48_1V8

I2C1_SCL_1V8

SD1_D3_1V8

AUD3_TXFS_1V8

SD3_CLK_FB

PSW

AUD3_TXC_1V8

UART1_RX_1V8

I2C1_SDA_1V8I2C3_SCL_1V8

UART1_TX_1V8

CSPI2_CS2_1V8CSPI2_CS1_1V8

CSPI2_SCLK_1V8

I2C3_SDA_1V8

FAULT

CSPI2_MOSI_1V8

PWM2_1V8

UART3_TX_1V8

CSPI2_MISO_1V8

OSC_CLK_OUT_0

PWM3_1V8

UART3_RX_1V8UART3_RTS_1V8

SD1_CLK_1V8

UART3_CTS_1V8

PWM4_1V8

SD1_CD_1V8

USB_OTG_ID

USB_OTG_DP

GPIO_P24_1V8

USB_OTG_DN

GPIO_P26_1V8

USB_OTG_VBUS

SD1_D2_1V8

nRESET

V_VBAT_BKUP

SD1_D1_1V8

SD1_D0_1V8

GPIO_P25_1V8GPIO_P28_1V8GPIO_P30_1V8GPIO_P32_1V8GPIO_P34_1V8

GPIO_P42_1V8

AUD3_TXD_1V8

AUD3_RXD_1V8

MSIC_SLPCLK_2

FW_RCVR

RCVR_MODE

GPI_PWRBTN_N

CSI_D0M

CAN2_TX

USB_H1_OC

I2C2_SDA

HDMI_D2M

PCIEA_CLKP

CAN2_RX

I2C2_SCL

CSI_D1M

DSI_D1M

CSI_D2P

CSI_D0P

USB_HOST_DP

HDMI_D1M

HDMI1_HPD

CSI_D1P

GPIO3_CLKO

HDMI_CLKM

GPIO_6

CSI_D3M

HDMI_D0P

SATA1_RXP

HDMI1_CEC

PCIEA_RXN

DSI_CLK0P

CSI_CLK0P

PCIEA_TXN

USB_HOST_DN

CAN1_RX

USB_H1_VBUS

SATA1_TXP

HDMI_D0M

HDMI_CLKP

CSI_CLK0M

DSI_D1P

SATA1_TXN

DSI_D0M

CSI_D3P

PCIEA_RXP

DSI_CLK0M

HDMI_D1P

PCIEA_TXP

GPIO_8

CSI_D2M

DSI_D0P

SATA1_RXN

CAN1_TX

PCIEA_CLKN

PWM1_1V8

RMII_nRST

RMII_TXD1

RMII_TXCLK

RMII_MDIO

RMII_TXD3

RMII_INTRMII_REF_CLK

RMII_MDC

RMII_RXDVRMII_TXEN

RMII_RXD2

RMII_RXCLK

RMII_TXD0

RMII_TXD2

DISP0_DAT9

DISP0_DAT17

DISP0_DAT7

DISP0_DAT18

LVDS0_BLT_EN

DISP0_DAT14

DISP0_DAT8

DISP0_DAT6DISP0_DAT5

DISP0_DAT3

DISP0_BLT_CTRL

DISP0_DAT21

DISP0_DAT0

DISP0_DAT15

DISP0_DAT19

DISP0_DAT1

DISP0_VSYNC

DISP0_HSYNC

DISP0_DAT4

DISP0_DAT13

DISP0_VDD_EN

DISP0_DE

DISP0_CLK

LVDS0_BKL_CTRL

DISP0_DAT2

DISP0_BLT_EN

DISP0_DAT16

DISP0_DAT10DISP0_DAT11

DISP0_DAT23

DISP0_DAT12

DISP0_DAT20

DISP0_DAT22EIM_DA5

EIM_DA14EIM_DA12

EIM_DA13

HDMI_D2P

RMII_RXD0RMII_RXD1

RMII_RXD3

LVDS0_CLK_P

LVDS0_TX0_N

LVDS0_CLK_N

LVDS0_TX1_P

LVDS0_TX2_P

LVDS0_TX1_N

LVDS0_TX3_N

LVDS0_TX2_N

LVDS0_TX3_P

LVDS0_TX0_P

SD1_CMD_1V8

AUD3_RXD_1V85

SD1_D3_1V84

I2C1_SDA_1V8 3,5

AUD3_TXD_1V85

SD1_D2_1V84

AUD3_TXFS_1V85

USB_OTG_DP7USB_OTG_DN7

USB_OTG_VBUS7

SD1_D0_1V84

AUD3_TXC_1V85

PSW 7

SD1_D1_1V84

nRESET4,7

UART1_RX_1V83

I2C3_SDA_1V8 3,5

CSI_D2M7

I2C2_SDA3,4,7

CSI_D0M7

DSI_D1P7

DSI_CLK0M7

DSI_D0P7

USB_HOST_DP 7

CSI_D1P7

USB_HOST_DN 7

CSI_CLK0P7

USB_H1_OC 7

DSI_CLK0P7

CSI_D0P7

CSI_D2P7

CSI_CLK0M7

CSI_D3P7CSI_D3M7

CSI_D1M7

DSI_D0M7

DSI_D1M7

RMII_REF_CLK6

RMII_RXDV6

DISP0_BLT_EN 3

LVDS0_BLT_CTRL 3

DISP0_DAT22 3

DISP0_DAT7 3

DISP0_HSYNC 3

DISP0_CLK 3DISP0_VSYNC 3

DISP0_DAT8 3

DISP0_DAT0 3

DISP0_DAT4 3

DISP0_DAT16 3

DISP0_DAT13 3

DISP0_DAT21 3

DISP0_DAT14 3

LVDS0_BLT_EN 3

DISP0_DAT17 3

DISP0_DAT23 3

DISP0_DAT2 3

DISP0_VDD_EN 3

DISP0_DAT19 3

DISP0_DAT1 3

DISP0_DAT6 3

DISP0_DAT3 3

DISP0_DAT9 3

DISP0_DE 3

DISP0_DAT11 3

DISP0_DAT5 3

DISP0_DAT20 3

DISP0_BLT_CTRL 3

DISP0_DAT15 3

DISP0_DAT18 3

DISP0_DAT12 3

PWM1_1V8 3

DISP0_DAT10 3RMII_MDC6RMII_MDIO6

RMII_nRST6RMII_INT6

RMII_TXEN6

RMII_TXCLK6RMII_TXD06RMII_TXD16RMII_TXD26RMII_TXD36

RMII_RXCLK6RMII_RXD06RMII_RXD16RMII_RXD26RMII_RXD36

LVDS0_TX3_P3

LVDS0_CLK_P3

LVDS0_TX0_N3

LVDS0_TX3_N3

LVDS0_TX1_P3

LVDS0_CLK_N3

LVDS0_TX1_N3

LVDS0_TX0_P3

LVDS0_TX2_P3LVDS0_TX2_N3

EIM_DA125EIM_DA145EIM_DA135EIM_DA55

I2C2_SCL3,4,7

GPIO_87GPIO_67GPIO3_CLKO7

GPIO_P30_1V83GPIO_P28_1V83

GPIO_P34_1V83

GPIO_P26_1V83

GPIO_P32_1V83

GPIO_P24_1V83

USB_OTG_ID 7

FAULT 7

GPIO_P25_1V8 3UART1_TX_1V8 3

I2C1_SCL_1V8 3,5

I2C3_SCL_1V8 3,5

CSPI2_CS1_1V8 3CSPI2_CS2_1V8 3CSPI2_SCLK_1V8 3

CSPI2_MISO_1V8 3CSPI2_MOSI_1V8 3

UART3_RX_1V8 3

GPIO_P42_1V83SD3_CLK_FB4

UART3_TX_1V83GPIO_P48_1V83

SD1_CD_1V84SD1_CLK_1V84

SD1_CMD_1V84

1P8V3P3V

V_SYS

V_SYS

USB_VBUS

TP23

TP30

TP3

TP24

TP8

TP29

TP2

TP11

TP19

TP5

TP1

TP36

TP12

TP9

TP22

MTG

J7

DF40HC(3.0)-70DS-0.4V(51)

2 14 368

5

107

1214

9

16

11

18

13

22

15

2426

17

28

19

3032

21

34

23

3638

25

40

27293133353739

20

4244

41434547495153555759

4648505254565860

6163656769

6264666870

TP15

TP10

TP21

TP20

TP16

MTG

J3

DF40HC(3.0)-70DS-0.4V(51)A

214368

5

107

1214

9

16

11

18

13

22

15

2426

17

28

19

3032

21

34

23

3638

25

40

27293133353739

20

4244

41434547495153555759

4648505254565860

6163656769

6264666870

TP33

TP28

TP7

TP27

0402R165 10K-R2-X

TP13

TP34

MTG

J6

DF40HC(3.0)-70DS-0.4V(51)

214368

5

107

1214

9

16

11

18

13

22

15

2426

17

28

19

3032

21

34

23

3638

25

40

27293133353739

20

4244

41434547495153555759

4648505254565860

6163656769

6264666870

TP6

TP4

TP14

TP18

TP40

TP25

TP17

TP26

TP32

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

I/O LEVEL SHIFT

Expansion headers

HOBBIT6UL-BBA1

IO LEVEL SHIFTWANDBOARD.ORG

Custom

3 7Monday, March 14, 2016

Title

Size Document Number Rev

Date: Sheet of

I2C3_SCL_1V8 I2C3_SCL_A1

I2C1_SDA_1V8

I2C3_SDA_3V

I2C1_SDA_3VI2C1_SDA_A2I2C1_SCL_1V8

I2C3_SDA_1V8

I2C1_SCL_A1

I2C3_SCL_3V

I2C1_SCL_3V

I2C3_SDA_A2

DISP0_BLT_EN

DISP0_DAT3

CSPI2_SCLK_3V

LVDS0_CLK_NLVDS0_TX1_P

I2C2_SCL

DISP0_DAT12 LVDS0_TX0_P

GPIO_P48_3V

CSPI2_MOSI_3V

DISP0_DAT20

DISP0_DAT17 LVDS0_TX3_N

CSPI2_MISO_3V

DISP0_DAT7

GPIO_P24_3V

DISP0_DAT1

DISP0_DAT13

DISP0_DAT9

DISP0_DAT14DISP0_DAT15

DISP0_DAT21

LVDS0_CLK_PDISP0_DAT5

GPIO_P25_3V

DISP0_DAT23

DISP0_DAT10

I2C1_SCL_3V

DISP0_DAT8DISP0_DAT19

LVDS0_TX2_P

GPIO_P28_3V

DISP0_CLK

LVDS0_TX3_P

DISP0_DAT0

DISP0_DAT2

GPIO_P34_3VCSPI2_CS1_3V

DISP0_VDD_EN

LVDS0_TX2_N

DISP0_DAT11

DISP0_VSYNC

GPIO_P30_3V

DISP0_DE

DISP0_DAT4

DISP0_DAT6

CSPI2_CS2_3V

GPIO_P32_3V

DISP0_HSYNC

DISP0_DAT16

I2C3_SCL_3V

GPIO_P26_3V

LVDS0_BLT_CTRL

LVDS0_TX0_N

I2C1_SDA_3V

I2C2_SDA

DISP0_BLT_CTRL

LVDS0_BLT_EN

DISP0_DAT18

LVDS0_TX1_N

DISP0_DAT22

LVDS0_VDD_EN

I2C3_SDA_3V

UART1_RX_1V8UART1_TX_1V8

UART1_RX_3VUART1_TX_3V

UART3_TX_1V8UART3_RX_1V8 UART3_RX_3V

UART3_TX_3V

GPIO_P28_3VGPIO_P26_3V

GPIO_P30_1V8 GPIO_P30_3V

GPIO_P34_3VGPIO_P34_1V8GPIO_P42_1V8GPIO_P48_1V8 GPIO_P48_3V

GPIO_P24_3VGPIO_P24_1V8

GPIO_P32_3VGPIO_P32_1V8

CSPI2_MISO_3VCSPI2_MISO_1V8CSPI2_MOSI_3VCSPI2_MOSI_1V8

CSPI2_CS2_3VCSPI2_SCLK_3V

CSPI2_CS2_1V8CSPI2_SCLK_1V8

PWM1_1V8 PWM1_3V3

GPIO_P26_1V8GPIO_P28_1V8

CSPI2_CS1_3VCSPI2_CS1_1V8GPIO_P25_3VGPIO_P25_1V8

GPIO_P34_3V

GPIO_P42_3V

I2C1_SCL_1V82,5

I2C3_SDA_1V82,5I2C3_SCL_3V 4,7

I2C3_SDA_3V 4,7I2C3_SCL_1V82,5

I2C1_SDA_1V82,5I2C1_SCL_3V 4,7

I2C1_SDA_3V 4,7

DISP0_VSYNC 2

DISP0_DAT12 2

DISP0_DAT23 2

DISP0_DAT11 2

LVDS0_BLT_CTRL 2

DISP0_BLT_CTRL 2

DISP0_BLT_EN2

LVDS0_CLK_P 2DISP0_DAT14 2DISP0_DAT13 2

DISP0_DAT72

DISP0_DAT20 2

DISP0_DE 2

DISP0_VDD_EN2

DISP0_DAT10 2

DISP0_DAT17 2

DISP0_DAT22

DISP0_DAT21 2

DISP0_DAT19 2

DISP0_DAT52

DISP0_DAT22 2

DISP0_DAT62

DISP0_DAT12

I2C2_SCL2,4,7

DISP0_DAT16 2

LVDS0_CLK_N 2DISP0_DAT32

DISP0_DAT92

DISP0_HSYNC 2

DISP0_DAT82

DISP0_CLK 2

DISP0_DAT15 2

DISP0_DAT18 2

LVDS0_BLT_EN 2

I2C2_SDA2,4,7

DISP0_DAT02

DISP0_DAT42

UART1_RX_1V82

UART1_TX_1V82 UART1_TX_3V 5,7UART1_RX_3V 5,7

UART3_TX_1V82UART3_RX_1V82

UART3_TX_3V 7

UART3_RX_3V 7

CSPI2_MISO_3V 7CSPI2_MISO_1V82CSPI2_MOSI_3V 7CSPI2_MOSI_1V82CSPI2_SCLK_3V 7CSPI2_CS2_3V 7CSPI2_CS2_1V82

CSPI2_SCLK_1V82

PWM1_1V82 PWM1_3V3 7

CSPI2_CS1_3V 7CSPI2_CS1_1V82

GPIO_P24_1V82GPIO_P48_1V82GPIO_P42_1V82

GPIO_P30_1V82

GPIO_P34_1V82GPIO_P32_1V82

GPIO_P28_1V82GPIO_P26_1V82

GPIO_P42_3V 6

GPIO_P25_1V82 GPIO_P25_3V 7

LVDS0_TX3_P2LVDS0_TX3_N2LVDS0_TX2_P2

LVDS0_TX1_P2

LVDS0_TX0_P2

LVDS0_TX2_N2

LVDS0_TX1_N2

LVDS0_TX0_N2

+3.3V1P8V

+3.3V1P8V

+3.3V1P8V

+3.3V1P8V

+3.3V1P8V

+3.3V

+3.3V

5V_SYS

+3.3V

+3.3V 5V_SYS

+3.3V

U13

TXS0102DCUR

5 83 7

6 24 1

A1 B1VCCA VCCB

OE GNDA2 B2

0402

C650.1U/16V/X7R-C2

0402C41 0.1U/16V/X7R-C2

0402

C480.1U/16V/X7R-C2

U10

TXS0108ERGYR

1 202 19

10 11

3 18456789

171615141312

21

A1 B1VCCA VCCB

OE GND

A2 B2A3A4A5A6A7A8

B3B4B5B6B7B8

GND0402C55 0.1U/16V/X7R-C2

0402C40 0.1U/16V/X7R-C2

0402R125 10-R2

JP2

FH127-10X2-H4.3

1 23 45 67 89 10

11 1213 1415 1617 1819 20

JP3

FH127-10X2-H4.3

1 23 45 67 89 10

11 1213 1415 1617 1819 20

0402

C380.1U/16V/X7R-C2

0402

C390.1U/16V/X7R-C2

0402R109 10-R2

0402C56 0.1U/16V/X7R-C2

U9

TXS0108ERGYR

1 202 19

10 11

3 18456789

171615141312

21

A1 B1VCCA VCCB

OE GND

A2 B2A3A4A5A6A7A8

B3B4B5B6B7B8

GND

0402R126 10-R2

U18

TXS0104ERGYR

12345

78

1011121314

6 9

15

VCCAA1A2A3A4

GNDOE

B4B3B2B1

VCCB

NC NC

GND

0402R244 100K-R2

0402R110 10-R2

0402R1 10K-R2-X

0402R14 10K-R2

0402C49 0.1U/16V/X7R-C2

0402

C530.1U/16V/X7R-C2

JP1

FH127-10X2-H4.3

1 23 45 67 89 10

11 1213 1415 1617 1819 20

JP4

FH127-10X2-H4.3

1 23 45 67 89 10

11 1213 1415 1617 1819 20

U7

TXS0102DCUR

5 83 7

6 24 1

A1 B1VCCA VCCB

OE GNDA2 B2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Micro-SD

DC-DC

BUTTON

LED

LEDforPWR

LEDforGPIO

ADC

Take out

HOBBIT6UL-BB A1

DC-DC& M-SDWANDBOARD.ORG

Custom

4 7Monday, March 14, 2016

Title

Size Document Number Rev

Date: Sheet of

SD1_CLKSD1_CLK_1V8_R

SD1_D2_1V8_RSD1_D3_1V8_RSD1_CMD_1V8_R

SD1_D0_1V8_RSD1_D1_1V8_RSD1_CD_1V8_R

nRESET

SD3_CLK_FB

ADC_VIN

I2C1_SCL_3V

I2C1_SDA_3VI2C3_SDA_3V

ADC_3V

I2CX_SDA_ADC

I2CX_SCL_ADC I2C3_SCL_3V

ADC_3V

ADC_VIN

nRESET

I2C2_SCL

I2C2_SDA

SD1_D1

SD1_CD

SD1_D3

SD1_CMD

SD1_CLK_1V8

SD1_D2_1V8SD1_D3_1V8SD1_CMD_1V8

SD1_D0_1V8SD1_D1_1V8SD1_CD_1V8

SD1_D2

SD1_CD

SD1_D0

SD1_CLK

SD1_D2SD1_D3SD1_CMD

SD1_D2_1V8_R

SD1_D3_1V8_R

SD1_D2

SD1_D3SD1_CMD_1V8_RSD1_CLK_1V8_R

SD1_CMDSD1_CLK

SD1_D1SD1_D0

SD1_D1_1V8_RSD1_D0_1V8_R SD1_D0

SD1_D1SD1_CD_1V8_R SD1_CD

SD3_CLK_FB2

I2C1_SCL_3V 3,7I2C3_SCL_3V 3,7

I2C3_SDA_3V 3,7

ADC_VIN7

I2C1_SDA_3V 3,7

nRESET 2,7

I2C2_SCL 2,3,7

I2C2_SDA 2,3,7

SD1_CLK_1V82SD1_CMD_1V82

SD1_CD_1V82

SD1_D3_1V82

SD1_D1_1V82

SD1_D2_1V82

SD1_D0_1V82

+3.3V+3.3V

5V_SYS V_SYS

3P3V +3.3V

5V_SYS LDO_3V3

1P8V

V_SYS

V_SYS

1P8V

+3.3V

1P8V +3.3V

U8 AOZ1021AI

12

8

4

7

5

63

PG

AN

VINLX

FB

LX

COMP

ENA

GN

D

Q1BSS138W

D

G

S

0402R188 0-R2

0603

10U

/16V

/X5R

-C3

C52

0402

C750.1U/16V/X7R-C2

BEAD

0603

FB431/3A-L3

0402

R184

10K

-R2

0402

R770-R2

U20

RCLAMP0524P-X

12345 6

7

910

IN1IN2GND1IN3IN4 OUT4

OUT3

OUT2OUT1

0402

C770.1U/16V/X7R-C2

0402

R186

10K

-R2

D2

DL4733A

AC

0402R192 0-R2

0402R97 10-R2-X

0402

R5710K-1%-R2

GRN

LED1LED0603-G

CA

0402

C761U/16V/X5R-C2-X

0402

R179

10K

-R2

1206

22U

/25V

/X5R

-C6

C1

0402R172 0-R2-X

BEAD

0603

FB231/3A-L3-X

0402R195 0-R2-X

0402R181 0-R2

U12

adc081c027

1

2

3 4

5

6VA

GND

VIN ADDR

SCL

SDA

0402

R84

10K-1%-R2

0402

R191

10K

-R2

0402R113 10-R2-X

0402

R5610K-1%-R2

0402R183 0-R2

0402R185 0-R2-X

0402R96 10-R2-X

0402

R206

10K

-R2

0402C57 470P-C2

0402

C59

0.1U/16V/X7R-C2

0402

R196

10K

-R2

0402

C44

0.1

U/1

6V

/X7R

-C2

0402

R11820K-R2

0402R92 10-R2

0402R180 0-R2-X

0603

0.1

U/2

5V

/X7R

-C3

C36

0402R115 4.7K-R2-X

BEAD

0603

FB631/3A-L3

1206

22U

/16V

/X5R

-C6

C35

Q2BSS138W

D

G

S

BEAD

0603

FB5 150/2A-L3

0603

0.1

U/2

5V

/X7R

-C3

C37

0402R93 10-R2

0402R187 0-R2-X

U22

RCLAMP0524P-X

12345 6

7

910

IN1IN2GND1IN3IN4 OUT4

OUT3

OUT2OUT1

0402

R189

10K

-R2

0402

R65576-1%-R2

1206

22U

/16V

/X5R

-C6

C47

0402

C45

1000P-C2

0402

C70

0.1U/16V/X7R-C2

0402R170 0-R2

U21

TXS0108ERGYR-X

1 202 19

10 11

3 18456789

171615141312

21

A1 B1VCCA VCCB

OE GND

A2 B2A3A4A5A6A7A8

B3B4B5B6B7B8

GND

D7

PG

B0010603M

R-X

0402R190 0-R2-X

0402

R64576-1%-R2

RESET1

SW-MPTCFGP2-V

0402R200 0-R2

L5 WSRPG0603/4.7UH

0402R107 10-R2-X

GRN

LED2LED0603-G

CA

MWDS-216B-BK

DCIN1

231

231

0402R197 0-R2

0402R199 0-R2-XuSDCARD-H1.85-XMSD1

4

2

12

9

65

87

3

113

1011

VDD

CD/DATA3

GN

D

CD

VSSCLK

DATA1DATA0

CMD

DATA2G

NDGND

GND

0402

R94

31.6K-1%-R2

0402R105 4.7K-R2-X

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AUDIO

1.5V

BOOT HEADERCONSOLE

P

G

R

T

MODE0 MODE1

2-3

2-3

IMX6UL BOOT TypeJumper Settings

BMODE[0:1]

Serial Downloader (USB C)

1-2

Internal Boot (eMMC)

1-2

J1 J4

J1

J1

J4

J4

HOBBIT6UL-BBA1

Audio & HEADER

WANDBOARD.ORG

Custom

5 7Monday, March 14, 2016

Title

Size Document Number Rev

Date: Sheet of

MIC_BIAS

LINEOUT_LT2_AUXR

VD

DD

HP_R

AUDIO_VAG

SYS_MCLK

AUDIO_VDDA

AUDIO_CPFILT

I2S_LRCLK0

MIC_IN

I2S_DIN0

T2_AUXL LINEOUT_R

HP_L

HSOL

MICBIAS

MIC_MAIN_P0MIC_M

MIC_M

MIC_MAIN_P

HSOR

MIC_MAIN_M

HP_L

HP_R

AUDIO_OUT_L

AUDIO_OUT_R

V1_8D_EN

MICBIAS

CTRL_DATA

CTRL_CLK

I2S_DOUT0

I2S_SCLK0

HP_VGND

V1_8D_EN

MIC_M

AUD3_TXD_1V8

AUDIO_CLK_24M

AUD3_TXFS_1V8

AUD3_TXC_1V8

I2C1_SDA_1V8

I2C3_SCL_1V8

I2C3_SDA_1V8

AUD3_RXD_1V8

I2C1_SCL_1V8

AUDIO_CLK_24M

UART1_TX_3V

UART1_RX_3V

MIC_M0_2

MIC_P0_1

MIC_MAIN_M0HSOR

MIC_P0_1

HSOL

MIC_M0_2

EIM_DA5EIM_DA14

MIC_P0_1

HSOR

MIC_P0_1MIC_M0_2

MIC_M0_2

HSOL

EIM_DA12 EIM_DA13

I2C3_SDA_1V82,3I2C1_SDA_1V82,3

I2C3_SCL_1V82,3I2C1_SCL_1V82,3

UART1_TX_3V3,7

UART1_RX_3V3,7

AUD3_RXD_1V82

AUD3_TXC_1V82

AUD3_TXFS_1V82

AUD3_TXD_1V82

EIM_DA5 2EIM_DA14 2

EIM_DA12 2 EIM_DA13 2

2P5V1P8V

MIC_G

MIC_G

AGNDM

AGNDM

AGNDM AGNDM

AGNDM

AGNDMAGNDM

AGNDM

+3.3V 2P5V

AGNDM

AGNDM

+3.3V

VDD

VDD

1P8V

+3.3V

AGNDM

1P8V1P8V

1P8V 1P8V

0402

C78 47P

-C2

0402

C3447P-C2

0402R9 0-R2

0402R33 0-R2

J4

PH200-3X1

123

0402

C3

0.1U/16V/X7R-C2

0603R30 0-R3-X

J1(1-2)1JUMPER200

0402R4 150-R2

0402

C32220P-C2

TP43

0402

C23

1U

/16V

/X5R

-C2

0402C29 0.1U/16V/X7R-C2

0402

C33

0.01U/25V/X7R-C2

0402R219 0-R2

0402

C79 47P

-C2

0402

C69

1U/16V/X5R-C2

TP35

U23

RCLAMP0524P-X

12345 6

7

910

IN1IN2GND1IN3IN4 OUT4

OUT3

OUT2OUT1

C73 47U/10V/X5R-C12

24M-1.8V-3225-4S

OSC1

4

2

1

3

VCC

GND

OE

CLK

0402R167 10K-R2

0402

C66

100P-C2-X

0402R8 0-R2

0402R13 150-R2

0402

C9

10P-C2-X

0402R58 33-R2

0402

C280.1U/16V/X7R-C2

0402R222 0-R2

0402R15 0-R2

0402R214 33-R2

J4(2-3)1JUMPER200

0402R240 0-R2-X

U4

SGTL5000XNAA3/R2

24 22

14

18

20

19

21

25

26

6

27

28

29

1

8

2

35

12

11

15

17

13

7

23

30

31

32

4

9

10

16

33

I2S_SCLK NC5

LINEIN_L

CPFILT

VD

DIO

NC4

SYS_MCLK

I2S_DOUT

I2S_DIN

HP_L

CTRL_DATA

NC6

CTRL_CLK

GN

D1

NC1

HP_R

GN

D2

VD

DA

LINEOUT_L

LINEOUT_R

MIC

NC3

LINEIN_R

AG

ND

I2S_LRCLK

VD

DD

CT

RL_A

DR

0_C

S

CT

RL_M

OD

E

HP_VGND

NC2

VAG

MIC_BIAS

GN

D3-P

AD

0603R182

220/2A-L3

0402R47 324K-1%-R2-X

0402R215 0-R20402C681U/16V/X5R-C2

0603

R209

100-R3-X

0402R3 0-R2

J5

PH200-3X1

123

0402R5 150-R2

0402R46 0-R2

J2

PH200-3X1

123

TP42

0402R40 0-R2

0402R62 0-R2-X

0402R48 2.2K-R2

0402

C17

1U

/16V

/X5R

-C2

0402

C27

0.1U/16V/X7R-C2

0402R49 162K-1%-R2-X

0402R22 0-R2

0402R32 0-R2

C74 47U/10V/X5R-C12

0402R216 0-R2

0402R36 0-R2

0402

C67

100P-C2-X

0603R50 0-R3

0402R12 150-R2

0603

1U/25V/X5R-C3 C22

0402R60 33-R2

BEAD

0603

L1 220/2A-L3

CON1

PH200-6X1-X/D28-X

123456

0402C18 0.1U/16V/X7R-C2-X

TP37

0402R6 0-R2

TP38

0402R61

1.69K-1%-R2

U3

TPS71715DCKR

1

3

4

5

2

IN

EN

NR

OUT

GND

0402R246 0-R2-X

0402R134 0-R2

0402

C31

0.01U/25V/X7R-C2

0402R2 0-R2

0402R31 0-R2

0402R202 0-R2

0402R205 33-R2

0603R178 0-R3

0402

C63

0.1U/16V/X7R-C2

0402R39 10K-R2

J1

PH200-3X1

123

0402

C16

0.1U/16V/X7R-C2

0402R133 0-R2-X

0402R224 0-R2

BEAD

0603

FB1 31/3A-L3

0603

10U/16V/X5R-C3

C64

U19

TPS71725DCKR

1

3

4

5

2

IN

EN

NR

OUT

GND

0603

R198

100-R3-X

0402R140 0-R2

0402R37 0-R2

0402R7 0-R2

0402

C30

0.1U/16V/X7R-C2

0603

10U

/16V

/X5R

-C3

C4

0402R239 0-R2

0402R139 0-R2-X

0402R59 499-1%-R2

TP39

LINEOUT_MICIN1

PJD-035-47B

1

23

467

0402R52 0-R2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RMII

I

I

I

RGMII

1V5

Address 0x01h

+1.1V

0

0

1

MODE2[0]

PHYADDRESS1 (IPD)

MODE2[3]

1

01.8V/1.5V

0PHYADDRESS2 (IPD)

MODE2[1]

PHYADDRESS0 (IPD)

MODE2[2]

1

1

Option

PHYA[2:0] : 001

CONFIG[2:0] : 001

HOBBIT6UL-BBA1

RMII / RGMIIWANDBOARD.ORG

Custom

6 7Monday, March 14, 2016

Title

Size Document Number Rev

Date: Sheet of

ENET1_LED0/NWAYENENET1_TXENA

ENET1_B-CAST-OFF

ENET1_PHYAD0

ENET1_LED1/SPEED

ETH1_TXM

RMII_RXD0

ETH1_RXM

RMII_TXCLKENET1_CONFIG0

RMII_RXD1

ENET1_CONFIG1

RMII_TXD0

RMII_RXDV

RMII_MDC

ENET1_TX_CLKA

ETH1_RXP

RMII_TXEN

RMII_TXD1

LED1_ACT

RMII_MDIO

ENET1_TXD1A

LED1_nLINK100

ENET1_PHYAD1ETH1_TXP

ENET1_RXER

RMII_REF_CLK

GPIO_P42_3VENET1_RXER

GPIO_P42_3VRMII_nRST

RMII_nRST

ETHER1_D2P

RMII_TXD3

LED2_ACT

LED2_nLINK100

ETH_REFCLK

RMII_TXEN

ETH_TXD0

ETHER1_D3N

VADDL_PHY

ETH_TXCLK

ETH_RXD2

ETHER1_D1N

RMII_TXD1ETH_TXD2

RMII_nRST

LED2_nLINK1000

ETH_TXD1

PHY_LED_1000n

ETH_RXCLK

VE

TH

_LX

RMII_RXD1

ETH_MDIO_CLK

RMII_RXD0

PHY_LED_ACTn

ETH_MDIO_DATA

ETH_RXD1

RMII_INT

ETH_RXD0

ETH_TXD3

ETH_RESETn

ETHER1_D2N

RMII_MDIO

ETHER1_D1PRMII_TXD2

ETH_INTn

RMII_RXD3

RMII_TXD0

ETHER1_D3P

ETH_RXDV

PHY_LED_10/100n

RMII_TXCLK

RMII_RXD2

RMII_REF_CLK

RMII_RXCLK

ETH_RBIAS

ETHER1_D0N

RMII_MDC

ETH_RXD3

ETHER1_D0P

ETH_RXD1

ETH_RXDV

ETH_RXD2

ETH_RXD0

ETH_RXCLK

E0P

E0N

E1P

E1N

REXTA

GPIO_P42_3V

ENET1_LED0/NWAYEN

RMII_RXDV

RMII_RXD0

RMII_INT

ENET1_PHYAD0

ENET1_B-CAST-OFF

ENET1_RXER

ENET1_LED1/SPEED

ENET1_CONFIG0

ENET1_PHYAD1

ENET1_CONFIG1

RMII_RXD1

E0P

E1P

E0N

E1N

E2PE2N

E3PE3N

LAN_P

E3N

E1PETHER1_D1N

GLED+

ETHER1_D3N

ETHER1_D2P

ETHER1_D0P

E3P

ETHER1_D1P

GLED-

E2P

LED2_ACT

LED1_nLINK100

ETHER1_D2N E2N

E0P

LED1_ACT

LED2_nLINK1000

YLED-

ETHER1_D0N

ETHER1_D3P

YLED+E0N

LED2_nLINK100

E1N

ETH_RXD3

PHY_LED_ACTn

PHY_LED_1000n

XTL_OXTL_I

ETH_TXEN

RMII_INT

RMII_RXDV

RMII_INT

RMII_INT0

ENET1_nRST

ENET1_nRST

RMII_INT0_A1RGMII_TX_CTL

RGMII_TX_CTL

RMII_TXEN

RMII_INT2

RMII_INT2

RMII_TXEN2

RMII_RXD22

RMII_TXD32

RMII_nRST2

RMII_RXD12

RMII_TXD22RMII_TXD12RMII_TXD02

RMII_RXD02

RMII_TXCLK2

RMII_MDC 2

RMII_RXD32

RMII_MDIO 2

GPIO_P42_3V3

GPIO_P42_3V3

RMII_RXDV2

RMII_RXCLK2

RMII_REF_CLK2

+3.3V

+3.3V

+3.3V

2V5_RGMII

+3.3V

VETH_VDDIO

+3.3V

VETH_AVDD_3_3

VDD

+3.3V

VETH_AVDD_3_3

2V5_RGMII

VETH_VDDIO

+3.3V

VDDL_PHY

VETH_VDDIO

2V5_RGMII

+3.3V

+3.3V

+3.3V

LGND

1P8V+3.3V

VETH_VDDIO

+3.3V

+3.3V 1P8V

0402R210 0-R2-X

0402R176 1K-R2-X

0402R227 10K-R2-X

0402R204 1K-R2-X

0402

C10

0.1U/16V/X7R-C2

0603

22U

/6.3

V/X

5R

-C3

C42

0402

C25

0.1U/16V/X7R-C2

0402R201 0-R2

0402R17 0-R2-X

FB3 470/2A-L31 2

0402R76 1K-R2

0402R149 0-R2

0402R155 0-R2-X

0402

R169

6.49K-1%-R2

0402C58 470P-C2-X

0402R88 220-R2

U24

TXS0101YZPR

C1C2A1A2

B2B1A1B1

VCCAVCCB

OEGND

0402R233 0-R2-X

0402R122 220-R2

0402R79 0-R2-X

0402R235 0-R2-X

0402

C62

0.1

U/2

5V

/X7R

-C2

0603

10U

/16V

/X5R

-C3

C8

0402R159 0-R2-X

0402

R147

1K-R2

U16

RCLAMP0524P-X

12345 6

7

910

IN1IN2GND1IN3IN4 OUT4

OUT3

OUT2OUT1

0603

10U

/16V

/X5R

-C3

C21

0402

C14

0.1U/16V/X7R-C2

0402R168 1K-R2

0402R123 0-R2

0402R142 4.7K-R2-X

0402

C51

0.1

U/2

5V

/X7R

-C2

0402R143 220-R2

0402R171 0-R2-X

0402R83 4.7K-R2-X

0603

22U

/6.3

V/X

5R

-C3

C50

0402R89 220-R2

0402R225 0-R2

0402R164 4.7K-R2-X

0402

C15

1U/16V/X5R-C2

0402R78 0-R2-X

0402R138 0-R2

0402R156 0-R2-X

0402R226 10K-R2-X

0402R104 1K-R2

0402R119 10K-R2

0402R38 0-R2-X

0402R211 330-1%-R2-X

0402R145 10K-R2

0402R157 0-R2-X

0402R124 0-R2-X

0402R68 10K-R2

0402 C1322P-C2

0402R67 0-R2-X

0402R70 0-R2

0402R234 0-R2-X

0402

C222P-C2

0402R75 0-R2

0402R137 0-R2

0603R28 0-R3

0402R127 0-R2

0402R82 0-R2-X

0402R121 0-R2

0402R161 0-R2-X

0402R120 0-R2-X

0402

C43

0.1

U/2

5V

/X7R

-C2

0402R237 0-R2-X

0402

R1172.37K-1%-R2

0402R73 750-R2

0402

C11

0.1U/16V/X7R-C2

0402R80 0-R2

0402R130 1K-R2

0402R99 0-R2-X

0402R193 330-1%-R2-X

0402

C12

0.1U/16V/X7R-C2

0402

C810.1U/25V/X7R-C2

0402C54 470P-C2-X

0402

R148

1K-R2

0603R34 0-R3-X

0402R100 10K-R2-X

0402R111 0-R2

0402R136 0-R2

0402

C7

1U/16V/X5R-C2

0402R101 4.7K-R2

0402R129 4.7K-R2-X

0402R91 0-R2

0402R162 0-R2-X

0402R116 0-R2-X

L4

CWPA3010-4R7N1 2

0402R175 4.7K-R2-X

0402R114 10K-R2

Y1

25MHZ-FSX3M-4S

13

24

0402R42 10K-R2

TP41

0402R213 150-1%-R2

0402R154 1K-R2

0402R177 1K-R2

0402C82 0.1U/25V/X7R-C2

0402

C710.1U/16V/X7R-C2

0402R153 1K-R2

0402R72 10K-R2

32

17

54

68

LAN1

RT7-174AAM1A

1

5

2

6

3

L1

4

L2

7

L3

8

L4

9

H1

10

H2

TD0+_D0+

TCT_CT

TD0-_D0-

RCT_CT

RD+_D1+

GLED-_OLED+

RD-_D1-

GLED+_OLED-

NC_D2+

YLED-

NC_D2-

YLED+

NC_D3+

CGND1

NC_D3-

CGND2

0402

C19

0.1U/16V/X7R-C2

0402R135 0-R2

0402C60 470P-C2-X

BEAD

0603

L3 150/2A-L3

U14

KSZ8081RNB

1

23

4

5

6

7

8

9

10

1112

13141516

17

18

1920

21

2223

24252627

2829

3031

32

33

GN

D

VD

D_1.2

VD

DA

_3.3

RXM

RXP

TXM

TXP

XO

XI

REXT

MDIOMDC

PHYAD0PHYAD1RXD1/PHYAD2RXD0/DUPLEX

VD

DIO

CRS_DV/CONFIG2

REF_CLK/B-CAST_OFFRXER/ISO

INTRP/NAND_TREE

NC1TXEN

TXD0TXD1NC2NC3

CONFIG0CONFIG1

LED0/NWAYENLED1/SPEED

RST

PA

DD

LE

U17

RCLAMP0524P-X

12345 6

7

910

IN1IN2GND1IN3IN4 OUT4

OUT3

OUT2OUT1

0402R108 10K-R2

0402R112 10K-R2-X

0402

C20

0.1U/16V/X7R-C2

0402R132 10K-R2

0402R102 0-R2-X

0402

C5

0.1U/16V/X7R-C2

0402

R95

10K-R2

0402R212 150-1%-R2

0402R236 0-R2

0402R218 150-1%-R2-X

0402R71 0-R2

BEAD

0603

L2 150/2A-L3

0402

C6

0.1U/16V/X7R-C2

0402

C721000P-C2

BEAD

0603

FB7 220/2A-L3

U11

AR8035-AL1A-X

23

2526

27

2829

30

14

17

20

45

6

7

811

31

32

33

34353637

38

1

2341

910

1213

1516

1819

21

22

24

40

39

CLK_25M

RXD3RXD2

VD

DIO

_R

EG

RXD1RXD0

RX_DV

AV

DD

33

AV

DD

L

INT

XTLOXTLI

AV

DD

L

RBIAS

VD

DH

_R

EG

AV

DD

L

RX_CLK

TX_EN

GTX_CLK

TXD0TXD1TXD2TXD3

DV

DD

L

RST

LX

VD

D33

EP

TRXP0TRXN0

TRXP1TRXN1

TRXP2TRXN2

TRXP3TRXN3

LED_ACT

LED_LINK1000

LED_LINK10_100

MDC

MDIO

0402R128 4.7K-R2-X

0402R23 100K-R2

0402

C46

0.1

U/2

5V

/X7R

-C2

0402R87 4.7K-R2-X

0402R98 1K-R2

0402R158 0-R2-X

0402R144 10K-R2-X

0402R69 0-R2-X

0402R163 4.7K-R2

0402R66 10K-R2

0402

R90

1K-R2

0402R221 0-R2-X

0402R103 1K-R2

0402R74 0-R2

0402R194 10-R2-X

0402R160 0-R2-X

0402R81 0-R2

0402R131 10K-R2-X

0402R146 220-R2

0402R106 10K-R2

0402R16 0-R2-X

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HOST USB

OTG USB CAMERA Connector

BUS I/O

Option

HOBBIT6UL-BBA1

Host & Client USB

WANDBOARD.ORG

Custom

7 7Monday, March 14, 2016

Title

Size Document Number Rev

Date: Sheet of

USB_H1_OC

LDO_VBUS1

LDO_VBUS1

USB_HOST_DN

USB_HOST_DP HOST_DP1

USB1_OVRCURn

HOST_DM1

CSI_D0M

CSI_D3P

I2C2_SCL

CSI_D3M

DSI_D0P

CSI_CLK0P

GPIO_8

CSI_D1P

DSI_CLK0M

I2C2_SDA

DSI_D1M

CSI_D2M

DSI_D0M

CSI_CLK0M

DSI_CLK0P

CSI_D1M

DSI_D1P

CSI_D2P

GPIO3_CLKO_AGPIO_6

CSI_D0P

I2C2_SDA

TX_E

Analog

UART1_RX_3V

RX_E

PWM1_3V3

CSPI2_SCLK_3V

I2C2_SCL

TX_E

I2CX_SCL_3VI2C3_SCL_3V

EXP_PWM

UART1_TX_3V

Analog

I2C1_SCL_3V

I2C3_SDA_3V

CSPI2_CSX_3V

CSPI2_CS1_3VCSPI2_CS2_3V

I2CX_SCL_3V

I2C1_SDA_3V

CSPI2_MISO_3V

RX_E

UART3_RX_3V

INT GPIO_P25_3V

CSPI2_MOSI_3V I2CX_SDA_3V

I2CX_SDA_3V

nRESET

ADC_VIN

CSPI2_CSX_3V

UART3_TX_3V

CSPI2_MISO_3V

INT

CSPI2_MOSI_3V

EXP_PWM

Analog

CSPI2_SCLK_3V

nRESET

CSPI2_CSX_3V

RX_E

I2CX_SDA_3V

TX_E

I2CX_SCL_3V

PSWUSB_OTG_VBUS

FAULT

OTG_DN1OTG_DP1USB_OTG_DP

USB_OTG_DN

OTG_DP2OTG_DN2

USB_OTG_ID

USB_H1_OC 2

USB_HOST_DN2

USB_HOST_DP2

DSI_D0P2

CSI_D1M2

CSI_D3P2

CSI_D0P2

DSI_CLK0P2

DSI_D0M2

CSI_D2M2

CSI_CLK0P2

CSI_D1P2

GPIO_82

CSI_D0M2

CSI_D2P2

DSI_D1M2

I2C2_SDA2,3,4

DSI_D1P2

CSI_D3M2

GPIO3_CLKO2

CSI_CLK0M2

DSI_CLK0M2

I2C2_SCL2,3,4

CSPI2_MOSI_3V3

I2C3_SCL_3V3,4

CSPI2_MISO_3V3

I2C1_SCL_3V3,4

I2C1_SDA_3V3,4

PWM1_3V3 3

CSPI2_CS1_3V3

CSPI2_SCLK_3V3

ADC_VIN4

I2C3_SDA_3V3,4

CSPI2_CS2_3V3

USB_OTG_VBUS2

FAULT 2

PSW2

USB_OTG_DN2USB_OTG_DP2

GPIO_62

USB_OTG_ID2

UART3_TX_3V 3UART1_TX_3V 3,5

UART3_RX_3V 3UART1_RX_3V 3,5

nRESET2,4 GPIO_P25_3V 3

V_SYS

V_SYS

USB_VBUS

USB1_GND

V_SYS

+3.3V

+3.3V

V_SYS

5V_SYS+3.3V

USBC1_GND

VBUS_5V5V_SYS

V_SYS

1P8V

VBUS_5V

USBC1_GND

0603

10U

/16V

/X5R

-C3

C61

0402R53 0-R2

D14

PG

B0010603M

R-X

D11

PG

B0010603M

R-X

U6

RCLAMP0524P-X

12345 6

7

910

IN1IN2GND1IN3IN4 OUT4

OUT3

OUT2OUT1

BEAD

0603

B2 31/3A-L3-X

0603R207 0-R3

0402R43 0-R2-X D1

PG

B0010603M

R-X

0402R11 10-R2

D4

PG

B0010603M

R-X

F1 SMD0805-100

CAMERA1FP124-334M4-X

P2

P1

123456789101112131415161718192021222324252627282930313233

PA

DP

AD

0402R241 0-R2

D9

PG

B0010603M

R-X

0603R51 0-R3

0402R166 100-R2

0402

R2910K-R2-X

D12

DIO

_V

5.5

MLA

0603-X

0402R242 0-R2

U2

TPS2065DBVR-X

2

5

4

1

3GND

IN

EN

OUT

OC

USBH1

USB-A-FLANK-D

1

2

3

4

5678

+5V

DM

DP

GND

H1H2H3H4

U15

TPS2061DBVR

2

5

4

1

3GND

IN

EN

OUT

OC

0402R27 10-R2

JP5

SSW-108-01-G-S

12345678

JP6

SSW-108-01-G-S

12345678

0402R18 10-R2-X

0402R24 10-R2-X

D15

DIO

_V

5.5

MLA

0603-X

0603R141 22-R3

0402

R4410K-R2-X

0402R243 0-R2

0402R150 10K-R2

0402R54 0-R2

0402R41 22-R2

U5

RCLAMP0524P-X

12345 6

7

910

IN1IN2GND1IN3IN4 OUT4

OUT3

OUT2OUT1

0402R174 10-R2

BEAD

0603

FB8 31/3A-L3

0402R19 10-R2-X

BEAD

0603

FB9 31/3A-L3

0402R21 10-R2

0402R25 10-R2

0402R208 0-R2

USBC1

DX07S024JJ2

A1

A2

B12

A4A9

B11

A6A7

A8

B7

A10

B6

A12B1

B8

A5B5

A3

B10

B4B9

A11

B2B3

H1H2H3H4H5H6

GND

SSTXp1

GND

VBUSVBUS

SSRXp1

Dp1Dn1

SBU1

Dn2

SSRXn2

Dp2

GNDGND

SBU2

CC1CC2

SSTXn1

SSRXn1

VBUSVBUS

SSRXp2

SSTXp2SSTXn2

H1H2H3H4H5H6

0402R55 10-R2

0603R45 0-R3

TP31

D8 SS2040FL-X

C A

0402

R220

10-R2-X

0402R217 0-R2

D3

PG

B0010603M

R-X

0402R173 10-R2-X

0402R85 10-R2-X

D5

PG

B0010603M

R-X

D6

PG

B0010603M

R-X

D10

PG

B0010603M

R-X

0402R26 10-R2-X

BEAD

0603

B1 31/3A-L3

0402

R15110K-R2-X

0402

R15210K-R2

U1

RCLAMP0524P-X

12345 6

7

910

IN1IN2GND1IN3IN4 OUT4

OUT3

OUT2OUT1

0402R35 10K-R2-X

0402R86 10-R2-X

D13

PG

B0010603M

R-X

0603

10U

/10V

/X5R

-C3

C26

0402R203 0-R2

0402R10 10-R2

0603

10U

/10V

/X5R

-C3

C24

0603

10U

/16V

/X5R

-C3

C80

0402R20 10-R2