LPCXpert V3.5

© 2017: Peter Furtner

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Pin- and Software Configuration Tool

for the

LPC800, LPC1000, LPC4000 & LPC54000

Micro-Controller Family

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Table of Contents 1) Introduction .................................................................................................................................................. 3 2) LPCXpert Installation .................................................................................................................................... 4 3) LPCXpert Startup Window ........................................................................................................................... 5 3.1) “CPU Select” Tab ......................................................................................................................................... 5 3.2) “CPU Config” Tab ......................................................................................................................................... 6 3.3) “PIN Config” Tab .......................................................................................................................................... 7 3.4) “APP Select” Tab .......................................................................................................................................... 7 4) “Info” Window ............................................................................................................................................... 9 5) Peripheral Configuration Window ............................................................................................................... 10 5.1) “Pin Config” Tab ......................................................................................................................................... 10 5.2) Peripheral Configuration Window for the “CGU” ........................................................................................ 11 5.2.1) “CGU” Specific “Pin Config” Tab ................................................................................................................ 11 5.2.2) “CGU” Specific Clock Configuration Tabs .................................................................................................. 12 5.3) Peripheral Configuration Window for the “DEBUG” Interface ..................................................................... 13 5.4) Peripheral Configuration Windows for the LPC8xx / LPC541xx Family ...................................................... 14 6) “Save Config” Window ................................................................................................................................ 15 7) “Load Config” Window ................................................................................................................................ 15 8) “Generate Project” Window ........................................................................................................................ 16 8.1) C-Code Only .............................................................................................................................................. 16 8.2) KEIL µ-Vision Project ................................................................................................................................. 18 8.3) IAR EWARM Project .................................................................................................................................. 18 8.4) LPCxpresso / MCUxpresso Project ........................................................................................................... 19 9) “Generate Symbol” Window ....................................................................................................................... 21 9.1) Using the ALTIUM Designer CAD Symbol ................................................................................................. 22 9.2) Using the EAGLE CAD Symbol .................................................................................................................. 22 9.3) Pin Reference File (Excel-Sheet) ............................................................................................................... 23 9.4) Pin-Mux File (PMX-File) ............................................................................................................................. 23 Appendix-A) Code Generator for LPC Devices.................................................................................................... 24 A1) CGU Configuration ..................................................................................................................................... 24 A2) DEBUG Interface Configuration ................................................................................................................. 25 A3) NVIC Configuration .................................................................................................................................... 26 A4) NMI Configuration ...................................................................................................................................... 26 A5) GPDMA Configuration ................................................................................................................................ 27 A6) GPIO Configuration .................................................................................................................................... 28 A7) UART Configuration ................................................................................................................................... 29 A8) SPI Configuration ....................................................................................................................................... 31 A9) I2C Configuration ....................................................................................................................................... 33 A10) I2S Configuration........................................................................................................................................ 35 A11) ADC Configuration ..................................................................................................................................... 36 A12) SCT Configuration ...................................................................................................................................... 39 A13) TIMER Configuration .................................................................................................................................. 40 A14) RTC Configuration ...................................................................................................................................... 41 A15) MRT Configuration ..................................................................................................................................... 42 A16) UTICK Configuration .................................................................................................................................. 42 A17) WWDT Configuration ................................................................................................................................. 43 A18) RI-TIMER Configuration ............................................................................................................................. 43 A19) GINT Configuration .................................................................................................................................... 44 A20) PINT Configuration ..................................................................................................................................... 45 A21) PMU Configuration ..................................................................................................................................... 46 A22) BOD Configuration ..................................................................................................................................... 46 A23) DMIC Configuration .................................................................................................................................... 47 A24) TSense Configuration ................................................................................................................................. 48 A25) SCI Configuration ....................................................................................................................................... 48 A26) DAC Configuration ..................................................................................................................................... 49 A27) CAP-Touch Configuration .......................................................................................................................... 50 Appendix-B) Revision History .............................................................................................................................. 51

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1) Introduction

This latest release of the LPCXpert pin-mux tool supports almost all of the NXP CORTEX-M0 and M0+ based LPC800 and LPC1100 devices, the CORTEX-M3 based LPC1300, LPC1500, LPC1700 and LPC1800 devices and the CORTEX-M4 based LPC4000 and LPC54000 devices. It also includes pre-built pin-mux configurations for the Embedded Artist LPC1850 Evaluation Board and the HITEX LPC1850 board. It also supports saving and restoring of up to 8 different custom configurations. Features include the following:

- Support for CORTEX-M0 based controllers: LPC1100, LPC1200

- Support for CORTEX-M0+ based controllers: LPC800, LPC11E6x, LPC11U6x

- Support for CORTEX-M3 based controllers: LPC1300, LPC1500, LPC1700, LPC1800

- Support for CORTEX-M4 based controllers: LPC4000, LPC4300, LPC54000

- Support of the NXP LPCopen Source Code Libraries

- Application specific configuration of peripheral interfaces

- Generation of CMSIS compliant Startup Code

- Generation of Schematic Symbols for ALTIUM Designer

- Generation of Schematic Symbols for EAGLE V6.2

- Generation of Pin-Out Reference Sheet for MS-Excel

- Project generation for KEIL µVision

- Project generation for IAR Embedded Workbench EWARM

- Web-links to device related information

With the enhanced features available for the LPC8xx and the LPC541xx family of devices LPCXpert also supports configuration and generation of initialization code and application example code for all the peripherals. With this feature-set it is now possible to build-up a target application starting with the configuration and the test of the individual peripherals.

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2) LPCXpert Installation

To install LPCXpert on a computer all files and folders from in the “LPCXpert V3.5.zip” file must be copied into a common folder (any folder is OK). No special Installation is required to use the tool. The Zip-File includes the following files and folders:

- Common : A Folder holding source files - LPCXpert V3_5.accde : LPCXpert Tool for 32-bit ACCESS-2016 systems - LPCXpert V3_5 (2007).accde : LPCXpert Tool for 32-bit ACCESS-2007 systems - License Agreement.pdf : A License Agreement - LPCXpert ReadMe.pdf : This ReadMe Document

Before using the MICROSOFT Access Database applications “LPCxpert.accde” a valid MICROSOFT ACCESS runtime environment needs to be installed. This is the case if any of the MICROSOFT ACCESS 2007, ACCESS 2010, and ACCESS 2013 or later are installed already. In the case, none of these versions are installed, MICROSOFT also provides a free-of-charge ACCESS RUNTIME that needs to be installed instead. The MICROSOFT ACCESS 2016 RUNTIME may be downloaded from the following web-site: https://www.microsoft.com/en-US/download/details.aspx?id=50040 If the runtime cannot be found under this web-site it may also be found on the following web-site http://www.microsoft.com Search for “ACCESS RUNTIME”, using the search field of this page. From the selection of web-sites that are displayed the one showing “Access 2016 runtime” may be selected and the tool being downloaded from there. Please make sure you download the English version. It is recommended to reduce the security level setting for the ACCESS RUNTIME to its lowest value. LPCxpert requires the following MS-ACCESS Drivers to be installed (or available). - Visual Basic for Applications - Microsoft Access 16.0 Object Library (or 12.0 Object Library for MS-ACCESS 2007) - Microsoft ActiveX Data Objects 2.1 Library - Microsoft Forms 2.0 Object Library - Microsoft Office 16.0 Access Database Engine Objects Library (or 12.0 for MS-ACCESS 2007) - Microsoft Visual Basic for Applications Extensibility 5.3 - OLE Automation After the installation it is recommended to review the windows system language settings for non-unicode programs. By default the language may be the same as for the whole system. In this case it is recommended to set the language to English (USA).

NOTE: LPCXpert does not support the 64-bit mode of ACCESS 2016 or ACCESS 365

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3) LPCXpert Startup Window

The “LPCXpert” start-up window provides the tabs: “CPU Select”, “CPU Config” and “Pin Config” and eventually “APP Select”. It also includes the buttons “NXP Data Sheet”, “NXP Support”, “LPCopen”, “LPCware”, “LPCzone”, and “Shopping”. Clicking on any of these buttons opens a different Web-Site with further information on the NXP devices. The features of these button although are not guaranteed, since Web-Sites may be changed by their owner. When starting the tool, LPCXpert always shows the last configuration.

Figure 3.01:

3.1) “CPU Select” Tab

To select a controller with a specific peripheral interface set the “CPU Select” Window may be used.

Figure 3.02: Clicking on any of the buttons with peripheral names (“ETH”, “USB0”, “SPI0”, …) or selecting a memory option this peripheral or memory option gets selected and the name of the selected button changes to the color “green”. The “Select Device” box then lists all devices offering the selected features or memory configurations. Clicking on the “Configure Device” button after having selected a device copies this device to the “CPU Config” Window and opens this window for configuration of the device.

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3.2) “CPU Config” Tab

The “CPU Config” Window provides a configuration button for every on-chip peripheral (“ETH”, “USB0”, “USB1”, “CAN0”, “CAN1” …) available with the selected device. Clicking on any of the available buttons gets you into a dedicated configuration window (see Section 5, “Peripheral Configuration Window”) that allows configuration of the Pin-Mux and the features of the selected peripheral Interface.

Figure 3.03: Using the “Select Device” box a different controller may be selected for the application. This version of LPCXpert supports almost all available CORTEX-M based Devices from NXP. When a peripheral has been configured (i.e. the corresponding “APPLY” Button in the peripheral configuration window has been set) this gets highlighted by different colors on the “CPU-Config” window.

Figure 3.04: The buttons for selected and configured peripherals become “green” and the buttons of peripherals that are impacted by a current selection become “red”. This color is just an indication that some of the peripheral pins may not be available for configuration any more. It is not necessarily an indication that the interface cannot be used anymore.

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3.3) “PIN Config” Tab

To configure of the devices pin-mux and pin-mux features on a pin-by-pin basis the “PIN Config” Window may be used.

Figure 3.05: The “FUNC” selector lists all signals available with the pin and allows configuration of the pin. The Field “Peripheral Interface” holds the name of the Interface this pin is configured for. The following fields show the pins individual configuration options available with this device. In this example the pin configuration options of a LPC1850FET256 in a 256-pin TBGA-Package are shown. For other devices, theses option fields may be different. For detailed information on the configuration options please refer to the specific Data Sheet or User Manual of the selected device. Setting the “Apply” Button saves the current setting and assigns the pin to the peripheral interface. Assigning a pin to a peripheral interface removes this pin from any other peripheral interface. Using this feature the user may overwrite previous settings.

3.4) “APP Select” Tab

When configuring any of the devices out of the LPC8xx or LPC541xx Family the “APP Select” window supports selection of a demo application for these devices. The demo applications are tested and running on the corresponding LPCxpresso8xx and LPCxpresso541xx Evaluation Board. For more information on how to configure the demo applications please refer to Appendix-A:

Figure 3.06: The “Generate Project” button generates a new project. For more information on how to generate a new project refer to 8) “Generate Project” Window The “Update Project” button updates the project with new configuration settings. For more information on how to update the project refer to 8) “Generate Project” Window

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Before selecting an application all necessary peripherals need to be configured. Information on how to configure

the peripherals for the application is displayed after clicking the “?” button on the line.

The following window shows the description for the “Blinky Application (Using SYSTICK Timer)” as well as “Recommended Configuration” settings.

Figure 3.07: Before generating a project for this application, the DEBUG interface, the CGU Interface, the GPIO0 interface and the SYSTICK Timer needs to be configured as outlined in the “Recommended Configurations” Section. In the case a peripheral required by the application is not yet configured a box showing the following message is displayed:

Figure 3.08:

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4) “Info” Window

The “Info” Window provides some Copyright Info on the tool.

Figure 4.01: After clicking on the “READ ME” Button this “ReadMe” documentation File gets opened.

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5) Peripheral Configuration Window

The peripheral configuration windows are opened by clicking on any of the active buttons under the “CPU Config” tab. For all device families it supports configuration of the pin-out of the selected peripheral. In addition - for the Clock Generation Unit (“CGU”) only – it supports the configuration of the different PLLs and clock settings available with the device. When generating a project with a given configuration, code is generated that configures the device with the given settings (See Section 8) “Generate Project” Window). For the LPC8xx and the LPC541xx family of devices this window also supports configuration of all peripheral registers for specific applications (See Appendix A) Example Applications for the LPC54102).

5.1) “Pin Config” Tab

The “Pin Config” tab supports configuration of the pins of the peripheral interface. Within this tab the signals of the peripheral interface may be individually configured and assigned to a specific pin or be configured as not assigned to a pin (“- n/a -”). When the signals are connected to pins, several additional pin-configuration features are available.

Figure 5.01: The pins of all the LPC Families of devices support a subset of the following pin configuration options:

Option Description EPD Enable Pull-Down Resistor

EPDN Disable Pull-Up Resistor

EHS Select Slew-Rate Fast

EZI Enable Input Buffer

ZIF Disable Input Glitch Filter

EHD Enable High Drive

I2CSLEW I2C Slew Rate (Low / High

INV Invert Input Polarity (Non Inverted / Inverted)

A/D Select Analog Mode / Digital Mode

FLTR Disable Input Glitch Filter

I2C Mode Select I2C Mode Options

OD Enable Open Drain Mode

HYS Enable Hysteresis

… …

For more information on the device specific pin configuration options please refer to the corresponding devices user manual. Setting the “Apply” button confirms the current setting. Clicking on the “RESET” button resets the current configuration. Clicking on the “CLOSE” button closes the window and applies the selected configuration to the corresponding pins when the “Apply” button is set. Otherwise the configuration is not applied and is lost. In the given example (Figure 7) several pins of the Ethernet Interface “ENET” are configured and several pins are removed, i.e. made “Not Available” (“- n/a -“) in the PIN column from their application with this peripheral. When pins are configured for a certain peripheral they are not available for configuration with another peripheral. In the case a signal conflicts with an already defined pin-configuration this gets displayed in the “PIN” and the “Conflict” column of the configuration window.

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Figure 5.02: In this example none of the signals of “TIMER2” can be used anymore, since all necessary pins are assigned to other peripherals. The PIN column shows a “- n/a -“ (Not Available) and the “Comment” column names the peripheral and the signal that uses this pin.

5.2) Peripheral Configuration Window for the “CGU”

The configuration window for the external clock generators XTAL, RTC, or the general purpose CLOCK is opened by clicking the “CGU” button.

5.2.1) “CGU” Specific “Pin Config” Tab

On most devices the XTALIN and XTALOUT signals are connected to dedicated pins and no configuration is possible.

Figure 5.03: On devices - like the LPC11U6x – although where the XTALIN and XTALOUT signals are connected with configurable pins the features of these pin need to be configured.

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Figure 5.04:

5.2.2) “CGU” Specific Clock Configuration Tabs

For the CGU - “Clock Generation Unit” - LPCxpert offers a device dependent number of additional tabs (1). These tabs provide enhanced features to configure the devices CGU for the application. Using the additional windows the clock generator input and output may be defined or enabled and the PLLs and oscillators may be configured to a specific clock rate. With the “Generate Project” function LPCXpert will then also provides code that initializes the CGU for this configuration.

Figure 5.05: Using the configuration features under 2) the CGU input clocks and clock frequencies may be defined. Depending on the devices features there may be more or less options. Some of these options may show a “Fixed Value” and are not configurable. With other options a value within the boundaries may be entered.

Figure 5.06: Under 3) the system oscillator, driving the external XTAL, may be configured.

2

3

4

1

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With the options under 4) the PLL Input, the PLL-Input divider (when available), the PLL-Output clock rate, the Core (Main) clock source, and the Core (Main) clock rate may be configured.

Figure 5.07: With functions under the “CGU Output” tab the GCU Output may be configured. Under 5) the options for the CLOCKOUT pin are configured. The LPC4300 and LPC1800 Family of devices support a list of 22 configuration options, while other devices may only support one or two options.

5.3) Peripheral Configuration Window for the “DEBUG” Interface

The “DEBUG” Button opens the Pin-Config window for the signals of the JTAG / SWD Debug interface. In the case the JTAG/SWD signals are assigned to dedicated pins (like with the LPC1800 Family of devices), no further action is necessary. In the case the signals of the JTAG/SWD Interface are configurable (like with the LPC1100 Family of devices), they need to be assigned to pins and the “Apply” button needs to be selected.

Figure 5.08:

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The following diagram shows a configuration for the SWD Interface:

Figure 5.09: The next diagram shows a configuration for the JTAG Interface:

Figure 5.10: It is recommended to always activate the “Apply” Button when using the Debug Interface.

5.4) Peripheral Configuration Windows for the LPC8xx / LPC541xx Family

For the LPC8xx and the LPC541xx Family of devices more enhanced peripheral configuration features are available. These features are available for all on-chip peripherals and include application specific peripheral configuration. They also include setting of the clock input and the data rate options for the SPI, UART, and I2C interfaces as well as configuration of the interrupt rate for the SYSTICK timer, the MRT and the UTICK timer, the RI-Timer and all the other timers (like RTC, WWDT, and TIMER[0:4]. These features are used for example to configure the demo applications available for this device family.

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6) “Save Config” Window

Clicking on the “SAVE CONFIG” button of the Startup-Windows opens the following Window. Eight different lines, corresponding to eight storage locations may be selected.

Figure 6.01: Clicking on the “SAVE” Button saves the current configuration under the selected location and closes the window. The “Name” and “Comments” fields may be edited, to save additional information and providing the configuration a meaning full name. Clicking on the “CANCEL” Button, cancels the current operation.

7) “Load Config” Window

Clicking on the Startup-Windows “LOAD CONFIG” button opens the following Window. Several pre-defined configurations as well as all previously saved configurations, are displayed.

Figure 7.01: Pre-defined configurations are provided for all the LPC8xx and LPC541xx LPCxpresso Boards. Within these the CGU, the DEBUG, the NMI, the RESET, and eventually the GPDMA Interfaces are configured. Also, the GPIO interface is configured to connect the Input / Output signals of the LED outputs and Push-Button Inputs to the MCU. All other Interfaces may be unconfigured for individual applications. Clicking on the “LOAD” Button loads the selected configuration and closes the current window. The “CANCEL” Button cancels the current operation.

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8) “Generate Project” Window

Before generating a new project, LPCXpert requires the user to select a file type and a folder for the project and to enter a filename (or eventually directory) as the project name. The project type may selected as C-Code only (.C), for KEIL µVision (.uvproj), IAR EWARM (.eww), or LPCxpresso (.project).

Figure 8.01: With this information LPCXpert generates all files and folders required for the selected project type.

8.1) C-Code Only

When selecting the “C-Code Only” option, LPCXpert generates the following files and folders.

Figure 8.02:

The “Doc” folder includes a brief description of the application.

Figure 8.03: The “Drivers” folder holds all Source file (“*.C”) and all header files (“*.H”, necessary for configuration. The source file holds the code and tables necessary to initialize the PINMUX registers of the selected LPC1000 or LPC4000 device. The header file includes all constant definitions as well as a table with all pin settings.

Figure 8.04: The “Include” folder holds all necessary header files for the current configuration. These files are based on the LPCopen Source Code provided by NXP.

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Figure 8.05:

The “Startup” folder holds all necessary CMSIS Startup source and header files.

Figure 8.06:

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8.2) KEIL µ-Vision Project

When generating a project for KEIL µVision, LPCXpert generates the following project files and folders.

Figure 8.07: The file “DEMO.c” holds the “main()” function and all configuration code for the project. The additional “.ini” and “.uvprojx” files include configuration information for the KEIL µVision tool. Before the project can be opened the KEIL µVision toolset has to be installed. To open the project the “.uvprojx” file may be double-clicked. Some of the newer LPC devices (i.e. LPC54000 Family or LPC820 Family) may only be debugged using µVision5. When using µVision5 it is recommended to install the µVision4 compatibility pack with the NXP MCUs.

8.3) IAR EWARM Project

When generating a project for IAR EWARM, LPCXpert generates the following files and folders.

Figure 8.08: The file “DEMO.c” holds the “main()” function and all configuration code for the project. The additional “.ewp”, “.eww” and “.icf” files include configuration information for the IAR EWARM tool. Before opening the project IAR EWARM must be installed. To open the project you may just double-click the “.eww” file.

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8.4) LPCxpresso / MCUxpresso Project

When generating a new project for LPCxpresso or MCUxpresso, LPCXpert generates a new folder with the selected project name and the following new files and folders.

Figure 8.09 The file “DEMO.c” holds the “main()” function and all configuration code for the project. The additional “.cproject” and “.project” files include configuration information for the LPCxpresso / MCUxpresso tool. Before opening the project the LPCxpresso or MCUxpresso tool must be installed. To open the project, use the following steps.

- First start LPCxpresso (or MCUxpresso). - Configure the LPCxpresso workspace for the projects root folder. - Click the “Import Project” button of the LPCxpert Quick Access Panel. - Click on the “Browse” Button of the “Project Directory (Unpacked)” selector

Figure 8.10

- Select the root folder of the project that LPCxpert generated. - Click on “Next” button - On the following window first deselect the “Copy projects into workspace“ option and then select the

project (here “DEMO”).

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Figure 8.11

- Click on the “Finish” Button After this LPCXpresso opens and displays the project in the Project Window. It may now be compiled and executed. To overwrite an existing project, it is sufficient to just click on the “.project” file.

Figure 8.12

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9) “Generate Symbol” Window

To generate a new schematic Symbol, LPCXpert asks the user to select the file type, a folder and enter a filename. The file type may be ALTIUM Designer (.LIA) or CADSOFT EAGLE (.LBR).

Figure 9.01: With this information LPCXpert generates a new CAD-Symbol with the file extension “.LIA” or “.LBR” in the corresponding file format. The CAD-Symbol always include several sub-symbols. The number of sub-symbols and their definition depends on the device and the individual configuration. The following figure shows a possible configuration for a LPC1850 Device for the EAGLE Schematic Entry Tool.

Figure 9.02: Since CAD-Symbol files are all text-based, they need to be imported by the Schematics-Editor. This may be done as follows:

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9.1) Using the ALTIUM Designer CAD Symbol

This .LIA Symbol file may be imported from your ALTIUM Schematic Designer by first clicking on “File” and “Import Wizard” Within the Import Wizard click on “Next” and select “P-CAD Designs and Libraries Files” and click “Next” On the “Importing P-CAD Designs” Window click on “Next” On the “Importing P-CAD Libraries” Window click on “ADD”, select the “.LIA” file that was created by LPCXpert and click on “Next”, “Next”, “Next” until ALTIUM Designer has imported the Library file. The Schematic Symbol is now available for new designs.

9.2) Using the EAGLE CAD Symbol

This “.LBR” Symbol file may be imported from your CADSOFT EAGLE Schematic Designer by first clicking on the “USE” Button

of the Action toolbar. With the Open-Dialog you now have to select the EAGLE “.LBR” Library File generated by LPCXpert and click on “Open”. To use the Symbol in your schematic you then have to click on the “ADD” Button

of the Command bar of the schematic editor.

Figure 9.03: With the open dialog you now have to select the Library and the symbol that you want to use.

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9.3) Pin Reference File (Excel-Sheet)

The pin reference file holds the Pin number with the assigned peripheral and signal name in an Excel Table.

Figure 9.04:

9.4) Pin-Mux File (PMX-File)

The pin-mux reference file holds the Pin number with the assigned peripheral and signal name in an HTML file.

Figure 9.05:

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Appendix-A) Code Generator for LPC Devices

For the LPC8xx, the LPC11U6x, LPC11E6x and the LPC54xxx family of devices LPCxpert offers the additional feature to configure the device for an application. It supports windows to configure the peripherals registers of the device and provides many reference applications for the on-chip peripheral interfaces. These reference applications are written for and running on any of the LPCxpresso8xx or LPCxpresso541xx Evaluation Boards but may be easily adopted to other boards as well. To configure an application for the LPCxpressor5410x Evaluation Board the following steps are recommended.

1) Use the “CPU Select” tab to select the LPC54102J512BD64 as target device (this device is used on the LPCxpresso5410x Evaluation Board)

2) Click the “Configure Device” button to open the “CPU Config” tab. 3) Open the “APP Select” tab. 4) Click on the “Example Description” field to open the application description. 5) Return to the “CPU Select” tab configure the peripherals as described in the

“Configuration Requirements” section of the chosen description. 6) After having configured all peripherals open the “APP Select” tab and click on the “Function” field to

select the application. 7) Click on the “Generate Project” button to generate a project.

With this, a new project is generated in a folder of choice that includes all sources and object files for the chosen IDE tool (IAR EWARM, KEIL µVision, or GNU Compiler). The above method from Step 3) to Step 7) may be used to configure and test all peripherals for a specific application. It is not necessary to deactivate any peripheral when it is not used within a demo applications.

A1) CGU Configuration

The Peripheral Configuration Window for the CGU provides the “Pin Config” tab and two additional tabs to configure the “CGU PLL” and the “CGU Output”.

Fig. A1-1: Using the “Pin Config” tab the individual signals of the CGU are either connected with pins or set to not available (“- n/a -“) on a pin. When connected with pins certain features of the pin may be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A1-2:

1

2

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The upper section (1) of the “CGU PLL” tab shows the source and the corresponding frequencies available to the CGU. The CLKIN frequency may optionally be set to a value corresponding to the external clock generator connected to the CLKIN pin (i.e.10000000 = 10MHz). For the LPCxpresso54102 board it is set to 0, since there is no clock available on the CLKIN pin. The lower section (2) defines input to the PLL of the CGU, defines the PLL input clock divider and defines the clock source to the main clock. For the LPCxpresso54102 board the clock source is set to the PLL Output and to a frequency of 100MHz.

Fig. A1-3: The upper section (3) of the “CGU Output” tab again shows the input clocks available to the CGU Output configurator and the corresponding frequencies. Using the lower section (4) of this tab the CGU output may be configured. For some of the configuration options a value of “0” disables the output while a value of 1 to 255 configures the clock divider with the corresponding value.

A2) DEBUG Interface Configuration

The Peripheral Configuration Window for the DEBUG interface consists of the PIN Config tab only

Fig. A2-1: When debugging applications on the LPCxpresso54102 Evaluation Board the DEBUG interface needs to be configured for the Serial Wire Debug Interface (i.e. SWCLK and SWDIO).

3

4

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A3) NVIC Configuration

The Peripheral Configuration Window for the NVIC consists of the two “NVIC Interrupt Priority” tabs. Since the NVIC does not have any direct connection to pins there is no “Pin Config” tab.

Fig. A3-1: Both tabs supports configuration of the 36 sources for Interrupts on the LPC5410x. Interrupt priorities may be set to any value from Priority Level 0 (Lowest Priority Level) to 7 (Highest Priority Level)

A4) NMI Configuration

The Peripheral Configuration Window for the NMI provides the “NMI Configuration” tab.

Fig. A4-1: Using the “NMI Configuration” tab the NMI source for the Cortex-M4 and the Cortex-M0 Core of the LPC5410x is configured. Also the NMI configuration for each core may be enabled or disabled.

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A5) GPDMA Configuration

The Peripheral Configuration Window for the GPDMA consists of the “DMA Input Trigger Input Mux”, the “DMA Output Trigger Input Mux” and the “Memory-to-Memory Transfer” tabs. The NVIC does not have any direct connection to pins and therefore not support a “Pin Config” tab.

Fig. A5-1: Using the “DMA Input Trigger Input Mux” tab the input signals to the DMA Hardware triggers are configured.

Fig. A5-2: Using the “DMA Output Trigger Input Mux” tabs the output signals of the GPDAM Input mux are defined.

Fig. A5-3: “Memory-to-Memory Transfer” tabs configures a channel of the GPDMA for memory-to-memory transfers. This configuration my then be used within the application.

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A6) GPIO Configuration

The Peripheral Configuration Window for the GPIO interfaces provides the “Pin Config” tab, the “Port Direction” tab and the “RD/WR Mask” tab.

Fig. A6-1: With the “Pin Config” Tab individual pins of the GPIO are either enabled or disabled. When enabled certain features of the pin may be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A6-2: Using the “Port Direction” tab the input/output direction for each one of the up to 32 port pins may be configured. This option is only available for ports configured as GPIO ports and depends on the settings of the “Pin Config” tab.

Fig. A6-3: The “RD/WR Mask” tab defines the input/output mask for each one of the up to 32 Port Pins. Setting the mask to “Pin Input/Output” configures the port for Input/output. Setting the mask to “Pin RD/WR Protected” disables all read /write operations to this port. In this case a read of the port always returns a “0” and a write does not change the output. This option is only available for ports configured as GPIO ports and depends on the settings of the “Pin Config” tab.

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A7) UART Configuration

The Peripheral Configuration Window for the UART interfaces provides the “Pin Config” tab, the “RX/TX” tab, the “Control” tab, the “UART Interrupt” tab, the “FIFO” tab and the “TX-DMA” and “RX-DMA” tab.

Fig. A7-1: With the “Pin Config” Tab individual UART signals are either connected to pins or disabled. When connected with pins additional features of the pin may be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A7-2: The upper section (1) of the “RX/TX” tab shows the clock sources and the corresponding frequencies available to the UART. UART Base Clock frequency is defined in the peripheral configuration window for the “CGU” clock generator. The lower section (2) defines clock source for the UART, the UART transmission mode, the oversampling rate, the UART baud rate, the data length, and the Parity and Stop-Bit setting. It also defines the size of the Input/output buffers.

Fig. A7-3: With the “Control” tab the UART interface is configured for synchronous/asynchronous mode, RTS/CTR flow control or IRDA / LIN transmission Mode.

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Fig. A7-4: With the “Interrupt” tab the individual UART interrupts are enabled / disabled. For the UART examples applications using interrupts, the RX_READY and the TX_READY interrupts both need to be enabled.

Fig. A7-5: With the “FIFO” tab the features of the UART FIFO are configured. For the UART examples applications the FIFO may either be enabled or disabled.

Fig. A7-6: Fig. A7-8: With the “TX-DMA” tab and the “RX-DMA” tab the features of the two UART specific DMA controllers are configured. For the UART examples applications using DMA the TX-DMA, the RX-DMA and the DMA Interrupts must all be enabled.

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A8) SPI Configuration

The Peripheral Configuration Window for the SPI interfaces provides the “Pin Config” tab, the “RX/TX” tab, the “Control” tab, the “Interrupt” tab, the “FIFO” tab and the “TX-DMA” and “RX-DMA” tab.

Fig. A8-1: With the “Pin Config” Tab individual SPI signals are either connected to pins or disabled. When connected with pins features of the pin may be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A8-2: The upper section (1) of the “RX/TX” tab shows the clock source and its frequency available to the SPI. The SPI Base Clock frequency is defined in the peripheral configuration window for the “CGU” clock generator. The lower section (2) defines the SPI baud rate, the SPI data length, the LSB/MSB first transmission mode, the clock phase and clock polarity. It also defines the size of the Input/output buffers.

Fig. A8-3: With the “Control” tab the SPI delay options and SSEL[0:3] polarity and transmit slave select options are configured.

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Fig. A8-4: With the “Interrupt” tab the individual SPI interrupts are enabled / disabled. For the SPI example applications using interrupts, the “Interrupt on Receive Data available” and the “Interrupt on Transmit Buffer Empty” both need to be enabled.

Fig. A8-5: With the “FIFO” tab the features of the SPI RX/TX FIFO are configured. For the UART example applications the FIFO may either be enabled or disabled.

Fig. A8-6: Fig. A8-7: With the “TX-DMA” tab and the “RX-DMA” tab the features of the two SPI specific DMA controllers are configured. For the SPI example applications using DMA the TX-DMA, the RX-DMA and the DMA Interrupts must all be enabled.

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A9) I2C Configuration

The Peripheral Configuration Window for the I2C interfaces provides the “Pin Config” tab, the “RX/TX” tab, the “Master” and “Slave” tabs, the “Interrupt” tab, and the “TX-DMA” and “RX-DMA” tabs.

Fig. A9-1: With the “Pin Config” Tab individual I2C signals are either connected to pins or disabled. When connected with pins features of the pin may also be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A9-2: The upper section (1) of the “RX/TX” tab shows the clock source and the frequency available to the I2C. The I2C Function Clock frequency is configured in the peripheral configuration window for the “CGU” clock generator. The lower section (2) defines the I2C Function Clock, the SCL Low Time and the SCL High time for I2C Master Function. It also defines the size of the Input/output buffers.

Fig. A9-3: With the “Master” tab the I2C interface may be configured for master mode and the DMA and the Monitor functions may be enabled or disabled. Also the Time-Out settings, the Clock Stretching and the High-Speed mode are configured.

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Fig. A9-4: With the “Slave” tab the I2C interface slave options and slave addresses [0:3] are configured.

Fig. A9-5: With the “Interrupt” tab the individual I2C interrupts are enabled or disabled. For the I2C example applications using interrupts, the “Interrupt on Master Pending” and the “Interrupt on Slave Pending” both need to be enabled.

Fig. A9-6: Fig. A9-7: With the “Master-DMA” tab and the “Slave-DMA” tabs the features of the two I2C specific DMA controllers are configured. For the I2C example applications using DMA the Master-DMA and the Slave-DMA Interrupts must both be enabled.

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A10) I2S Configuration

The Peripheral Configuration Windows for the I2S interfaces provides a “RX/TX” tab, a “Control” and a “FIFO” tab and a “TX/RX DMA” tab.

Fig. A10-1: With the “Pin Config” Tab individual I2S signals may either be connected with pins or disabled. When connected with pins features of the pin may also be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A10-2: The upper section (1) of the “RX/TX” tab shows the clock source and the frequency available to the I2S. The I2S Function Clock frequencies are configured in the peripheral configuration window for the “CGU” clock generator. The lower section (2) defines the I2S Function, the I2S Clock Source, the I2S Master / Slave configuration and the I2S TX/RX data rate. It also defines the size of the Input/output buffers.

Fig. A10-3: With the “Control” tab the I2S interface Operating Mode, location of the data within the frame and the SCK and WS Polarity is configured.

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Fig. A10-4: With the “FIFO” tab the features of the I2S RX/TX FIFO are configured. For the I2S example applications the FIFO may either be enabled.

Fig. A10-5: With the “TX/RX-DMA” tab the features of the I2S specific DMA controllers are configured. For the I2S example applications using DMA the TX/RX-DMA configuration and the TX/RX-DMA Interrupts must both be enabled.

A11) ADC Configuration

The Peripheral Configuration Window for the ADC interface provides the “Pin Config” tab, the “Control Register” tab, the “Sequence-A” and “Sequence-B” tabs, the “Threshold” tab, and the “Interrupt Enable” and “RX-DMA” tabs.

Fig. A11-1: With the “Pin Config” tab individual ADC signals are either connected with pins or disabled. When connected with pins features of the pin may also be configured. Refer to 5.1) “Pin Config” Tab for more details.

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Fig. A11-2: The upper section (1) of the “Control Register” tab shows the source and the corresponding frequencies available to the ADC when either configured in synchronous or asynchronous mode. With the lower section (2) of this tab the ADC clock mode, the ADC Clock rate, the ADC resolution and the ADC sample time are configured. It also defines the size of the Input/output buffers.

Fig. A11-3: Fig. A11-4: With the “Sequence-A” and the “Sequence-B” tabs the ADC triggering Sequence A and B are configured. Both trigger sequences are independently configured for an individual trigger source, the trigger polarity and the trigger synchronization. In addition Sequence-A may be configured to be interruptible by Sequence-B.

Fig. A11-5: With the “Threshold” tab the two Threshold Registers 0 and 1 are configured with their corresponding threshold values and the Channels 0 to 11 are assigned to the Threshold Registers.

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Fig. A11-5: With the “Interrupt” tab the individual ADC interrupts are enabled or disabled. For the ADC example applications using interrupts, the “Interrupt on Master Pending” and the “Interrupt on Slave Pending” both need to be enabled.

Fig. A11-6: With the “RX-DMA” tab the features of the two ADC specific DMA controllers are configured. For the ADC example applications using DMA the RX-DMA configuration and the RX-DMA Interrupts must both be enabled.

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A12) SCT Configuration

The Peripheral Configuration Window for the SCT interface provides the “Pin Config” tab, the “SCT0 Configuration Register” tab and the “SCT0 Control Register” tabs.

Fig. A12-1: With the “Pin Config” tab individual SCT signals are either connected with pins or disabled. When connected with pins features of the pin may also be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A12-2: With the “SCT0 Configuration Register” tab the SCT0 configuration registers are configured. This includes the SCT0 counter operation, the Clock Mode, and the Clock Select as well as the Reload option on a match with the lower or upper match register.

Fig. A12-3: With the “SCT0 Control Register” tab the SCT0 Internal clock, the SCT0 counter direction and some parameter settings - which only apply when SCT0 is operating in 16-bit mode - are set.

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A13) TIMER Configuration

The Peripheral Configuration Window for the TIMER interfaces provides the “Pin Config” tab, the “TIMER Control” tab, the “Match Register MR[0:3]” tab and the “Capture Register CR[0:3]” tab.

Fig. A13-1: With the “Pin Config” tab individual TIMER signals are either connected with pins or disabled. When connected with pins features of the pin may also be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A13-2: The upper section (1) of the “TIMER Control” tab shows the clock source and the corresponding frequency available to the TIMER. It also allows configuration of the Timer / Counter Clock Rate. With the lower section (2) of this tab the TIMER Internal clock, the TIMER counter direction and some parameter setting - which only apply when TIMER is operating in 16-bit mode - are set.

Fig. A13-3: With the “Match Register MR[0:3]” tab the default values of the four match registers are configured as well as the interrupt / reset / stop options available with the TIMER.

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Fig. A13-4: With the “Capture Register CR[0:3]” tab the capture and interrupt options for the four TIMER capture registers are configured.

A14) RTC Configuration

The Peripheral Configuration Window for the RTC interface provides the “Pin Config” tab and the “Real-Time Clock” tab.

Fig. A14-1: The “Pin Config” tab shows the RTCIN and RTCOUT signals, which are connected with dedicated pins (No configuration options are available).

Fig. A14-2: Using the “Real-Time Clock“ tab the RTC interrupt may be enabled and the 1Hz and the 1KHz Wake-Up from Deep-Power Down may be configured. Also the ALARM Timer Interrupt Period and the Wake-Up Interrupt Period are defined.

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A15) MRT Configuration

The Peripheral Configuration Window for the MRT interface provides only the “MRT” tab.

Fig. A15-1: The first line (1) of the “MRT” tab shows the clock source and the corresponding frequency available to the MRT. Using the “MRT” tab (2) the Interrupt Period of the four MRT Timer may be defined. Also the Interrupts may be enabled (disabled) and the Interrupt mode be configured (single / repetitive Interrupt).

A16) UTICK Configuration

The Peripheral Configuration Window for the UTICK interface provides only the “µTick Timer” tab.

Fig. A16-1: The first line (1) of the “µTick Timer” tab shows the clock source and the corresponding frequency available to the UTICK. Using the “µTick Timer” tab (2) the Timer Interrupt Period may be defined. Also the Interrupts may be enabled (disabled) and the Interrupt mode be configured (single / repetitive Interrupt).

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A17) WWDT Configuration

The Peripheral Configuration Window for the WWDT interface provides only the “WWDT” tab.

Fig. A17-1: The first line (1) of the “WWDT” tab shows the clock source and the corresponding frequency used to clock the MRT. Using the “WWDT” tab (2) the watchdog timer interrupt period may be defined. Also the “Warning Interrupt Compare Value” and the “Watchdog Timer Window” may be configured as well as several interrupt features be set.

A18) RI-TIMER Configuration

The Peripheral Configuration Window for the RI-TIMER interface provides only the “Repetitive Interrupt Timer” tab.

Fig. A18-1: The first line (1) of the “RI-TIMER” tab shows the clock source and the corresponding frequency used to clock the RI-TIMER. Using lower section of the “Repetitive Interrupt Timer” tab (2) the RI-Timer and the RI-Timer interrupt may be enabled. Two options that take place on a comparison match may be configured as well as the upper 16bit and the lower 32-bit of the 48-bit wide counter compare and compare mask values.

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A19) GINT Configuration

The Peripheral Configuration Window for the GINT interface provides the “GINT Configuration” tab, the two “GINTx[00:31] Interrupt” and “GINTx[32:49] Interrupt” tabs, and the two “GINTx[00:31] Polarity” and “GINTx[32:49] Polarity” tabs.

Fig. A19-1: Using the “GINTx Configuration” tab the GROUPx Interrupts may be enabled and the interrupt combination mode and the interrupt trigger may be configured.

Fig. A19-2: Fig. A19-3: With the “GINTx[00:nn] Interrupt” tabs the groups individual pin interrupts are configured (i.e. be enabled or disabled).

Fig. A19-4: Fig. A19-5: With the “GINTx[00:nn] Polarity” tabs the group individual pin interrupt polarity is configured (i.e. set low active or high active).

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A20) PINT Configuration

The Peripheral Configuration Window for the PINT interface provides the two “PINT Configuration 1” and “PINT Configuration 2” tabs and the “Pattern Match” tab.

Fig. A20-1: Using the “PINT Configuration 1” tab the PINT peripheral may be configured as Pin Interrupt or as Pattern Match Engine. When configured as Pattern Match Engine the PINT configuration is set in the “Pattern Match” tab. When configured as Pin Interrupt Engine the PINTSEL[0:7] Signals are assigned to pins and the corresponding interrupts may be configured (i.e. enabled or disabled)

Fig. A20-2: When configured as Pin Interrupt Engine “PINT Configuration 2” tab is used to configure the PINTSEL[0:7] Interrupt Modes and the PINTSEL[0:7] rising edge and falling edge interrupts (i.e. set as enabled or disabled)

Fig. A20-3: The “Pattern Match” tab is used to configure the Pattern Match Engine of the PINT peripheral. Here the input to Bit-Slice[0:7] are defined and the configuration of Bit-Slice[0:7] are set.

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A21) PMU Configuration

The Peripheral Configuration Window for the PMU interface currently does not provide any configuration tabs.

Fig. A21-1:

A22) BOD Configuration

The Peripheral Configuration Window for the BOD interface provides the “BOD” tab.

Fig. A22-1: The “BOD” tab holds the configuration for the BOD logic of the device. It configures the threshold value for the BOD RESET and enables or disables the BOD RESET. It also configures the threshold value for the BOD Interrupt and enables or disables the BOD Interrupt.

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A23) DMIC Configuration

The Peripheral Configuration Window for the DMIC interface provides a “Pin Config” tab, a “DMIC Common” tab, a “DMIC0 Configuration” and a “DMIC1 Configuration” tab and two “DMIC DMA Configuration” tabs.

Fig. A23-1: Using the “Pin Config” tab individual DMIC0 and DMIC1 signals are either connected with pins or disabled. When connected with pins features of the pin may also be configured. Refer to 5.1) “Pin Config” Tab for more details.

Fig. A23-2: With the “DMIC Common” tab the DMIC0 and DMIC1 interfaces and the HW-VAD and DATA interrupts may be enabled or disabled. Features of the peripheral Interface are configured as well as the features of the HW-VAD.

Fig. A23-3: Using the “DMIC0 Configuration” and the “DMIC1 Configuration” tab the features of the two DMIC channels are configured. This includes the DMIC Oversampling rate, the Clock Pre-divider ratio and the Pre-Emphasis Filter coefficients and the Receive buffer size.

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Fig. A23-4: With the “DMIC0 DMA” and the “DMIC1 DMA” tab the features of the two DMIC specific DMA controllers are configured. For the DMIC example applications using DMA the DMIC0 DMA configuration must be enabled.

A24) TSense Configuration

The Peripheral Configuration Window for the TSense interface provides the “Temperature Sensor” tab.

Fig. A24-1: Using the “Temperature Sensor” tab the on-chip temperature sensor may either be enabled or disabled.

A25) SCI Configuration

The Peripheral Configuration Window for the SCI interface provides a “RX/TX” tab, a “Control” and two “SCI DMA Configuration” tabs.

Fig. A25-1: The upper section (1) of the “RX/TX” tab shows the clock source and the frequency available to the SCI. The Main Clock Frequency is configured in the configuration window for the “CGU” clock generator.

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The lower section (2) defines the I2C Data Format and data rate. It also defines the size of the Input/output buffers.

Fig. A25-2: With the “Control” tab the SCI Interrupts and the FIFO trigger levels are configured, and some protocol options are selected.

Fig. A25-3: Fig. A25-4:

With the “TX-DMA” tab and the “RX-DMA” tabs the features of the two SCI specific DMA controllers are configured. For the SCI example applications using DMA the TX-DMA and the RX-DMA Interrupts must both be enabled.

A26) DAC Configuration

The Peripheral Configuration Window for the DAC interface provides the “DAC Control” and the “TX-DMA” Configuration tabs.

Fig. A26-1: The upper section (1) of the “DAC Control” tab shows the input clock frequency available to the DAC. The DAC input clock is configured in one of the configuration window for the “CGU” clock generator. The lower section (2) defines the DAC settling time and the DAC conversion Rate. It also defines the size of the Input/output buffers.

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Fig.A26-2: With the “TX-DMA” tab the features of the DAC specific DMA controller is configured. For the DAC example applications using DMA the TX-DMA configuration and the TX-DMA Interrupts must both be enabled.

A27) CAP-Touch Configuration

The Peripheral Configuration Window for the CAP-Touch interface provides the “CAP-Touch Control” Configuration tab.

- To be defined -

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Appendix-B) Revision History

Sept.15th.2017: Rev.3.5

Updated with new LPC11E6x, LPC11U6x, LPC5460x, LPC84x and devices Jun.24th.2017: Rev.3.4.1

Bug-Fix Version (UART3 on LPC11E6x was missing) Feb.8th.2017: Rev.3.4

Additional demo applications for LPC8xx and LPC541xx devices Updated with new LPC5460x devices Additional functions to configure the peripherals of the MCU

Oct.8th.2016: Rev.3.3

Additional demo applications for LPC8xx and LPC541xx devices Updated with new LPC83x and LPC436x devices Additional functions to configure the peripherals of the MCU

Jun.25th.2016: Rev.3.2

New features to configure and generate demo application Updated with new LPC5411x devices Functions added to configure the peripherals of the MCU

Sept.2nd.2015: Rev.3.1

New feature to generate Pin-Reference File Updated with new LPC5410x devices Functions added to configure the Clock Generation Unit (CGU) of the MCU

Mar.8th.2015: Rev.3.0

Update with new LPC1000 and LPC4000 devices Added Support for the LPCOpen Software Package Added Support for CMSIS compliant Startup Code

Apr.18th.2014: Rev.2.40

Update with new LPC1000 and LPC4000 devices Dez.28th.2012: Rev.2.30

Support for new LPC1000 and LPC40xx devices Aug.18th.2012: Rev.2.20

Support for new LPC1000 devices Feature to generate Schematic Symbols for CADSOFT Eagle V6.3 Added Feature to generate Project for IAR Workbench (EWARM) Added Feature to generate Project for Keil µVision4

Mai.09th.2012: Rev.2.01

Fixed bug with of a missing reference to the file ‘VSFLEX3.OCX’ Version 3. April.15th.2012: Rev.2.0

Support for new LPC1000, LPC1700, LPC1800 and LPC4300 devices New Feature to generate Schematic Symbols for ALTIUM Designer

Nov.04th.2011: Rev.1.1

Bug-Fix Version to resolve minor issues. Oct.23rd.2011: Rev.1.0

Initial Version of LPCXpert Supported Code generation for LPC18xx and LPC43xx Devices only

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© 2017: Peter Furtner The author assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. The authors reserve the right to make changes in the software without notification. The authors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

If you have Questions, Comments or Recommendations on this tool, please feel free to contact me under:

Dipl.-Ing. Peter Furtner Rosenheimer Str. 20

83064 Raubling Germany

Email: Peter@lpcxpert.com