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  • 8/11/2019 Pll Examples

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    Other Effects in PLLs

    Behzad Razavi

    Electrical Engineering DepartmentUniversity of California, Los Angeles

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    2

    Example of Up and Down Skew and Width Mismatch

    Approximating the pulses on the control line by impulses, determine themagnitude of the resulting sidebands at the output of the VCO.

    Sidebands at fc n f

    inare scaled down by a factor of n.

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    3

    Circuit Techniques to Deal with Channel Length

    Modulation: Use of a Servo Loop

    A0

    need not provide a fast response

    Performance limited by random mismatches between NMOS current sources

    and between PMOS current sources.

    Op amp must operate with a nearly rail-to-rail input common-mode range.

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    Gate Switching

    Voltage headroom saved

    But exacerbates the problem of Up and Down arrival mismatch.

    Op amp must operate with a wide input voltage range.

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    5

    Another Example that Cancels Both Random and

    Deterministic Mismatches

    The accuracy of the circuit is ultimately limited by the charge injection and

    clock feedthrough mismatch between M1

    and M5

    and between M2

    and M6

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    6

    Puzzle

    Solution:

    The phase offset of a CPPLL varies with the output frequency. Explain why.

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    7

    Example of Divider Response to FM Sidebands

    The control voltage of a VCO experiences a small sinusoidal ripple of amplitudeV

    mat a frequency equal to

    in. Plot the output spectra of the VCO and the divider.

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    8

    Closed-Loop Freq. Response

    Solution:

    Plot the magnitude of the closed-loop transfer function as a function of if = 1

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    9

    Example of Multiplying PLL with FM Input

    The input to a multiplying PLL is a sinusoid with two small close-in FMsidebands, i.e., the modulation frequency is relatively low. Determine the output

    spectrum of the PLL.

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    10

    Example of Topology to Reject Supply Noise

    Solution:

    Consider the two filter/VCO topologies shown in figure below and explain whichone is preferable with respect to supply noise.

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    Alternative Second-Order Loop Filter

    The ripple at nodeXmay be large but it is suppressed as it travels through the

    low-pass filter consisting of R2

    and C2

    (R2C

    2)-1 must remain 5 to 10 times higher than

    zso as to yield a reasonable

    phase margin.

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    12

    Puzzle

    Solution:

    A PLL having a reference frequency of fREFand a divide ratio of Nexhibitsreference sidebands at the output that are 60 dB below the carrier. If the reference

    frequency is doubled and the divide ratio is halved (so that the output frequency

    is unchanged), what happens to the reference sidebands? Assume the CP

    nonidealities are constant and the time during which the CP is on remains much

    shorter than TREF

    = 1/fREF

    .

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    13

    Phase Noise in PLLs: VCO Phase Noise

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    14

    Another Example of VCO Phase Noise()

    Consider a PLL with a feedback divide ratio ofN

    . Compare the phase noisebehavior of this case with that of a dividerless loop. Assume the output frequency

    is unchanged.

    Redrawing the loop above as shown below on the left, we recognize that the feedback is

    now weaker by a factor of N. The transfer function still applies, but both and n are

    reduced by a factor of .

    What happens to the magnitude plot? We make two observations. (1) To maintain the same

    transient behavior, must be constant; e.g., the charge pump current must be scaled up by

    a factor of N. Thus, the poles given by previous equation simply decrease by factor of .

    (2)For s 0,out

    /VCO

    s2/n

    2, which is a factor of Nhigher than that of the dividerless loop.

    The magnitude of the transfer function thus appears as depicted below on the right.

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    VCO Phase Noise: White Noise and Flicker Noise

    low offset frequencies high offset frequencies

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    Shaped VCO Noise Summary

    The overall PLL output phase noise is equal to the sum of SA

    and SB

    The actual shape depends on two factors:

    (1) the intersection frequency of /3and /2

    (2) the value of n

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    Reference Phase Noise: the Overall Behavior

    Crystal oscillators providing the reference typically display a flatphase noise

    profile beyond an offset of a few kilohertz

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    19

    Reference Phase Noise: Two Observations

    PLLs performing frequency multiplication amplify the low-frequency

    reference phase noise proportionally.

    The total phase noise at the output increases with the loop bandwidth

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    Loop Bandwidth


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