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REVISIONSLTR. ECN DESCRIPTION DATE APPROVED
- NA Original release 04/01/23
8/1/2005 3.2.2.5.4.1 corrected
SHEET REVISION STATUS
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CONTROLLED DIST. LIST1 16 ANTARCTIC ASTRONOMY AND ASTROPHYSICS2 17 RESEARCH INSTITUTE3 18 THE UNIVERSITY OF WISCONSIN - MADISON, WISCONSIN4 19 TITLE
5 20 ICECUBE6 21 PMT HIGH VOLTAGE CONTROL BOARD7 22 SPECIFICATION CONTROL DRAWING
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8 23 ORIGINATOR DATE ENGINEER DATE CHECKER DATE
9 24
10 25 LEVEL 2/LEAD DATE PRODUCT ASSURANCE DATE PROJECT APPROVAL DATE
11 26
12 27 FILENAME PROJECT NO.
13 28 9400-0027-SCD.050801.doc 900014 29 DRAWING NO. SCALE SIZE SHEET
15 30 9400-0027-SCD NA A Page 1 of 44
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Contents
1 INTRODUCTION 41.1 Purpose 41.2 Scope 41.3 Responsibility and Records 4
1.3.1 Document Responsibility 41.3.2 Document and Verification Records 4
1.4 Item’s Function in the IceCube System 5
2 APPLICABLE DOCUMENTS 62.1 Project Requirements 62.2 Reference Documents 62.3 Order of Precedence 6
3 REQUIREMENTS 83.1 Item Identification 8
3.1.1 Definition 83.1.2 Functional Description 83.1.3 Functional External Interfaces 83.1.4 Schematic Diagram 9
3.2 Performance Requirements 103.2.1 Functional Requirements 103.2.2 Electrical Requirements 103.2.3 Mechanical Requirements 153.2.4 External Interface Requirements 173.2.5 Environmental Requirements 303.2.6 Storage Requirements 31
3.3 Design and Construction Requirements 323.3.1 Electrical and Electronic Parts 323.3.2 High Voltage Generator 323.3.3 Printed Circuit Board 323.3.4 Board Assembly 333.3.5 Restricted Parts, Materials, and Processes 333.3.6 Reliability 343.3.7 Quality 34
4 VERIFICATION 364.1 Responsibility 364.2 Special Tests and Examinations 364.3 Requirement vs. Verification Cross Reference with Section 3 36
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5 PREPARATION FOR DELIVERY 375.1 Identification—Part Number and Serial Number 375.2 Final Visual Inspection 375.3 Packaging and Shipping 37
6 DEFINITIONS 386.1 IceCube Acronyms 386.2 IceCube Glossary 41
7 APPENDIX 42
Figures
Figure 1 Functional Block Diagram 9Figure 2 HV Control Board Envelope 15Figure 3 HV Control Board PCB Dimensions 16Figure 4 High voltage output cable end preparation requirement 26Figure 5 Interface Cable Attachment 28
Tables
Table 1 Voltage and Current Specification for Digital Signals 18Table 2 Timing Specification 18Table 3 Digital Interface Signals 19Table 4 Digital Interface Devices 19Table 5 Interface Signal Multiplexing 20Table 6 Device Addressing Scheme 20Table 7 POWER_ON 20Table 8 HV_DISABLE 21Table 9 IDENT Device Electrical Characteristics 21Table 10 IDENT Data Format 22Table 11 Ribbon Cable Connector Pin Assignment 29
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1 INTRODUCTION
1.1 PurposeThis IceCube Specification Control Drawing (SCD) specifies the performance, fabrication, verification, and production acceptance requirements for the PMT High Voltage Control Board used on the IceCube PMT Modular High Voltage Power Supply.
1.2 ScopeThis Specification Control Drawing shall be applicable to the design, development, integration, verification, production, validation, logistics, field deployment and disposal of the PMT High Voltage Control Board.
1.3 Responsibility and Records
1.3.1 Document ResponsibilityThe IceCube Project of the Antarctic Astronomy and Astrophysics Research Institute (AAAIR) at the University of Wisconsin – Madison (UW) is responsible for writing and updating these requirements to ensure they are correct, complete and current. UW AAARI Quality Assurance is responsible for ensuring this document and changes to it are properly reviewed, approved and maintained.
1.3.2 Document and Verification RecordsRecords of this document and associated verification and qualification records shall be maintained as follows:
a. The approved and signed original of this document shall be maintained per UW AAARI 9000-0004, Document Management Process.
b. Changes to this document shall be via Engineering Change Notices (ECNs) as described in UW AAARI 9000-0004, Document Management Process.
c. Verification records shall be maintained as described in Section 4 of this document in compliance with UW AAARI 9000-0003, IceCube Quality Plan.
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1.4 Item’s Function in the IceCube SystemThe IceCube Neutrino Observatory System at the South Pole requires high voltage for one Photomultiplier Tube (PMT) in each of its Digital Optical Module (DOM) sensors. The PMT High Voltage Control Board is one of two subassemblies of the PMT Modular High Voltage (HV) Power Supply. The adjustable-output PMT HV Power Supply creates and supplies approximately 2000 volts maximum anode bias and multiple dynode bias voltages to the PMT inside each DOM sensor. The PMT HV Control Board creates and controls this high voltage in accordance with digital commands from the DOM Main Board. For instance the PMT HV Control Board may adjust its output high voltage to obtain different PMT photon sensitivities. The PMT HV Control Board also measures and reports the value of the output high voltage. The output high voltage is delivered to the PMT HV Base Board where it is applied to the anode for signal extraction and proportionately distributed to the PMT electrodes. There are 5120 Digital Optical Modules in the IceCube system, each containing a PMT HV Control Board in a PMT Modular HV Power Supply. The IceCube system has 4800 DOMs deployed over a kilometer deep in the Antarctic ice with 320 additional DOMs installed on the ice surface, all used for scientific research.
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2 APPLICABLE DOCUMENTSThe following documents of the exact issue shown are applicable requirements for this Configuration Item only to the extent they are invoked by specific requirements herein.
2.1 Project Requirementsa. PMT Modular HV Power Supply Engineering Requirements Document, 9400-0016-
ERD
b. PMT HV Generator Source Control Drawing, 9400-0068-SCD (Rev -)
c. PMT HV Base Board Specification Control Drawing, 9400-0028-SCD
d. PMT HV Power Supply Interface Control Document, 9400-0016-ICD
e. PMT HV Control Board Schematic, 9400-0027-SCH (Rev A)
f. PMT HV Control Board Ribbon Cable Assembly Drawing, 9400-0022-DWG (Rev -)
g. PMT HV Control Board Fabrication Drawing, 9400-0027-DWG2 (Rev A)
h. PMT HV Control Board Assembly Drawing, 9400-0027-DWG (Rev A)
i. PMT HV Control Board Functional Test Setup and Procedure, 9400-0027-TEST (Rev A)
2.2 Reference Documentsa. JESD8-B, “Interface Standard for Nominal 3 V/3.3 V Supply Digital Integrated
Circuits”, JEDEC Solid State Technology Association, September 1999.
b. IPC-2221, §6.3 Electrical Clearance, “B-4 External Conductors with Permanent Polymer Coating”
c. “Book of iButton Standards”, Dallas Semiconductor Corporation, Application Notes Number 937, January, 2002.
d. MIL-HDBK-217F (N1/2) “Parts Stress and Analysis method”
e. IPC-A-600F “Acceptability of Printed Boards”
f. IPC-6012 “Qualification and Performance Specification for Rigid Printed Boards”
g. IPC-A-610C “Acceptability of Electronic Assemblies”
h. MIL-B-81705 “Barrier Materials, Flexible, Electrostatic-Free, Heat Sealable”
2.3 Order of Precedencea. Conflicts within this document shall be resolved as directed by the IceCube System
Engineer in collaboration with the Project Lead responsible for this Design Item.
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b. Conflicts between other documents as they relate to or impact this document shall be resolved as directed by the IceCube Project Manager in collaboration with the IceCube System Engineer.
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3 REQUIREMENTS
3.1 Item Identification
3.1.1 DefinitionThe PMT High Voltage Control Board (HV Control Board) is a printed circuit board (PCB) assembly, containing the High Voltage Generator module, power inputs, control logic, output voltage control, and digital interface circuitry, and, together with the PMT HV Base Board, constitutes the PMT Modular High Voltage Power Supply. The HV Control Board is mechanically mounted as a daughter board to the DOM Flasher Board and is electrically connected to the PMT HV Base Board via a high-voltage cable and to the DOM Main Board via a digital interface cable. No electrical connection, including grounds, is present between the HV Control Board and the DOM Flasher Board.
3.1.2 Functional DescriptionThe HV Control Board derives all the power from the DOM Main Board and generates a high voltage in the range of approximately 1000 to 2100 VDC and supplies it to the PMT HV Base Board, where the high voltage potential is divided and distributed to the individual electrodes of the PMT (Figure 1). The digital interface circuitry supports the following commands issued by the DOM Main Board:
a. Adjust the HV Generator output voltage
b. Report the HV Generator’s voltage monitor output value
c. Report the digital serial number uniquely identifying each individual HV Control Board
d. Respond to power supply power ON/OFF commands
e. Respond to high voltage output ENABLE/DISABLE commands
f. The digital interface circuitry providing the above functions may be either internal or external to the HV Generator either in part or as a whole.
All the power for the HV Generator and the digital interface circuitry is provided by the DOM Main Board.
3.1.3 Functional External InterfacesThe HV Control Board has four external functional interfaces:
a. Power input from the DOM Main Board
b. Bidirectional digital control and data from/to the DOM Main Board
c. High voltage output to the PMT HV Base Board
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d. Structural mount to the Flasher BoardThese interfaces are illustrated in Figure 1.
3.1.4 Schematic DiagramRefer to the IceCube document # 9400-0027-SCH.
HV Generator
Digital Interface
HV ControlBoard
PMT HV Base Board
PMT Modular High Voltage Power Supply
High Voltage
DOM Main Board PMT
StructualMount
PMT Anode SignalDigital Control& Response
Flasher Board
Power
. . . . .
Dynode VoltagesStructual Mount
Figure 1 Functional Block Diagram
3.2 Performance Requirements
3.2.1 Functional Requirements
3.2.1.1 High Voltage Generation
The HV Control Board shall generate an adjustable high voltage output for the PMT HV Base Board, using the power provided by the DOM Main Board.
3.2.1.2 Digital Command Response
The HV Control Board shall respond to the following digital control commands issued by the DOM Main Board:
a. ON/OFF command for switching the primary power of the entire HV Control Board
b. ENABLE/DISABLE command for enabling or disabling the high voltage output
c. Serial DAC code for setting the High Voltage output value
3.2.1.3 Digital Output
The HV Control Board shall provide the following digital output to the DOM Main Board:
a. Serial ADC code representing the High Voltage Monitor Output value
b. Serial digital code uniquely identifying the individual HV Control Board
3.2.2 Electrical Requirements
3.2.2.1 Input Voltage
3.2.2.1.1 +5 Volts DC
The HV Control Board shall receive a power input voltage of +5 VDC ±5%.
3.2.2.1.2 –5 Volts DC
The HV Control Board shall receive a power input voltage of -5 VDC ±5%.
3.2.2.2 Input Current
3.2.2.2.1 +5 Volts Input Current
The HV Control Board input current for +5 Volt power shall not exceed 70 mA.
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3.2.2.2.2 –5 Volts Input Current
The HV Control Board input current for 5 Volt power shall not exceed 30 mA.
3.2.2.3 Input Power
The total input power to the PMT HV Control Board shall not exceed 350 mW.
Note The HV Generator shall receive power from the +5V source alone and consume no more than 300mW (Sec 3.2.2.1.1, 9400-0068-SCD.041119).
3.2.2.4 Internal Grounds
3.2.2.4.1 Analog Ground
a. The analog signal ground on the HV Control Board shall be referenced by the HV Generator and by the appropriate analog ground pin(s) of the DAC, the ADC, and, if present, the voltage reference device.
b. The shielding case of the HV Generator shall be connected to the analog ground.
c. The analog ground shall be connected to the DOM Main Board interface connector pin(s) designated as DGND at a single point.
3.2.2.4.2 Digital Ground
Digital Ground and Power Ground shall be one on the PCB and shall refer to the net designated as DGND on the DOM Main Board interface connector.
3.2.2.4.3 RF Ground
The HV Control Board shall use the Power Ground as the RF ground.
3.2.2.4.4 Power Ground
Power Ground and Digital Ground shall be one on the PCB and shall refer to the net designated as DGND on the DOM Main Board interface connector.
3.2.2.5 High Voltage Generation
3.2.2.5.1 Power ON/OFF Transients
There shall be no HV output upon power up of the HV Control Board.
3.2.2.5.2 High Voltage Enable/Disable
a. The HV output shall reach within 10% of the target value in less than 5 seconds after receiving a HV enable command under a resistive load of 130 M ± 5%.
b. The HV output shall reach below 10% of the initial value in less than 5 seconds after receiving a HV disable command under a resistive load of 130 M ± 5%.
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Note “Disable” means disabling the high voltage generation circuitry, such as the oscillator, while the rest of the HV Control Board is powered.
3.2.2.5.3 HV Adjustment
3.2.2.5.3.1 Voltage Adjustment Range
The HV Control Board high voltage output shall be adjustable over a minimum range of 1000 to 2047 VDC when measured using a resistive load of 130 M ± 5%.
3.2.2.5.3.2 Minimum Adjustable Voltage
The low-end of the adjustable high voltage range of the HV Control Board shall be higher than –5 VDC when measured using a resistive load of 130 M ± 5%.
3.2.2.5.3.3 Maximum Adjustable Voltage
The high-end of the adjustable high voltage range of the HV Control Board shall be less than 2100 VDC when measured using a resistive load of 130 M ± 5%.
Note The above three paragraphs mean that the adjustment range shall be from Vmin to Vmax, where 5V < Vmin <1000 and 2047V < Vmax < 2100V.
3.2.2.5.3.4 Voltage Adjustment Resolution
The HV Control Board shall use a 12-bit resolution DAC for digitally setting the value of the high voltage output.
3.2.2.5.3.5 Voltage Adjustment Linearity
The HV Control Board high voltage output and the corresponding digital command code shall have a linear relationship over the specified adjustment voltage range(3.2.2.5.3) with a slope of 0.5 ± 0.003 V per bit when measured using a resistive load of 130 M ± 5%.
Note The HV Generator has the slope accuracy of ±0.5% over 20 to 100% of full scale (Sec. 3.2.2.5.3, 9400-0068-SCD). The DAC contributes ±0.1% off error (±4 LSB integral linearity error).
3.2.2.5.4 High Voltage Quality
3.2.2.5.4.1 Voltage Stability (Absolute bound around set point) [TBR]
a. The high voltage output of the HV Control Board shall not deviate from the set point by more than 0.2% over any eight-hour period, once the output value has reached within this range of the set point, under a stable operating temperature.
b. The high voltage output of the HV Control Board shall not change from the set point at a rate any faster than 0.2% per hour.
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Note The stability value has been derived by adding the HV Generator’s contribution of 0.02% (Sec 3.2.2.4.2, 9400-0068-SCD.041119) and the estimated worst-case drift of the programming voltage, i.e., the DAC output. The on-chip voltage reference used by the DAC, LT1257, has specification values of a line regulation of ±0.7LSB/V and a temperature drift of ±0.06 LSB/°C. The expected maximum line voltage variation is 0.25V (see 3.2.2.1). If we allow the DOM’s internal temperature to vary by as much as ±2 °C per hour for the worst-case estimate, we obtain the DAC voltage variations of 0.295 LSB. For the nominal HV output voltage of 1500V, this corresponds to 0.1% of the programming voltage variations. Thus the total of 0.12% is expected (rounded up to 0.2%).
3.2.2.5.4.2 Voltage Ripple (Noise)
The HV Control Board high voltage output ripple voltage, originating from the HV Generator, shall be less than 5 mVpp when measured with a resistive load of 130 M ± 5%.
Note Laboratory measurements show that far greater ripple amplitudes are acceptable in order to meet the requirement for the PMT Modular HV Power Supply ERD, which specifies the ripples to be less than 0.5mVpp when measured at the end of the resistively-terminated pulse-output cable.
3.2.2.6 High Voltage Monitoring
3.2.2.6.1 Voltage Monitoring Output
The HV Control Board shall allow monitoring of the high voltage output using an ADC.
3.2.2.6.2 Voltage Monitoring ADC Resolution
The HV Control Board shall use a 12-bit resolution ADC for monitoring the value of the high voltage output.
3.2.2.6.3 Voltage Monitoring Linearity
The HV Control Board high voltage output being monitored and the corresponding digital value shall have a linear relationship over the adjustable range (3.2.2.5.3) with a slope of 0.5 ± 0.0005 V per bit when measured using a resistive load of 130 M ± 5%.
Note HV value [V] = slope × Digital value [decimal]. The slope error is dominated by the HV Generator’s monitor output.
3.2.2.6.4 Voltage Monitoring Accuracy
The HV Control Board’s high voltage output value being monitored shall be within ±1% of the true value.
Note Voltage monitoring accuracy of the HV Generator is better than ±1% (9400-0068-SCD.041119). The uncertainties added by the12-bit resolution ADC is 0.05% (±2 LSB over full scale) is negligible.
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3.2.2.7 Current Sourcing Capability
3.2.2.7.1 Current Sourcing at Minimum Operating Temperature
The HV Control Board shall provide a DC current sourcing capability of a minimum of 12 nA at the minimum operating temperature specified herein, as determined by the output voltage changing less than 10V when the current is varied from zero to the specified minimum current.
3.2.2.7.2 Current Sourcing at Maximum Operating Temperature
The HV Control Board shall provide a DC current sourcing capability of a minimum of 240 nA at the maximum operating temperature specified herein, as determined by the output voltage changing less than 10V when the current is varied from zero to the specified minimum current.
3.2.2.7.3 Pulsed Current Sourcing [TBR]
The HV Control Board shall provide a pulse current sourcing capability of a minimum of 60 mA over 1 sec with a duty-ratio of less 10-6 [TBR], at the minimum operating temperature specified herein, as determined by the output voltage changing less than 10V when the current is changed from zero to the specified pulse current during the pulse time.
Note This requirement is not being met since the current sourcing capability required of the HV Generator is only 30 A. The draft ERD for HV Control Board + HV Base Board calls for 100mA over 1 s. There are conflicting maximum pulse-droop requirements for the PMT Base and for the DOM. The DOM DV document (9000-0008-PLN, 3/31/2004) calls for less than a 5% droop over 5 s.
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3.2.3 Mechanical Requirements
3.2.3.1 Overall Size and Volume Constraints
a. The maximum height of the components on the bottom side of the HV Control Board shall be no greater than 16 mm.
b. The maximum height of the components on the top side of the HV Control Board shall be 22 mm minus the printed circuit board thickness (1.6mm typical).
c. All the components on the HV Control Board shall be wholly contained within the component envelope, defined in Figure 2, except for:
Interface ribbon cable
HV output cable
Stand-offs for mounting the HV Control Board to the next higher assembly (The stand-offs are not part of the HV Control Board).
d. The lateral extent of the HV Control Board, defined by the “Component Side View” in Figure 2, shall be as specified in 3.2.3.2 PCB Dimensions.
22
16
4.3
1.6REF
40°
Units: mm
(Component Side View)
Figure 2 HV Control Board Envelope
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3.2.3.2 PCB Dimensions
The overall shape of the printed circuit board of the PMT HV Control Board shall be as shown in Figure 3, where the dimensions are for the maximum extent of the board outline, corresponding to the “Component Side View” in Figure 2.
a. The maximum board outline dimensions shall be observed in design to within ±0.5 mm.
b. The relative locations of the three mounting holes shall be observed in design to within ±0.5 mm. [TBR]
c. The ribbon connector mounting location, relative to the mounting holes, shall be observed in design to within ±1 mm.
50.09
85.56
59.35
87.70
95.81
18.21
25.22
99 REF
R105
R56.08
39.24
42.96
45.70
7.5 REF
PIN #1LOCATION
3 X 3 BOARDMOUNTING HOLES
UNITS: MM
APPROX. AREAFOR HV OUTPUTCABLE ATTACH
RIBBONCONNECTOR ONTOP SIDE
COMPONENT SIDE VIEW
Figure 3 HV Control Board PCB Dimensions
3.2.3.3 Weight
The fully assembled HV Control Board shall weigh no greater than 100 grams.
Note The actual unit in use (PY3) weighs approximately 85 grams.
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3.2.4 External Interface Requirements
3.2.4.1 Electric Power
The HV Control Board shall receive all of its electric power from the DOM Main Board through the conductors in the DOM Main Board-to-HV Control Board interface cable.
3.2.4.2 Grounding
The multiple common/shared return conductors in the ribbon cable between the HV Control Board and the DOM Main Board shall be used for the following grounding:
1. Power ground
2. External digital signal ground
3. External RF and EMIC ground
4. External high energy ground
5. Safety ground
3.2.4.3 Analog Signals
The HV Control Board shall have a single analog high-voltage output, defined in Section 3.2.1.
3.2.4.4 Special Discrete Signal
The HV Control Board’s serial number shall be read out by the DOM Main Board using the Dallas 1-Wire protocol from the on-board device, referred to as the IDENT device. The IDENT device signal specification is distinct from that of the digital signals; however, it shall share the digital line MISO with the ADC, as shown in Table 5. See Section 3.2.4.5.7.1 for the IDENT signal specification.
3.2.4.5 Digital Signals
3.2.4.5.1 Voltage, Current, and Timing
3.2.4.5.1.1 Applicable Standard(s)
The logic levels and corresponding voltages between the HV Control Board and the DOM Main Board communications shall comply with the specifications in JESD8-B, “Interface Standard for Nominal 3 V/3.3 V Supply Digital Integrated Circuits”, JEDEC Solid State Technology Association, September 1999.
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3.2.4.5.1.2 Voltage and Current Specification [TBR]
The voltage and current specifications for the digital communication between the HV Control Board and the DOM Main Board shall be as shown in Table 1.
Table 1 Voltage and Current Specification for Digital Signals
Parameter Min. Max. Units
Voltage output from HV Control Board
Logic “High” 2 3.3 V
Logic “Low” -0.3 0.8 V
Voltage input to HV Control BoardLogic “High” 2.4 3.6 V
Logic “Low” 0 0.4 V
Current out of HV Control Board - 10 A
Current into HV Control Board - 2 mA
Note 1 The device on the DOM Main Board with which the HV Control Board communicates is a Xilinx CoolRunner II operating with a 3.3V I/O voltage. The device is capable of driving a 3.3V LVTTL input as well (i.e., it can source more than 2 mA into an LVTTL input.)
Note 2 The table summarizes the specifications of JESD8-B, assuming the I/O supply for the CoolRunner II varies over 3.0V to 3.6V and the HV Control Board input sinks a maximum of 2 mA.
Note 3 The voltage and current specifications do not apply to the IDENT signal. For the IDENT signal, the requirements specific to the Dallas 1-Wire protocol shall apply.
3.2.4.5.1.3 Timing Specification [TBR]
The digital interface devices on the HV Control Board shall meet the timing specification in Table 2 in sending and receiving digital signals.
Table 2 Timing Specification
Clock frequency 0.1 - 1 MHz
Clock duty ratio 20 – 80 %
Rise Time for all logic and clock 0.3 - 9.0 ns
Fall Time for all logic and clock 0.8 – 10.5 ns
Note 1 The timing specification here does not apply to the IDENT signal.Note 2 The rise time / fall time values are from “Cool Runner-II I/O Characteristics”, Xilinx
Document No. XAPP382 (v 1.0), November 11, 2002. The value ranges correspond to the load capacitance range of 0 to 100 pF.
Note 3 JESD8-B does not specify timing. A possibly applicable standard for the timing is JEDEC Document No. 13-B, “Standard Specification for Description of ‘B’ Series CMOS Devices”, May 1980; however, the Xilinx datasheet (Note 2) is probably more up-to-date and suites better for the present purpose.
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3.2.4.5.2 Digital Interface Signals
The HV Control Board shall communicate with the DOM Main Board using the digital interface signals identified in Table 3. (“IN” = Input to the HV Control Board.)
Table 3 Digital Interface Signals
Signal Name Direction Description
POWER_ON IN Board power ON (active high)
HV_DISABLE IN HV output disable (active high)
CS0 IN Chip-select bit 0
CS1 IN Chip-select bit 1
SCLK IN Serial clock
MISO IN/OUT Master-In-Slave-Out serial data; or, bi-directional 1-Wire signal (See 3.2.4.5.7)
MOSI IN Master-Out-Slave-In serial data
3.2.4.5.3 Digital Interface Devices
3.2.4.5.3.1 On-Board Interface Devices
The digital interface devices listed in Table 4 shall be present on the HV Control Board.
Table 4 Digital Interface Devices
Device Function Part number
IDENT Provide board serial number
Dallas Semiconductor (Maxim) DS2401 or equivalent
DAC Digital-to-analog conversion for HV output adjustment
Linear Technology LTC1257IS8 or equivalent
ADC Analog-to-digital conversion for HV output monitor
Linear Technology LTC1286IS8 or equivalent
3.2.4.5.3.2 Signal Multiplexing
The interface devices shall share the MISO, MOSI, and SCLK signals, as shown in Table 5.
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Table 5 Interface Signal Multiplexing
Signal Name
Device MISO MOSI SCLK
IDENT data
DAC data clock
ADC data clock
3.2.4.5.4 Device Addressing Scheme
The two “chip-select” signals, CS0 and CS1, are used to select a digital function, as shown in Table 6.
Table 6 Interface Device Addressing Scheme
CS0 CS1 Explanation
1 1 Read from IDENT or write a word to DAC (default )
0 1 Update DAC output on falling edge of CS0
1 0 Operate ADC while CS1 remains low.
0 0 (not allowed)
3.2.4.5.5 POWER_ON
The HV Control Board’s power shall be controlled by the logic state of POWER_ON as shown in Table 7.
Table 7 POWER_ON
Logic Level Function
0 Board power off
1 Board power on
3.2.4.5.6 HV_DISABLE
a. The HV Control Board’s HV output shall be disabled or enabled, according to the logic state of HV_DISABLE, as shown in Table 8.
b. The HV_DISABLE shall remain in logic “0” while POWER_ON is “0” or within 0.5 sec. after POWER_ON becomes “1”.
c. The logic level of HV_DISABLE shall not change more than once per second.Note The requirements (a) and (b) are due to the specification of the HV Generator.
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Table 8 HV_DISABLE
Logic Level Function
0 Enable HV output
1 Disable HV output
Table 9 IDENT Device Electrical Characteristics
Parameter Minimum Maximum Units Notes
VDD_IDENT 2.8 6.0 V 3.3V nominal
VIL_MAX 0.3 0.8 V Logic low input to IDENT
VIH_MIN 2.2 VDD_IDENT + 0.3 V Logic high input to IDENT
VOH_MIN [TBD] 6.0 V 3.3V nominal
VOL_MAX 0.4 V
tRSTL 480 960 s
tRSTH 300 s
tSLOT 60 120 s
tLOW0 60 The smaller of 120 and tSLOT
s
tLOW1 1 15 s
tLOWR 1 15 s
tRD 5 15 tLOWR s
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3.2.4.5.7 Board Serial Number—IDENT
3.2.4.5.7.1 Bus Master Circuit
The DOM Main Board circuit for communicating with IDENT shall be a bi-directional open-drain port.
3.2.4.5.7.2 Required Pull-Up Resistor
The HV Control board shall provide a 5 k pull-up resistor (closest value in 5% or better) between the IDENT device signal line and a DC level VDD_IDENT above DGND.
3.2.4.5.7.3 Data Format
The board serial number that the IDENT device provides shall be a 64 bit binary sequence in the following format:
Table 10 IDENT Data Format
Bit number (LSB = Bit 0, MSB = Bit 63) Value
0 1
1-7 0
8-47 Serial number (48-bit long)
48-63 CRC bits
3.2.4.5.7.4 Device Operation
The board serial number from the IDENT device shall be acquired by the DOM Main Board by the following operating sequence.
Note The details of the signaling protocol are found in “Book of iButton Standards”, Dallas Semiconductor Corporation, Application Notes Number 937, January, 2002.
1. DOMMB resets the IDENT device by pulling the line to below VIL_MAX by sending a “0” for tRSTL and releasing it (become high-impedance state) for tRSTH.
2. DOMMB sends a bit sequence “11001100” (the left-most bit “1” goes out first) to the IDENT device, where:
a. Sending a bit value “0” is accomplished by pulling the line for tLOW0 and releasing it for tSLOT tLOW0.
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b. Sending a bit value “1” is accomplished by pulling the line for tLOW1 and releasing it for tSLOT tLOW1.
3. DOMMB reads the 64-bit serial number LSB first, where:
a. Reading a bit is accomplished by pulling the line for tLOWR, releasing it for tRD, and sampling the line voltage.
b. After reading a bit, the DOMMB side of the line shall remain high-impedance for tSLOT – tLOWR – tRD.
c. A sampled voltage at or above VOH_MIN represents a bit value “1”.
d. A sampled voltage at or below VOL_MAX represents a bit value “0”.
3.2.4.5.8 HV Output Adjustment—DAC
3.2.4.5.8.1 Number Format
The DAC shall use a 12-bit unsigned straight binary encoding with the digital value 000 (hex) representing the DAC output of 0 VDC.
3.2.4.5.8.2 DAC Device Operation
a. The analog output of the DAC shall be updated by the DOM Main Board in the following sequence:
(1) While CS0 = “1” and CS1 = “1”, the 12 data bits are written to the DAC on the rising clock edge starting from MSB, using MOSI and SCLK lines.
(2) CS0 is pulled low momentarily. (The DAC output is updated on the falling edge of CS0.)
b. The HV Control Board shall support the following maximum operating speed parameters of the DAC:
(1) Maximum serial clock frequency = 1.4 MHz
(2) Minimum clock high time = 350 nsec.
(3) Minimum set-up time after the data bit is set to the next rising clock edge = 250 nsec.
(4) Minimum hold time of the data bit after the rising clock edge = 25 nsec.
(5) Minimum wait before CS0 goes low after the last data bit is set = 250 nsec.
(6) Minimum duration in which CS0 remains low = 150 nsec.Note Source: Linear Technology LTC1257 datasheet.
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3.2.4.5.9 HV Output Monitor—ADC
3.2.4.5.9.1 Number Format
The digital output code transmitted by the HV Control Board ADC shall be in 12-bit unsigned straight binary with the digital value 000 (hex) representing 0 VDC.
3.2.4.5.9.2 ADC Device Operation
a. The analog input to the ADC is read out as a 12-bit digital word by the DOM Main Board in the following sequence:
(1) CS1 is pulled low.
(2) The SCLK line is made to go from low to high three times.
(3) The 12 data bits are read out on the rising edge of the clock, starting from MSB, using SCLK and MISO.
(4) CS1 is set high.
b. The HV Control Board shall support the following maximum operating speed parameters of the ADC:
(1) Maximum serial clock frequency = 200 kHz
(2) Minimum clock high time = 2 sec.
(3) Minimum set-up time for the first rising clock edge after CS1 going low = 2 sec.
(4) Minimum wait after the falling clock edge to the data bit read-out = 250 nsec.
Note Source: Linear Technology LTC1286 datasheet
3.2.4.6 Interconnections
3.2.4.6.1 High Voltage Output Cable
3.2.4.6.1.1 Cable Type
The high voltage output cable or wires shall consist of two coaxial conductors, one having the high voltage potential with respect to the HV Control Board Power Ground, and the other being the high voltage return that is referenced to the same ground.
3.2.4.6.1.2 Voltage Rating
The high voltage cable shall be rated at 5000 VDC minimum breakdown over all the operational environments and operational life specified herein.
3.2.4.6.1.3 Minimum Bending Radius
The high voltage cable shall have a minimum bending radius of less than 25 mm over all the operational environments and operational life specified herein.
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3.2.4.6.1.4 Cable Termination
The high voltage cable or wires shall be electrically and mechanically terminated inside the High Voltage Generator module.
3.2.4.6.1.5 Mechanical Integrity
The high voltage cable or wires shall not degrade when the cable or wires are pulled with a maximum of 5 kg of force in any direction from the surface of the HV Control Board.
3.2.4.6.1.6 Cable Exit Location
The high voltage output cable or wires shall exit at the approximate location specified in Figure 3.
3.2.4.6.1.7 Cable Length
The high voltage output cable or wires shall be 265 ± 15 mm long measured from the top surface of the HV Control Board PCB to the end of the insulation.
Note The HV Generator (‘brick’) pigtail cable is 267 ± 13 mm (10.5 ± 0.5 inches) measured from the bottom of the brick to the end of the inner insulation. There is a clearance between the bottom of the brick to the PCB of 1mm. The PCB is approximately 1.6mm thick.
3.2.4.6.1.8 Cable End Preparation
The end of the high voltage cable shall be stripped and tinned as shown in Figure 4.
Note The figure being referenced is a duplicate from 9400-0068-SCD.041119.pdf.
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0.20 max
Shield Insulation
Centerconductor
Jacket
0.05 min
Units: Inches
Center conductor tinnedportion = 0.20 max. from end.
0.375 ± 0.125
0.90 ± 0.20
0.55 ± 0.05
0.20 max
0.050 max
Solder tinned portion
Figure 4 High voltage output cable end preparation requirement
3.2.4.6.2 Digital Interface Cable
3.2.4.6.2.1 Cable Specification
The digital interface cable shall be according to the specification in IceCube document #9400-0022-DWG (Rev -):
a. The digital interface cable shall be a 24-conductor, 1-mm-pitch flat IDC ribbon cable with 28 AWG (7/36) wires [7 strands of 0.127-mm-diameter wire].
b. The HV Control Board side of the cable shall have a solderable male connector, and the DOM Main Board side shall have a female connector. (i.e., the ribbon cable is captive to the HV Control Board.)
c. Correct length of the cable, connector part numbers, and connector orientations shall be according to the document 9400-0022-DWG.
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3.2.4.6.2.2 Attachment to the HV Control Board
The male-connector-side of the interface cable shall be soldered directly to the HV Control Board at the location specified in Figure 3 and in the orientation shown in Figure 5.
3.2.4.6.3 Signal Assignment
The signal assignment to the interface cable conductors is as shown in Table 11.
Note The following requirements are being observed: The interface cable carries digital signals, ground connections, and power connections. Each signal, including power and ground, has at least two conductors allocated for
redundancy.
3.2.4.7 Mounting Points
3.2.4.7.1 Mounting Provisions for Next Higher Assembly
The HV Control Board shall provide holes and clearances for mounting it to the DOM Flasher Board using brass hexagonal stand-offs. The clearance zones shall be concentric with the mounting holes and have a minimum diameter of 9.5 mm. There shall be no copper foil within this diameter.
Note The current design (PY3, PY4) has the clearance circle diameter of ~5mm and the above requirement is not met.
3.2.4.7.2 Mounting Locations
The HV Control Board mounting hole locations shall be as shown in Figure 3.
3.2.4.8 Test Points
Voltage measurement test points shall be provided on the component side of the HV Control Board for measuring all inputs and outputs of the High Voltage Generator (except for the high voltage output, which is to be measured at the end of the output cable).
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PIN #1
PIN #1
ORIENTATION KEY
COMPONENT (TOP) SIDE
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
PIN LAYOUTVIEWED FROM TOP
ORIENTATION KEY
Figure 5 Interface Cable Attachment
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Table 11 Ribbon Cable Connector Pin Assignment
Pin # Signal Name Description
1 DGND Digital and power ground
2 SCLK Serial clock
3 SCLK Serial clock
4 MOSI Master-out-slave-in
5 MOSI Master-out-slave-in
6 MISO Master-in-slave-out
7 MISO Master-in-slave-out
8 DGND Digital and power ground
9 CS0 Chip-select bit 0
10 CS0 Chip-select bit 0
11 CS1 Chip-select bit1
12 CS1 Chip-select bit1
13 POWER_ON Board enable/disable
14 POWER_ON Board enable/disable
15 +5V Main power (+)
16 +5V Main power (+)
17 DGND Digital and power ground
18 DGND Digital and power ground
19 -5V Main power (-)
20 -5V Main power (-)
21 DGND Digital and power ground
22 DGND Digital and power ground
23 HV_DISABLE HV disable
24 HV_DISABLE HV disable
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3.2.5 Environmental Requirements
3.2.5.1 Temperature
3.2.5.1.1 Operating Temperature
The HV Control Board shall meet all performance requirements when operating over an ambient temperature range of –40 °C to +27 °C.
3.2.5.1.2 Non-Operating Temperature
([TBD] Shall be consistent with the DOM-level requirements.)
3.2.5.1.3 Storage/Transport Temperature
The HV Control Board shall withstand the storage and transport temperature in the range of –55 °C to +45 °C for a period of [TBD] months without any degradation in performance.
3.2.5.2 Thermal Shock
([TBD] Shall be consistent with the DOM-level requirements.)
3.2.5.3 Pressure
3.2.5.3.1 Operating Pressure
The HV Control Board shall meet all the performance requirements while operating at 1 atmosphere in air or while operating inside a pressure vessel with a sustained internal Nitrogen gas atmospheric pressure of 40,000 Pa to 100,000 Pa.
3.2.5.3.2 Non-Operating and Storage/Transport Pressure
([TBD] Shall be consistent with the DOM-level requirements.)
3.2.5.4 Mechanical Shock and Vibration
([TBD] Shall be consistent with the DOM-level requirements.)
3.2.5.5 Electromagnetic Interference/Compatibility
([TBD] Shall be consistent with the DOM-level requirements.)
3.2.5.6 Humidity
([TBD] Shall be consistent with the DOM-level requirements.)
3.2.5.7 Radioactivity
([TBD] Shall be consistent with the DOM-level requirements.)
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3.2.6 Storage Requirements([TBD] Shall be consistent with the DOM-level requirements.)
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3.3 Design and Construction Requirements
3.3.1 Electrical and Electronic Partsa. To the extent practical, all electrical and electronic components used for the HV
Control Board shall meet the lowest operating temperature of –55C, as specified by the component manufacturer, where “practical” means that such components are readily available for the operating temperature of –55C or lower.
b. The vendor of the PMT High Voltage Control Board shall supply IceCube with a list of electrical and electronic components used that do not meet the –55C or lower operating temperature.
3.3.2 High Voltage GeneratorThe High Voltage Generator, specified in the IceCube document # 9400-0068-SCD, shall be a self-contained, metal-shielded module requiring only input power and control signals to deliver high voltage via a pigtail output cable. It shall be designed with wire leads for direct solder to the HV Control Board with its insulated high voltage output lead(s) as specified in 3.2.4.6.1 for correct integration into a DOM.
Note The requirement for potting has been deleted.
3.3.3 Printed Circuit Board
3.3.3.1 Applicable Standards
The PMT HV Control Board PCB shall be fabricated and inspected according to the Class 3 rules defined in IPC-A-600F and IPC-6012A.
3.3.3.2 Printed Circuit Board Material
The PMT HV Control Board PCB dielectric board material shall be FR-4 with a nominal thickness of 1.6mm (1/16 inches).
3.3.3.3 Copper Foil Thickness
The PMT HV Control Board PCB shall use the copper foil thickness of 1 oz / ft2 [0.03 g/cm2] for electrical traces and solder pads.
3.3.3.4 Solder Mask
A solder mask shall be applied to both the top and bottom sides of the Printed Circuit Board (PCB) with masked clearance including, but not limited to, the following items:
a. All solder padsb. Through holes for component pins and leadsc. Test points
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d. Designated clear solder pad areas for jumpers, grounding wire, etc.
3.3.3.5 Silk Screen Marking
Silk screen markings shall include, but not be limited to, the following items:
a. Supplier identifierb. IceCube Project identifier (“IceCube”)c. Part number and revision number (“HV Control Board”)d. Component reference designatorse. Connector reference designators with pin #1 marked clearlyf. Test pointsg. HV Generator pins
Note The test points are not marked in the current (PY3, Y4) design.
3.3.4 Board Assembly
3.3.4.1 Applicable Standards
The board assembly shall be inspected according to IPC-A-610C, “Acceptability of Electronic Assemblies”, at Class 2 or higher level.
3.3.4.2 Component Placement
There are no restrictions in component placement as long as the component envelope (Figure 2) is observed, except for the following items. (The component side (top side) is defined to be the side facing away from the Flasher Board to which the HV Control Board is mounted.)
a. Digital interface cable shall be mounted from the component side at the designated location and in orientation (3.2.4.6.2.2)
b. High voltage output cable shall exit from the component side at the designated location (3.2.4.6.1.6)
c. Mounting holes locations and clearance areas shall be observed (3.2.4.7)d. Test points shall be accessible from the component side (3.2.4.8)
3.3.4.3 Board Wash
Board wash after assembly is required with the resulting cleanliness better than 1.56 micro-grams of sodium chloride per square centimeter (per IPC Class 2/Class 3).
3.3.5 Restricted Parts, Materials, and Processes([TBD] Shall be consistent with the DOM-level requirements.)
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3.3.6 ReliabilityThe HV Control Board shall have a Mean Time To Critical Failure (MTTCF) of greater then [TBD] hours as predicted in accordance with MIL-HDBK-217F (N1/2), Parts Stress Analysis Method.
Note The MTTCF requirement for the HV Generator is 1 x 106 hours minimum.
3.3.7 Quality
3.3.7.1 Acceptance Inspection and Tests
The supplier shall perform and document In-process Inspection and Tests, as well as Final Acceptance Inspection and Tests, on each HV Control Board, using pass/fail criteria to a level adequate to demonstrate that the item has been fabricated with the correct materials and processes and meets the requirements in this document.
3.3.7.2 Environmental Stress Screening
The term “unit” in this section refers to either the complete HV Control Board assembly or the complete assembly minus the HV Generator. i.e., The ESS may be carried out either before or after the integration of the HV Generator into the HV Control Board.
Note The HV Generator itself is required to undergo a separate set of rigorous ESS cycles and simultaneous functional testing (9400-0068-SCD), thus, the potential benefit of ESS with the integrated HV Generator would be limited to screening weak solder joints at the mounting pins.
3.3.7.2.1 General
a. All units shall undergo and pass the ESS test.
b. Units exhibiting statistical anomalies in functional tests after the ESS, but otherwise within specifications, shall fail this test.
c. Manufacturer shall document the ESS test plan.
d. Test data and pertinent record shall be captured on-line (no manual entry) and shall be available for a minimum of 15 years henceforth.
3.3.7.2.2 Minimum Requirements
a. There shall be a minimum of 5 thermal cycles, where one thermal cycle is defined to be the temperature excursion of +20ºC to 40ºC and return to +20ºC.
b. There shall be a minimum dwell time of 60 minutes at each temperature extreme.
c. Temperature ramp rate shall be between 2 and 5 degrees per minute.
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3.3.7.3 Functional Tests
All HV Control Boards shall undergo and pass a functional test suite, defined in 9400-0027-TEST, prior to shipment.
3.3.7.4 Workmanship
a. The components shall be free from physical or electrical defects upon receipt at the purchaser’s facility.
b. Labeling on the units shall be undamaged and legible upon receipt.
3.3.7.5 Certificate of Conformance
All shipments of the HV Control Boards shall be accompanied by a Certificate of Conformance (C of C), indicating that all units meet the specifications as defined in this document.
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4 VERIFICATION
4.1 Responsibility
4.2 Special Tests and Examinations
4.3 Requirement vs. Verification Cross Reference with Section 3
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5 PREPARATION FOR DELIVERY
5.1 Identification—Part Number and Serial NumberThe HV Control Board shall be indelibly and legibly marked with part number and serial number, traceable to revision and manufacture date code. Such traceability information shall be made available to IceCube.
5.2 Final Visual InspectionAll units shall undergo and pass a final visual inspection prior to shipping.
5.3 Packaging and Shippinga. The HV Control Board shall be packaged in ESD-protective packaging. A
metalized Mylar packaging material (MIL-B-81705, Rev.C, Type 3, or equivalent) should be used for the primary packaging of the individual units.
b. Common carrier shall be used for shipping. The mode of shipping shall not introduce additional risk of unanticipated accidental damage to the unit.
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6 DEFINITIONS
6.1 IceCube Acronyms
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AAARI Antarctic Astronomy and Astrophysics Research Institute
ADC Analog-to-Digital Converter
ATWD Analog Transient Waveform Digitizer
AWG American Wire Gauge
cm Centimeter
CMOS Complementary Metal Oxide Semiconductor
C of C Certificate of Conformance
CRC Cyclic Redundancy Check
CS0 Chip-select bit 1
CS1 Chip-select bit 0
DAC Digital-to-Analog Converter
DAQ Data Acquisition System
DC Direct Current
DFL Dark Freezer Laboratory
DGND Digital Ground
DOM Digital Optical Module
DOMMB Digital Optical Module Main Board
DV Design Verification
ECN Engineering Change Notice
EIA Electronics Industries Alliance
EM Electromagnetic
EMC Electromagnetic Compatibility
EMI Electromagnetic Interference
ERD Engineering Requirements Document
ESD Electrostatic Discharge
ESS Environmental Stress Screening
FAT Final Acceptance Test
g Gram
HV High Voltage
Hz Hertz
ICD Interface Control Document
ICT In-circuit Tester
ID Inside Diameter
IDC Insulation Displacement Connector
IPC Institute for Interconnecting and Packaging Electronic Circuits
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K Kilo (103)
Kg Kilogram
LED Light-Emitting Diode
LSB Least Significant Bit
m Meter / Milli (10-3)
M Mega (106)
mA Milliampere
MKS Meter-kilogram-second
mm Millimeter
MISO Master-In-Slave-Out
MOSI Master-Out-Slave-In
MSB Most Significant Bit
MTTCF Mean-Time-To-Critical-Failure
MTTF Mean-Time-To-Failure
mV Millivolt
mW Milliwatt
n Nano (10-9)
OD Outside Diameter
OM Optical Module
p Pico (10-12)
Pa Pascal
PCB Printed Circuit Board
PE Photoelectron
pF Pico Farad
PMT Photomultiplier Tube
P/N Part Number
PSL Physical Sciences Laboratory, University of Wisconsin-Madison
P/V ratio Peak-to-valley ratio
PY Project Year
REF Reference
RF Radio Frequency
RFI Radio Frequency Interference
s, sec Second
SCD Source Control Document / Specification Control Document
SCLK Serial Clock
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SI Système International d’Unités
SMB Sub-Miniature B
SPE Single Photoelectron
STF Simple Test Framework
TBD To Be Determined
TBR To Be Reviewed
UL Underwriters Laboratory
UW University of Wisconsin
V Volt
VDC Volt DC
W Watt
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6.2 IceCube Glossary
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Anode A PMT dynode, the last in the multiplier chain and typically larger than the preceding dynodes, that collects the final charge pulse.
Cathode The active surface of the photomultiplier from which photoelectrons are initially liberated.
Zero The temperature, in degrees Celsius, at which water changes state from a liquid into a solid.
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7 APPENDIX
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