RESEARCH NEWS

DECEMBER 2007 | VOLUME 10 | NUMBER 1210

Organic thin-film transistors are attracting

considerable attention as the key components of

printed electronics, one the chief benefits of which

would be fast and low-cost manufacturing. Ironically,

their manufacturing could prove to be a lot trickier

than previously thought.

Researchers at Northwestern University have

discovered that the fabrication temperature for

pentacene transistors has a significant effect on their

performance [Kim et al., Science (2007) 318, 76].

Above a certain temperature for the deposition of

pentacene, the carrier mobility in the transistor falls by

a factor of ten or more, rendering it useless.

“This fact alone would not be surprising, if we did not

discover that these temperatures are far lower than

commonly thought,” explains Antonio Facchetti.

To fabricate the transistors, a layer of pentacene

is deposited on top of a polymeric dielectric layer,

such as polystyrene, poly(methylmethacrylate),

or poly(t-butylstyrene). The group finds that at

low deposition temperatures, pentacene growth

takes place in a layer-by-layer fashion, giving a

smooth surface and high carrier mobility. At higher

temperatures, the polymer dielectric becomes viscous,

which dramatically changes the way the pentacene

molecules attach and move on the surface. The result

is a lumpy morphology that is not good for transistor

performance.

It is well known that confined thin films exhibit

depressed glass transition temperatures (Tg) compared

with bulk material. The surprise is that the decline in

carrier mobility occurs at a temperature below Tg of

both the bulk polymer and that expected for a thin

film. For instance, a polystyrene sample has a bulk Tg

of 103˚C, while that of the thin film should be ~9˚C

lower, but the decline in mobility is seen at 59˚C. The

team surmises that this effect arises from a change in

the viscoelastic properties of the dielectric surface.

“When polymeric materials are involved, we need

to worry about material selection, device processing

conditions, and device thermal stability even more

than before,” concludes Facchetti.

Pauline Rigby

US scientists have observed negative

refraction in semiconductors for the

first time [Hoffman et al., Nat. Mater.

(2007) doi:10.1038/nmat2033].

Metamaterials are artificially

engineered materials in which

subwavelength-size features control

the response to electromagnetic

waves. Negative-index metamaterials

require both the electric permittivity

and magnetic permeability to be

negative, which occurs when electric

and magnetic resonances overlap.

The new semiconductor structure

sidesteps this issue by requiring a

single electric resonance.

According to the team from Princeton

University, Oregon State University,

and Alcatel-Lucent, the metamaterial

design is unique in that it relies on an

anisotropic dielectric function, instead

of overlapping electric and magnetic

resonances.

The structure comprises 100 layers

of undoped AlInAs alternating with

highly-doped InGaAs. Each layer is

~80 nm thick, much smaller than the

wavelength of light being refracted.

“They have made a very high-quality

anisotropic material, but it is not a

negative-index material in the strictest

sense,” John B. Pendry of Imperial

College London told Materials Today.

“It is true that when you send light

into the material, it bends backwards

on itself. But in a material with

negative refractive index, waves go in

one direction, while energy flows in

the opposite direction.”

Claire Gmachl of Princeton University

broadly agrees. “We were careful not

to call it a negative refractive index.

In any case, the refractive index is not

well defined in anisotropic materials

because it varies with direction. But we

have observed negative refraction.”

Pauline Rigby

Semiconductors bend light the wrong wayOPTICAL MATERIALS

Polarons may limit transistor performance

HfO2 is one of the leading candidates to replace the SiO2 gate

oxide in field-effect transistors. Thanks to its high dielectric

constant, k, it is possible to use thicker layers of HfO2 for the

gate insulator and avoid the problem of gate current leakage

as conventional transistors are scaled down.

But new research from University College London, Accelrys,

and SEMATECH has identified a mechanism that could cause

unstable operation in transistors containing this material

[Muñoz Ramo et al., Phys. Rev. Lett. (2007) 99, 155504].

The team performed ab initio calculations of the charge-

trapping of polaron states in monoclinic HfO2. A polaron is

an electron or a hole that has polarized the lattice around

it to create a potential energy well in which it is trapped.

The calculations show that polarons occur even in a perfect

lattice. In fact, it is the very property that makes the material

desirable as a gate insulator – its high k value – that makes it

prone to the formation of polarons: high-k materials are easily

polarizable.

These findings turn previous ideas about charge trapping

in high-k dielectrics on their head. “People believed that

in order to trap charges, you needed to have structural

imperfections, so there was considerable effort to form very

good structures,” says SEMATECH Fellow Gennadi Bersuker.

“But our result shows that charge trapping may happen even

in an absolutely perfect structure.”

Polarons could cause a real problem for transistor performance

and reliability. To have a good quality device, the transistor’s

threshold voltage must be very stable. The formation and

hopping of polarons between different lattice sites is likely to

affect the threshold voltage and lead to unstable devices.

But forewarned is forearmed. Even though polaron formation

is an intrinsic property of the material, there may be ways

to ameliorate its effects. “It’s fixable, but I cannot go into

details,” says Bersuker, because of the commercially sensitive

nature of the information.

Pauline Rigby

ELECTRONIC MATERIALS

Rubbery polymers can ruin transistorsELECTRONIC MATERIALS

Schematic of a top-contact, bottom-gate pentacene

transistor highlighting the semiconductor film

morphology after layer-by-layer growth. (Courtesy of

Antonio Facchetti.)

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