numerical computation. OCR Output

equations determination

network topology

modelling of the active and passive devices

simulation program are:

process by performing repeated analysis of a power electronic network. The major parts of a power converter

which perform DC, AC, transient, and in some cases sensitivity and statistical analysis, are used int he design

In recent years, simulation programs have played an important role in the analysis phase. These programs,

next step is to construct and test a prototype.

the ratings of the components. The proposed design must then be analyzed to find out if it is reasonable. The

a possible design to meet the specification. Normally he determines first the structure of the converter and then

Using the available teclmology (thyristor, transistor ...), techniques and experience, the engineer formulates

Fig. 1 Design process diagram

Available technology

Design techniques

Experience Series

RatingPrototypeAnalysisStructure | Components

Possible Design

SpecificationsFig` l'

What is design? It is iterative analysis until certain specifications are met, and is characterized schematically in

As engineering systems become more complex, their design must rely on more sophisticated techniques.

and the numerical method are discussed.

transient analysis is described. Criteria for the choice of semiconductor modelling

form suitable for programming, the matrix approach to various aspects of dc, ac and

mauix notation is the tool par excellence for describing the network problem in a

The major parts of a power converter simulation program are presented. Since

CERN, Geneva, Switzerland

F. Bordry

1`LONR CON

- 121 —

c) Linvill lumped model. OCR Output

b) Beaufoy-Sparkes charge-control model

a) Ebers-Moll model

attention in modelling with transistors:

Although there are many models for use with semiconductors, the following three have received much

use in power—converter simulation.

them because they were the only ones available at the time. Recently, these programs have been developed for

The first class of programs was developed for electronic problems. However, power—electronic engineers used

switch—functioning

small-signal frequency domain

We can divide the simulation programs into two classes, according to the modelling of the semiconductors:

describe the physical processes of device operation, but to compute the circuit response.

A power converter program is circuit-design (not device-design) oriented. Therefore the object is not to

often possible to give all the parameters.

but also their dependency on electrical and physical conditions. For a complete model, it is not very

the numerical values for circuit elements in the model must be determined,

(time cost).

complexity of the equivalent circuit used in the modelling, and consequently the order of the equations

generally, in any analysis, the degree of accuracy required will greatly affect the

require nonlinear parameter representation.

parameters in the model may be considered as approximately linear. Otherwise the device model may

ing_;eg@: if the device performs over only a small range of voltages and currents, the

Several considerations must be taken into account when modelling an active device by an equivalent circuit:

physical device to permit prediction of the circuit performance.

and present an interpretable equivalent circuit to the design engineer. It should also be accurate in describing the

devices must be represented to an acceptable degree of approximation. Furthermore, the model should be simple

To obtain meaningful results from a power convener analysis, passive and active linear and nonlinear

of these topics.

proccssor), but it is very important for the choice and efficient use of a simulation program to have full knowledge

From the point of view of thc cud-uscr, thcsc parts arc hidden by user-friendly interfaces (pre- and post

- 122 —

components. OCR Output

semiconductor model may be improved, locally, by connecting in series or parallel any other

state vector; the state equation coefficients depend on the value taken by the binary resistances. The

whether they are off (high resistance) or on (low resistance). There is a single topology and a single

the semiconductors are modelled in the form of a binary resistance, varying on a large scale according to

the controlled sources corresponding to the off semiconductors has to be calculated.

source). The topology is fixed and there is a single system of equations, but at each instant the value of

determined to produce no current in the source (dual proposition in the representation by a current

a voltage source corresponding to a semiconductor in the on-state is nil, while for the off—state it is

the semiconductors are modelled by controlled voltage (or current) sources. The voltage at the bounds of

described by a single system of equations (constant topology).

state "current" associated with it is forced to be nil. The topology is fixed and the device can thus be

The semiconductor itself is considered as a perfect switch; when the semiconductor is off, the variable

the semiconductors are modelled by a second-order circuit (inductance series and parallel RC circuit).

corresponds to each sequence (varying topology).

situated disappear from the graph. The topology is thus variable and a particular system of equations

the semiconductors are considered as perfect switches. In the off—state, the branches on which they are

frequently used being where:

output logical system (switch on or off). This binary representation leads to numerous models, the most

elements (they are either on or oft). This assumption involves the representation of a semiconductor by a mono

In the second class of progams, the semiconductors are considered as switching devices, i.e. nonlinear

Fig. 2 Ebers-Moll model

jl " xr 2114 ’ xr ’ "‘.v w cgé

¢,, *c,, *14. m_i,r_ (K»·Vu) (%·V¤clc”,._;...;.. _ gx,

, r»

‘~ #‘· tl’~ (D··¢·

4, - 1,, t.,-t >, »;,= :,, t.-n"’•¢ "'"’·= "'

for a thyristor and this is a very serious limitation for the power—converter simulation.

thyristor model is the stumbling·block for these kind of programs. Very often, there is simply no adequate model

semiconductor, the models are derived &om the uansistor model. It should be pointed out, however, that the

Generally, the Ebers-Moll model is mostly used for analysis programs (Fig. 2). For other types of

— 123

branch-node rnatrix (Fig. 4b). OCR Output

in Fig. 3 and consider this node as the datum or ground node. The resulting matrix is called the

since it contains redundant information. In our example, we choose to delete the column corresponding to node D

that any column is equal tothe negative sum of all the other columns. Hence, any one column may be deleted

contains both a +1 and a -1 as its non—zero entries, it s columns are linearly dependent, i.e. their sum is zero so

connected to each node as well as the polarity of the connections (Fig. 4). Since each row of the incidence matrix

information is to define a matrix, called the incidence matrix, where the columns show which branches are

A graph whose branches are oriented is called an oriented graph. A way of storing the connectivity

Fig. 3 Correspondence between a network and its linear graph

B 2 C 3 D

graph to illustrate some definitions or properties.

the network of Fig. 3a is shown in Fig. 3b; each node and branch are indexed. We will now use this simple

correspondence between a network and a linear graph can immediately be made. Thus the graph associated with

mathematics, called the theory of linear graphs, that is concemed with the study of just such structures. A

analysis. The resulting structure consists of nodes interconnected by line segments. There is a branch of

branches. So it is convenient to replace each network element by a simple line segment for the topological

The topological properties of a network are independent of the types of components that constitute the

branches comiected together are called a node. A simple closed path in a network is called a [cop or a mesh.

network lying between two terminals to which connections can be made is called a branch. Two or more

store energy, dissipate energy, and transmit signals or energy from one point to another. A component of a

When two or more components are interconnected, the result is an ehzctric network. Such networks

3.1 Touol is (definiuon

3. NETWORK ANALYS1

these problems further on.

switching—device voltage and current relations are difficult to formulate for computation. We shall come back to

circuit) is used for each semiconductor, the stiffness problem is solved but the topology becomes varying and the

(widely spread time constants). However, an ideal switch model (switch on: short circuit, switch off: open

The drawback of this second class of models is the resolution of an extremely stiff differential equation

Fig. 5 Tree with branches OCR Output

B T( = A T)

3 I -1 -1 0

2 I 0 0 1

1 I 0 -1 0

A B C

where B 1is the transpose of the BT matrix.

Ar=Br-l I

and the inverse of AT is:

BT indicate which branches are included in the path from each node to the datum node. The relation between BT

the graph of the tree in terms of the node-to—datum path matrix BT. For the tree shown in Fig. 5a, the columns of

It is easily shown that the submatrix AT is square and has an inverse which can be determined directly from

referring to twigs and links (A = > AT and AL).

the graph and classify the remaining branches as links we may partition the branch-node matrix into submatxices

which is defined as a set of trees, one for each of the separate parts. If we choose a tree (a tree is not unique) in

If a graph is unconnected, the concept corresponding to a tree for a connected graph is called a forest,

tree is one less than the number of nodes of a graph.

called [inks. Together they constitute the complement of the tree, called the cotrzz. The number of twigs on a

sufficient to list its branches. The branches of a UBC are called twigs; those branches that are not on a tree are

connected graph containing all the nodes of the graph but containing no loops. When specifying a tree, it is

A subgraph is a subset of branches and nodes of a graph. A tru is a connected subgraph of a

Fig. 4 Incidence matrices

A C)

O 0 15 —» 3

0 1 -11 —> l

-1 0 0

0 0 12 —» 4 Z

1 -1 0

3 -—» 5 A B C

-1 0 05I-1

0 0 l4I0

0 0 13IO

0 l -12IO

1 -1 · 0lll

A B CBrancl\IA

Node

—125

With each tree branch positively oriented in its corresponding basic cutset, we obtain: OCR Output

The columns of the fundamental cutset matrix (D, Fig. 7) show which branches are included in each cutset.

fundamzntai (or basic) cutset.

defgines a fundamental (or basic) mesh, so each tree branch together with a certain set of links defines a

subgraphs contain all the nodes of the initial graph. Just as each link, together with a cetain set of tree branches,

whose removal causes the graph to become unconnected into exactly two connected subgraphs, and the two

The final topological matrix is the cutset matrix. A cutset is a set of branches of a connected graph

(:1*:- (Ar) ·AL=_B'l`.ALt -1 t t

This equation can then be solved using the relation between BT and AT:

\ t T t I _ [AT AJ =AT·CT+AL=0 (CL~I)C [ CL ]

We may partition the matrices:

At.C=0 (0I‘Ct.A=O)

fundamental relation:

lt is a standard theorem that, for any linear graph, the branch·node and branch—mesh matrices obey the

and it can be obtained as follows:

links, is a unit matrix. Only the submatrix CT, which gives the path-in-tree for each fundamental mesh, is needed

are called futidanwntai (or basic) meshes (or Loops). Consequently, the submatrix CL, referring to the

will be characterized by the fact that all but one of the branches are twigs. Meshes (or loops) formed in this way

time. As each link is replaced, it will form a mesh or a loop. If it does not, it must have been a twig! This mesh

(Fig. 6). Given a graph, Hrst select a tree and remove all the links. Then replace each link in the graph one at a

The next topological matrix of interest for this presentation is the branch—mesh or circuit matrix

Fig. 6 Branch-mcsh or circuit matrix

D \[___0 1 CL

1 0®i1 O

1 —1 Gr\ O 2**31 0

Branch 4 51/ "4

Mesh

— 126

J=Y.V OCR Output

or

V=Z.J

Thus we may express Ohm's law for the entire network as the matrix equations:

Ohm's law for this branch can be written in terms of the element voltage and element current variables V and J.

V=e+E

I=i+I

current source l. Thus, there are three distinct voltage and current variables to identify in this branch:

made of an impedance (or admittance) element Z (or Y) in series with a voltage source E and in parallel with a

Branch glaticnships. Consider as a general branch the configuration shown in Fig. 8. The branch is

tl1e network.

the loop orientation, of the voltages of all branches on the loop is zero, at each instant of time and for each loop in

Kirchcffs vcltagc law (abbreviated by KVL) which states that in any electric network the sum, relative to

the current references.

at a node in a network, an equation relating the branch currents will result. Attention must, of course, be given to

currents leaving a node is zero, at each instant of time and for each node of the network. When this law is applied

Kirchcffs cgrrcnt law (abbreviated by KCL) which states that in any electric network the sum of all

relationships:

of time t: the current i(t) and the voltage v(t). These functions are constrained by Kirchoffs laws and the branch

We defined an electric network as an oriented linear graph with each branch associated with two functions

3 .2 Eleenical network mw

Thus the fundamental cutset matrix D is computed in terms of A and BT.

»= I [‘°j=[‘T ]= D -OT D =A.B;

Fig. 7

~\ ® s 0 1 0 }DL=—CiT4 Ti -1 -13 I 0 0 1

/‘\./' ` 2 I 0 I 0 lur\/

1 0 0.4- ?-•`_ D Branch 1 2 3 BF/"'\F"l"$.· /7 1\ /QCurse

- 127

Fig. 9 Network variables and topological matrices

(Mesh) (Branch) (Node)

T,.__e_. {TV E ° LI )V = e + E OCR Output

z I Iv

]=i+I

·‘‘" ‘= c Ll AEI *—’ I (the diagram shown in Fig. 9.

We can summarize the basic interrelations between the network variables and the topological matrices by

i = C . i'

e = A . e'

mesh currents, we obtain:

lf we introduce the vector e' corresponding to the node-to-datum voltages and i' corresponding to the

the matrix At sums all the branch currents leaving each node.

The topological matrix Cl acts as an operator which sums all the branch voltages around each basic mesh while

C*.e=0 and At.i=0

Combining Kirchoff's laws and branch relationships, we obtain the matrix relations:

Fig. 8 General branch

• 1

+ A+

by off-diagonal terms in the Z or Y matrix.

they correspond to mutual impedances or admittances. Active devices or dependent sources may be represented

impedances (or trans-admittances) between pairs of branches. If corresponding off-diagonal terms are equal,

(or Y) are the self-impedances (or self-admittances) of each branch. The off-diagonal terms are the trans

network, and where the admittance matrix Y is the inverse of the impedance matrix Z. The diagonal terms of Z

where the vectors V and I consist of the entire set of element voltage and element current variables for the

- 128

impliesthate‘=(A*.Y.A)—1.A*.(I-Y.e)

At.(I-Y.E)=A‘.Y.e=(At.Y.A).e'

(I-Y.E)+i=Y.¢ (A[.i=OKCL) OCR Output

I = Y . V

following steps quite similar to the mesh method.

Starting with the admittance form of Ohm's law, we can proceed to treat the network via the node method,

c=Z.i-(E-Z.I)

We can compute from i', the branch currents i (i = C . i') and finally obtain the branch voltages

i’=(Ct.Z.C)‘l .C[(E-Z.I)

Thus we obtain i':

where (Ct . Z . C) is the mesh impedance matrix.

Ct.(E—Z.I)=(CY.Z.C).i'

then

i = C i'

Introducing i' by

Ct.(E-Z.I)=Ct.Z.i

If we first multiply by CY and take into account Kirchoffs voltage law (Ct . e = O), we Gnd that:

(E - Z . I) + e = Z . i

we obtain

V = C + E

I=i+I

V = Z . J

From

re are four distinct ways to solve this problem:

E and current source vector I, find the branch voltage e and currents i"

determines the topological matrices A and C, its impedance matrix Z (or admittance matrix Y), the voltage source

The electrical network problem can be expressed as follows: "given a network whose configuration

3.3

- 129

We apply now KVL and KCL. KVL applied to the fundamental meshes:

(hunk, T;Twig) OCR OutputVLHZ: ““H“l It Ha Yr VT

follows:

expressing the branch relationships as V = Z . J or J = Y . V, we write mixed branch relationships as

currents in tems of which all branch currents can be expressed. First we choose a tree. Instead of

voltages in terms of which all branch voltages can be expressed. Similarly, link currents form a basic set of

widely used, especially to solve the transient analysis. We recall that twig voltages form a basic set of

In addition to the three standard methods of analysis, there is a fotmh which is beginning to be more

(state-variable approach)

i=Y.c-(I-Y.E)

c = D . cr

The variables e and i are evaluated as follows:

where (DY . Y . D) is the cutset admittance matrbc.

eT=(D*.Y.D)·l.D¥.(I-Y.E)which implies that

D¥.(l-Y.E)=Dl.Y.e+(Dl.Y.D)e;·

(I-Y.E)+i=Y.e

Using these relations, we have:

D; . i = 0

The KCLcan beexpressed with theDmatrix:

e = D . eq (D: cutset matrix)

h voltages may be computed using KVL:

Instead of using e`, we can use the set of tree·branch voltages eq- which are linearly independent. The

i=Y.¢·(l-Y.E)

C = A . e'

Finally:

(At . Y . A) being the nodal admittance matrix.

- 130 —

or

A*.(dI-Y.dE-dY.E)=A*.dY.A.e‘+At.Y.A.de' OCR Output

impedance) change can be computed. We can differentiate the nodal equations:

The partial derivation or sensitivity of the nodal solution matrix with respect to any admittance (or

time.

several refinements. However, a compromise must be made between accuracy and the amount of computational

There are many numerical methods to solve these equations such as LU decomposition of P and Q with

=At.Y; X=At.(I-Y.E)

P=C[.Z; Y=C*.(E-Z.I)

with:

Q . C = X

Node method:

P . i = Y

Mesh method:

DC network problems is by Gaussian elimination of the variables in the mesh or node equations:

provides the worst case analysis and statistical analysis (Monte Carlo). The most straightforward way of solving

The DC method permits DC or steady-state solutions of linear electrical networks to be obtained and often

3.4.1

basic methods are available for solving network problems, namely DC, transient and AC analysis.

3.4

1 L T

HiL]{-zh 0I -uu]\1T · ` ¤ = - 11 1 0 - Y ` E H + D Y 1· 11. 1· 1.Z H + C L U T

Combining the three last equations, we get:

iT= -D_ .i]_,

implies that

Dt.¢=l·]·+ D2 .l]__=0

and KCL to the fundamental cutset:

Ct.e= C; .e;+eL=0 implies eL=-C; .e·;·

- 131 —

Fig. ll Transient analysis inductance model OCR Output

my - 1(t - at) + % e(r - at)+ % em- .L Jn)- L jemat

J(t -At) + i e(t —At)

c (t)

AlJ (K ) L2L

Pig. 10 Transient analysis capacitance model

1(t) .. i’?[e (t)- e(t - at)]dt

- Q; J - C (t)

ei(t)ei(t) cj(t) ¢j(t)

ijAg- e(t-At)—e(t—At)

program). Hence, the problem is reduced to a sequence of DC analyses.

of the circuit. The accuracy and the stability of this method is really very dependent on this choice (e.g. ECAP

achieved as shown in Figs. 10 and ll. Thus, the time step has to be determined as a function of the time constant

algebraic equations, developed at each time interval. A capacitance and inductance model allows this to be

One technique is to replace the integral-differential equations associated with a transient analysis by

when the network has a wide spread of time constant (see the switching model of a semiconductor).

numerical integration of the differential equation is time consuming for nonlinear networks and extremely slow

specified driving functions. The transient problem presents the greatest computational difficulty since the

Transient analysis provides the time-response solution of electrical networks subject to arbitrary user

3.4.2

method.

Solving nonlinear DC networks is not simple, the most general technique being the Newton-Raphson iteration

also of changes in the I and E vectors. This equation is used in several programs for computing sensitivities.

The last expression gives the variation in node voltages as a function not only of changes in admittances (dY) but

de'=(A*.Y.A)‘l .A*.[dI-Y.dE-dY.(E+e)]

- 132 —

where F and G are nonlinear functions of X(t) and U(t). OCR Output

Y(¤)= GX(t).U(t)l

dt(0 =F[X(¢xU(r>]

In the general case of a nonlinear network, we obtain:

Y output vector (any combination of the other variables)

State vector Input vector

e "=·°* “=lEl 1 Jll LL

where

2Y=O( +D1U+D%¥— (output equation)

* =AX +BU+B$5-% (State equation):112

network as follows:

From these relations and the final equation of the mixed method, we can obtain the state equation for a linear

e IL = A LIL Lu U iu ° ur dl L11. Lrr iur

and

i G, = A- CT 0 e G i (L dt 0 CL ` c (L

For the reactive elements:

i== iT=| and iL=i i {i·‘lj|’i¤`in

RTe= =>e = I and e =| C T EL EE cTG

Then we can partition the voltage and current vectors as follows:

number of capacitors, the minimum possible number of inductors, and none of the independent current sources.

Detine a normal tree as a tree having as twigs all of the independent voltage sources, the maximum possible

U(l)= U A C OCR Output

For the steady-state AC problems, the driving function can be written as:

=>x=(sI—A) ·B·U

%=AX +BU=s·X=AX +BU

which we obtain:

to obtain frequency and phase response solutions. Another approach is via the state equation of the network from

wave excitation at a fixed frequency. Since this analysis also allows automatic parameter modification, it is easy

AC analysis permits the steady—state solution to be obtained for linear electrical networks subject to sine

3.4.3 (frequential domain)

case of the general integral methods, where the accuracy is very dependent on the integration step.

T becomes an observation step because it is not linked to the smallest time constants of the circuit. This is not the

and there are many numerical methods for solving the problem of the exp(A.T) computation. The calculation step

xm +r) =eAT · xm +eAT- [ e'A'·B·U(t+1:)-dt

In the case of a linear system, we can solve the state equation using an exponential matrix:

algorithm is specially designed to solve this problem, but it is not yet widely used in the simulation programs.

At once the calculation is under way and, in any case, they have to start with the one-step method. The Gear

produce results of comparable accuracy. But, with multistep methods, it is rather difficult to change the step—size

The multistep methods require considerably less computation, compared with the one-step methods, to

method (varying step).

_l\ggtis_tep: Predictor-corrector methods such as Adams, Adams-Bashforth, Moulton, Milne, etc. and the Gear

@9;s_tep: Euler and Runge-Kutta methods

The most famous methods are:

consideration [r+(k·1)At, t+kA].

require, in addition, values of X[t+(k-l)At] and/or at other instants outside the integration interval under

calculation of X(t+k.At) given the differential equation and information at [t+(k-1)At] only. Multistep methods

classified roughly into two groups, the so—called one-step and multistep methods. One—step methods permit

The various numerical algorithms for solving first-order differential equations with an initial condition can be

O0(t) =F[X(t),U(t)] ;X(t) = X

The problem is then reduced to solving a first-order vector equation:

Time-domain solutions of the state equations:

- 134

constant or varying topology. OCR Output

previously described, switching changes the state matrices and, according to the switching models used, we have

For power electronic networks, the solution of the state equation is not nearly so straightforward. As

course, computation time.

smaller At must be to assure convergence and accuracy. The drawback of choosing very small values of At is, of

The choice of AT for the integration algorithms is critical: the larger the eigenvalues of the state matrix, the

being an algebraic equation, its solution is easily obtained.

equation is solved sequentially at discrete time intervals At. At each step, the output equation is also solved but,

Using numerical integration algorithms (mono- or multistep method) or matrix exponential [exp(AT)], the state

If these equations describe the behaviour of a linear time-invariant network, their solution is straightforward.

Y = G[X(t) , U(t)]dt

-r= x U - [ (0 , (0]dx

analysis:

Let us come back to the numerical determination and solution of the state equations for the transient

3.5

Then the method requires only the inversion of the diagonal matrix (sl—A)d at each frequency.

X,,=x ·(sI — A)X-U,,`l

[?Thus:

(sl- A)A=X -(sI—A)- X

where Ad is the diagonal matrix. The same X matrix also diagonalizes (sl-A):

Ad = x-1.A.x

find the matrix X fomied by the eigenvectors of A:

The problem is resumed to find an effective way of computing (sl-A)‘i. The most common method is to

X__=(sI—A) ·B·U

Thus:

xm: x,_ e "

The steady-state response is then:

- 135

Fig. 12 Solution for a chopper circuit OCR Output

m:m:mF0 ,OFF state: rD=r~;-=l0 Q — ( T,D.Z~ l0

:>{ T¤F,Dm:ZD·· l0

ON state: rD=r1-=0.lQ T¤*’D¤F:ZT~ 10

Time constant: 1: = —-—¢[;1;$ TR + ;%

. I' · I` I`

Equivalent circuit:

R = 10 9

L = lmH

observational one).

varying-step method), and for finding the matrix exponential of linear systems (the computational step is an

often have a fixed step. Gear's algorithm is still the most efficient method for nonlinear systems (multistep and

fundamental in the choice of the numerical method though it is not obvious for all commercial programs which

the order of 10:*. In a more complex system, the ratio can be in the order of 10or 10. This point is9 10

Let us present a very simple example for a chopper circuit (Fig. 12). The spread of the time constants is in

consuming computations.

on the order of the smallest time constant. This fact leads to numerical instability (At too large) or to unduly time

constants. To insure a converging and accurate solution, the integration step length of the state equation must be

The use of time-dependent impedances to represent the switching devices introduces a wide spread of time

conditions.

reduced step in the case of spontaneous commutation (diode, thyristors tuming off ...) to verify threshold

each step, the state of each switching device must be checked. A backward iteration may be necessary with a

vary with time. Only a single circuit analysis is needed to determine the state equation for all simulation time. At

impedance; high impedance (off), low impedance (on). The result is a fixed state equation whose coefficients

The constant topology simulation is conceptually simple. Switching devices are modelled by time—varying

3.5.1

- 136

drastically improve the efficiency of power converter simulation programs. OCR Output

method for power electronic networks. In the near future, these two points will receive great attention in order to

paper, it is evident that work is needed to upgrade the switching device models and the numerical computation

(schematic input, user-friendly post-processor ...) used in simulator programs. From the topics discussed in this

In recent years, a great deal of attention has been given by various companies to improving the interfaces

those of the output diodes and filter.

This simulation gives realistic component ratings for all components of the converter but in particular for

steady-state has been obtained. A start-up transient is also presented

resistor (modelling the klystron) is shorted with a switch. Figure 15 shows this transient condition shortly after

In order to simulate the converter behaviour under klystron crowbar-protection conditions, the output

The waveforms of steady-state conditions at nominal point are given in Fig. 14 (the firing angle is 55°).

switched off rapidly and without damage under these severe conditions.

times per day, the crowbar shorts the HV output terminal to ground. Obviously, the power supply has to be

The klystrons are protected by a fast crowbar. In the case of a klystron fault, which may happen several

Fig. 13 Electrical circuit of a thyristor controlled dc power converter rated at 100kV, 40 A.

I 5 rn!I | , ··—r-———· ii } ',!• I} me g I

I I I I I :II I __ I I III I i .. , I I I 5 ·_ ' i; . ' I E;] I I I · I

;a I

T —¤¤L'?1 I"I IRI _I_g o.r•¤•v{ I} i·*1—······‘, ti I YR] I |

| I I : I I ' { VI

“

·•I · " I· I,. .1 '%—3·dw 5 E I I. Q. |{ ' ' 1 I I * E4 an a I 4 I ,F¤I [:] —

I " I`

UN|] rn"; I I ; a-, .... - I { I UNH IRZIIL I I- ` Ii; , Ic 75% “‘z» lma : J:::“· I •· /·:

I H", any" ylgngygqggpg IIUUIIISYOR I NGN VUHABE IIIN$l0II|(I$ I DIUDE DUIIIIIP I II HGUIIIUD . tanu umn numI `I

output at 100 kV, 40 A maximum.

(TR3/4) whose secondaries feed two full-wave diode bridges. A symmetrical LC filter then provides smooth dc

accelerator storage ring LEP). The thyristor ac controller is placed in the lines feeding the step-up transformer

(Fig. 13). This 100 kV power convener (4 MW) feeds two klystrons in parallel (CERN Large Electron—Positron

OCR OutputAs an application, a simulation (by SCRIPT program) of a high-voltage power converter is presented

Fig. 15 Start-up and short-circuit transients OCR Output

3) Current through lilter choke 6) dc voltage across HV diode rectifier2) Current through one arm of HV diode rectifier 5) Output voltagel) Current through ac controller 4) Voltage across filter choke

uc uv320 Af

130 tw320 A'

-b2 kv \

91 gy16.8 RA

Fig. 14 Steady state waveforms for the HV power convener

3) ac line-to-line voltage across primary of HV transfonner 6) dc voltage across one arm of HV diode rectifier2) ac line-to—line voltage across secondary of HV transformer 5) Current through ac controllerl) Voltage across ac controller 4) ac winding current, secondary of HV transfomter

-60 kV

13.5 uv

z.s ut 4Y` °° '=‘·'

'~100¤ v A0 A»·

- 139 ——

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approach" PESC. IEEE. 1979H. Haneda and T. Maruhashi, "An efficient digital simulation of thyristor circuits by means of network-tableau

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Leistungselektronik"Wiss, Ber. AEG telefunken, Vol. 50 N°1, 1978P. Mehring, W. Jentsh, G. John and D. Kramer, "Das digitale Simultions-system ETASIM fiir die

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BIBLJOGRABHY

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