preliminary - fujitsu · the target audience of th is document is engineers developing products...

April 4, 2013 pi-mb86r24-triton-c-rev0-02

Preliminary Product Information

Fujitsu Semiconductor Europe GmbH

MB86R24 ’Triton-C’

Rev0-02

April 4, 2013

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ii pi-mb86r24-triton-c-rev0-02 April 4, 2013

Fujitsu Semiconductor Europe GmbH MB86R24 ’Triton-C’

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Preface

Intention and Target Audience of this DocumentThis document describes and gives you detailed insight to the stated Fujitsu semiconductor product.

The MB86R24 ’Triton-C’ device belongs to the Blueline SoC Family used for graphics applications.

The target audience of this document is engineers developing products which will use the MB86R24 ’Triton-C’ device. It describes the function and operation of the device. Please read this document carefully.

TrademarksARM is a registered trademark of ARM Limited in UK, USA and Taiwan.

ARM is a trademark of ARM Limited in Japan and Korea.

ARM Powered logo is a registered trademark of ARM Limited in Japan, UK, USA, and Taiwan.

ARM Powered logo is a trademark of ARM Limited in Korea.

PowerVR is also trademarked by Imagination Technologies

OpenGL ES is a registered trademark of the Khronos Group

System names and product names which appear in this document are the trademarks of the respective company or organization.

LicensesUnder the conditions of Philips corporation I2C patent, the license is valid where the device is used in an I2C system which conforms to the I2C standard specification by Philips Corporation.

The purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as de-fined by Philips.

Please acquire license of MediaLB from SMSC and request the following document: OS62400 MediaLB De-vice Interface Macro Advanced Product Data Sheet.

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MB86R24 ’Triton-C’ Fujitsu Semiconductor Europe GmbH

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History

NOTE Important changes to last version are marked with revision bars.

Revision Date Author Description

0-01 14.02.2013 AvT/RvR First draft

0-02 04.04.2013 RvR - Power supply voltage revised- Internal SRAM changed- One I2C channel added- 3-pin support for MediaLB- Block diagram revised- Package name changed- Schedule for test chip added

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April 4, 2013 pi-mb86r24-triton-c-rev0-02 iii


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Blank for technical reasons

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iv pi-mb86r24-triton-c-rev0-02 April 4, 2013


Overview PRELIMINARY

Chapter 1: General Information

NOTE The content of this document is subject to changes without prior warning. Significant changes to the last version are marked with revision bars.

1.1 Overview

‘Blueline’ is the name of Fujitsu Semiconductor's third generation of application processor family whichsucceeds the ‘Emerald’ product family. The term ‘Blueline’ is a preliminary working name for multipleSystem-on-Chip (SoC) application processor variants. The MB86R24 ’Triton-C’ is the second device inthe family.

The MB86R24 ’Triton-C’ device is a high-end application processor that combines the latest ARM®Cortex™ A9 dual CPU core with state-of-the-art, embedded 2D and 3D graphics cores. Iris-MDP, theadvanced 2D Graphics Engine was designed in-house and it is also used in other Fujitsu semiconductordevices. The 3D graphics core of this device incorporates Imagination Technologies' POWERVR™‘SGX543-MP1’ which is well known on the consumer products market. This graphics core supports allthe important Khronos Group's open standard API formats such as OpenGL® ES 2.0.

The POWERVR™ core uses 'Tile-Based Deferred Rendering' (TBDR) for render processing, reducingperformance-incurred loads on the CPU and GPU and providing more system capacity. In comparisonto immediate mode based rendering processes, TBDR also requires a much lower fill rate.

Achieving outstanding rendering performance thanks to its independent 2D and 3D graphics engines,the MB86R24 ’Triton-C’ device will be positioned as an embedded graphics performance industry leaderfor automotive and industrial applications. The SoC also combines multiple video inputs and supportsthree parallel display outputs. Furthermore, the chip provides various standard and automotive-specificperipheral interfaces for a wide range of applications.

The chip’s architecture has been optimized for the simultaneous use of all functional blocks, virtuallyeliminating performance gaps. The MB86R24 ’Triton-C’ device’s harmonized structure permits thesimultaneous rendering of independent 2D and 3D graphics, capturing of multiple video streams anddisplay of content to multiple targets.

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April 4, 2013 pi-mb86r24-triton-c-rev0-02 1 - 1


PRELIMINARY Key Features

1.2 Key Features

Key features and interfaces of MB86R24 ’Triton-C’ are listed below.

Technology

CMOS 55 nm

Power supply voltage:

IO: 3.3±0.3 V

Core: 1.2±0.1 V

DDR3: 1.5±0.75V,

DDR3L: 1.35+0.1V / 1.35-0.067V

FDP: 1.8±0.1V

Package

Package: FCBGA-672

27mm x 27mm, 1.0 Pitch

Memory

External RAM Interface

Unified 16/32/64(2x32)-bit DDR3/3L memory interface

DDR3/3L: 800/1066Mbit/s

External Flash Interface

for NOR and NAND (serial, parallel), managed NAND (eMMC)

Internal SRAM

1x 32k, 1x64k built-in SRAM

SoC Technical Details

Central processor cores

ARM Cortex A9, dual core 533 MHz per core 2.5 DMIPS/MHz

32 kB instruction cache / 32 kB data cache, 512 kB L2-cache

ARM NEON™ SIMD Engine

JTAG ICE interface

Java acceleration (Jazelle technology)

VFP instruction set (VFPv3)

Multi-layer AXI/AHB bus architecture

External Bus (16 bit)

Graphics cores

2D Graphics Engine: ‘Iris-MDP’

3D Graphics Engine: PowerVR™, SGX543-MP1

Tile-based deferred rendering (TBDR)

OpenGL® ES 2.0

Display controller

3 independent parallel display controllers

Display layers per controller: 8 + 4 alpha + cursor (Display0, Display1), up to 3 display layers (Display2)

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Key Features PRELIMINARY

Gamma correction unit (color LUT)

Dithering unit Display resolution up to WUXGA

Output formats/channels:

Up to 2x single channel DRGB888

1x single and dual channel FPD

Support for dual-view display

Warping on the fly (Display2)

Video capture

6 independent channels

ITU-R BT.656, SMPTE 293M-2003, SMPTE 296M-2001, SMPTE 274M-2005

YCbCr 4:2:2 interlaced, YCbCr 4:2:2 progressive

RGB888 – 1 channel

Color conversion

Histogram unit, Histogram Equalization

Peripherals and more

MIPI CSI2

SPI slave Host interface – 1 channel

SPI master – 2 channels

High-speed (quad) SPI - 1 channel

Ethernet MAC

10/100/1000 Mbit/s

IEEE 1588 support

USB 2.0 host or function – 1 channel

SDIO/MMC – 1 channel

UART – 6 channel

USART – 5 channels

I2S – 2 channels

I2C – 2 channels

PWM – 8 channels

GPIO

Timer 16/32 bit - 2 channels

Signature Unit (signature and checksum calculation for display content, intended use: ASIL)

Watchdog Timer

External Interrupt – 4 channels

Debug

JTAG

16bit TRACE port

Automotive Interfaces

CAN (I/O voltage: 3.3 V) - 2 channels

MediaLB(R) 3-pin support

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PRELIMINARY Key Features

Software Support

Linux Board Support Package (BSP) including

Kernel 3.x (incl. dual core support)

U-Boot (boot loader)

Peripherals drivers

Tool Chain

Graphics Software Stack providing APIs for

Multiple Capture and Display Units

3D Graphics: - OpenGL ES 2.0 - EGL 1.4, - OpenGL ES Shading Language 1.0

2D Pixel Graphics: Iris-MDP functionality (incl. warping-on-the-fly)

Tooling

Fujitsu Developer Suite for setup, debugging and application support

CGI Studio (2D & 3D)

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Block Diagram PRELIMINARY

1.3 Block Diagram

Figure 1-1: MB86R24 ’Triton-C’ Block Diagram

PWM

I²C

UARTUSART

GPIO

ext. IRQ16ch DMA

Gen. PurposeBus 16bit

DitheringGamma

SIG Unit

POWERVR™SGX543-MP1

3D EngineOpenGL ES

Iris Core2D Engine Display Ctrl

RGB

Display CtrlRGB, LVDS

Display CtrlRGB

SD/MMC

USB 2.0

DDR3/3L 800/106616/32/64-bit (2 x32)

L2 -Cache512kB

PWR MgmtWatchdog

Internal SRAM

CAN MediaLB®(under eval.)

Ethernet MACIEEE1588

ARM® Neon™ SIMD

ARM® Cortex™ -A9

533MHz

L1-Cache 32/32 kB

ARM® Neon™ SIMD

ARM® Cortex™ -A9

533MHz

HS-SPISPI

I²SL1-Cache 32/32 kB

Video Capture

Video Capture

Video CaptureMIPI-CSI2

Video Capture

Video Capture

Video Capture

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PRELIMINARY Package Dimensions

1.4 Package Dimensions

Figure 1-2: FCBGA-672P-M18 Package

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Preliminary Schedule PRELIMINARY

1.5 Preliminary Schedule

Hardware

Software

MB86R23 ’Triton-X’

Test chip only with some different features. Not planned for MP AvailableMB86R24 ’Triton-C’

Engineering Samples (ES) 2H 2013

Qualified Samples (CS incl. AEC-Q100) Q1 2015

MB86R24 ’Triton-C’Linux Board Support Package (BSP) + Graphic Driver Beta Version 1H 2014

Linux Board Support Package (BSP) + Graphic Driver Product Version Q1 2015

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WARRANTY AND DISCLAIMER

The contents of this document are subject to change without notice. Customers are advised to consultwith sales representatives before ordering.

The information, such as descriptions of function and application circuit examples, in this document arepresented solely for the purpose of reference to show examples of operations and uses of FUJITSUSEMICONDUCTOR EUROPE GMBH device.

FUJITSU SEMICONDUCTOR EUROPE GMBH does not warrant proper operation of the device withrespect to use based on such information. When you develop equipment incorporating the device basedon such information, you must assume any responsibility arising out of such use of the information.FUJITSU SEMICONDUCTOR EUROPE GMBH assumes no liability for any damages whatsoeverarising out of the use of the information.

Any information in this document, including descriptions of function and schematic diagrams, shall notbe construed as license of the use or exercise of any intellectual property right, such as patent right orcopyright, or any other right of FUJITSU SEMICONDUCTOR EUROPE GMBH or any third party ordoes FUJITSU SEMICONDUCTOR EUROPE GMBH warrant non-infringement of any third-party'sintellectual property right or other right by using such information. FUJITSU SEMICONDUCTOREUROPE GMBH assumes no liability for any infringement of the intellectual property rights or otherrights of third parties which would result from the use of information contained herein.

The products described in this document are designed, developed and manufactured as contemplatedfor general use, including without limitation, ordinary industrial use, general office use, personal use,and household use, but are not designed, developed and manufactured as contemplated (1) for useaccompanying fatal risks or dangers that, unless extremely high safety is secured, could have a seriouseffect to the public, and could lead directly to death, personal injury, severe physical damage or otherloss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, masstransport control, medical life support system, missile launch control in weapon system), or (2) for userequiring extremely high reliability (i.e., submersible repeater and artificial satellite).

Please note that FUJITSU SEMICONDUCTOR EUROPE GMBH will not be liable against you and/orany third party for any claims or damages arising in connection with above-mentioned uses of theproducts.

Any semiconductor devices have an inherent chance of failure. You must protect against injury, damageor loss from such failures by incorporating safety design measures into your facility and equipment suchas redundancy, fire protection, and prevention of over-current levels and other abnormal operatingconditions.

Exportation/release of any products described in this document may require necessary procedures inaccordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.

The company names and brand names herein are the trademarks or registered trademarks of theirrespective owners.

Fujitsu Semiconductor Europe GmbH - Graphics Competence CenterForstenrieder Str. 10, D - 82061 Neuried Germany

Tel: +49 (89) 218 938 - 0Fax: +49 (89) 218 938 - 401

http://emea.fujitsu.com/semiconductor

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