presentation 1

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10/22/2015 1 Integrated Electronics Dr. Abid Karim [email protected] Introduction Week-wise Course Break-up Remarks Topic to be Covered Week Introduction to Microelectronics 1. Basic Properties of Semiconductor Materials 2 Quiz is due Review of materies, structural and operational characteristics of basic Semiconductor Devices 3 Fabrication Processes: BJT and MOS fabrication processes, Design rules, Packaging of Integrated circuits 4 Deadline for Assignment # 1 Submission Fabrication Processes: Complexity of Integrated circuits 5 Differential Amplifier: A simple Design DC and AC analysis of Differential Amplifier 6 Quiz is due Op-Amp: Input offset voltage, input offset currents, input bias currents, offset compensation Op-amp with negative feedback 7 Op-amp with negative feedback DC and AC analysis of op-amp ICs Frequency Response of an op-amp 8 Mid Term Examinations

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Page 1: Presentation 1

10/22/2015

1

Integrated Electronics

Dr. Abid Karim [email protected]

Introduction

Week-wise Course Break-up Remarks Topic to be Covered Week

Introduction to Microelectronics 1.

Basic Properties of Semiconductor Materials 2

Quiz is due Review of materies, structural and operational characteristics of basic

Semiconductor Devices 3

Fabrication Processes: BJT and MOS fabrication processes, Design rules,

Packaging of Integrated circuits 4

Deadline for

Assignment # 1

Submission

Fabrication Processes: Complexity of Integrated circuits 5

Differential Amplifier: A simple Design

DC and AC analysis of Differential Amplifier 6

Quiz is due Op-Amp: Input offset voltage, input offset currents, input bias currents, offset

compensation

Op-amp with negative feedback

7

Op-amp with negative feedback

DC and AC analysis of op-amp ICs

Frequency Response of an op-amp

8

Mid Term Examinations

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2

Week-wise Course Break-up Remarks Topic to be Covered Week

Properties and Definitions of Digital Integretd Circuits: Introduction to Digital

Systems, Logic Operations, Digital IC Terminology (current and voltage

parameters of IC), FAN-IN, FAN-OUT, Transient characteristics, Propagation

Delay, Speed Power Product, Numarical Problems

9

Deadline for

Assignment

# 2

Submission

Logic Families: Resistor Transistor Logic, Diode Transistor Logic, Transistor

Transistor Logic, Schottky Transistor Transistor Logic, Advanced Schottky,

Emitter Coupled Logic, CMOS, BiMOS, Numarical Problems

10

Quiz is due Comparision and Interfacing of Logic Families, TTL to CMOS interfacing, ECL

with TTL Interfacing, Numarical Problems 11

MOSFET: Structure of MOSFET, N-Channel MOSFET, Threshold Voltage, Drift

Velocity & Mobility, States and Regions of Operation, Current –Voltage

Relations derivation of ID, VT

12

BiCMOS: BiCMOS Logic. NAND Gate, NOR Gate, Inverter in BiCMOS Logic 13

Square Wave Generators, 555 Timers, Schmitt Trigger 14

Quiz is due Astable logic Circuits, Monostable logic circuits 15

Deadline for

Assignment #

3 Submission

Digital To Analog convertersion methods 16

Final Examinations

Class Policies and Recommended Books • Marks Distribution:

• Assignments + Class Quizzes + Project(s) + Presentation(s)25% • Midterm Examination 25% • Final Examination 50%

• Assignments:

Assignments would be assigned at least one week before the due date and must be submitted on or before due date. No late assignment will be accepted. You have to be very careful while you are solving your assignment. Please do not try copy from someone else in order to avoid any problem at the end of the semester

• Recommended Books:

– Solid State Electronics Device by Ben G. Streetman , Sanjay Banerjee – Microelectronic Circuits by Adel S. Sedra & Kenneth C. Smith – Digital Integrated Circuits by Jan M. Rabaey, Anantha Chandrakasan &

Borivoje Nikolic – Digital Integrated Circuits by Thomas A. Demassa & Zack Ciccone

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The First Computer

The BabbageDifference Engine(1832)

25,000 parts

cost: £17,470

ENIAC - The first electronic computer (1946)

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The Transistor Revolution

First transistor

Bell Labs, 1947

The First Integrated Circuits

Bipolar logic

1960’s

ECL 3-input Gate

Motorola 1966

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Intel 4004 Micro-Processor

1971 1000 transistors 1 MHz operation

Intel Pentium (IV) Microprocessor

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What Next?

• Why is designing ICs different today than it was before?

• Will it change in future?

Moore’s Law

• In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months.

• He made a prediction that semiconductor

technology will double its effectiveness every 18 months

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Moore’s Law

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

1959

1960

1961

1962

1963

1964

1965

1966

1967

1968

1969

1970

1971

1972

1973

1974

1975

LO

G2 O

F T

HE

NU

MB

ER

OF

CO

MP

ON

EN

TS

PE

R IN

TE

GR

AT

ED

FU

NC

TIO

N

Electronics, April 19, 1965.

Evolution in Complexity

Page 8: Presentation 1

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8

Transistor Counts

1,000,000

100,000

10,000

1,000

10

100

1 1975 1980 1985 1990 1995 2000 2005 2010

8086

80286 i386

i486 Pentium®

Pentium® Pro

K 1 Billion

Transistors

Source: Intel

Projected

Pentium® II

Pentium® III

Moore’s law in Microprocessors

Transistors on Lead Microprocessors double every 2 years

4004 8008

8080 8085 8086

286 386

486 Pentium® proc

PII

0.001

0.01

0.1

1

10

100

1000

1970 1980 1990 2000 2010

Year

Tran

sist

ors

(M

T)

2X growth in 1.96 years! P4

PIII

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9

Die Size Growth

4004 8008

8080 8085

8086 286

386 486 Pentium ® proc

PII

1

10

100

1970 1980 1990 2000 2010

Year

Die

siz

e (

mm

)

~7% growth per year

~2X growth in 10 years

Die size grows by 14% to satisfy Moore’s Law

Frequency

PII

Pentium ® proc 486

386 286 8086 8085

8080

8008 4004

0.1

1

10

100

1000

10000

1970 1980 1990 2000 2010

Year

Fre

qu

en

cy (

Mh

z)

Lead Microprocessors frequency doubles every 2 years

Doubles every 2 years

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Power Dissipation

PII Pentium ® proc

486

386 286 8086

8085 8080

8008 4004

0.1

1

10

100

1971 1974 1978 1985 1992 2000 Year

Po

we

r (W

atts

)

Lead Microprocessors power continues to increase

Power will be a major problem

5KW 18KW

1.5KW

500W

4004 8008

8080 8085

8086 286

386 486

Pentium® proc

0.1

1

10

100

1000

10000

100000

1971 1974 1978 1985 1992 2000 2004 2008 Year

Po

we

r (W

atts

)

Power delivery and dissipation will be prohibitive

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Power density

4004 8008

8080 8085

8086

286 386

486 Pentium® proc

PII

1

10

100

1000

10000

1970 1980 1990 2000 2010

Year

Po

we

r D

en

sity

(W

/cm

2)

Hot Plate

Nuclear

Reactor

Rocket

Nozzle

Power density too high to keep junctions at low temp

Not Only Microprocessors

Digital Cellular Market (Phones Shipped)

1996 1997 1998 1999 2000

Units 48M 86M 162M 260M 435M Analog Baseband

Digital Baseband

(DSP + MCU)

Power Management

Small Signal RF

Power RF

(data from Texas Instruments)

Cell Phone

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Productivity Trends

1

10

100

1,000

10,000

100,000

1,000,000

10,000,000

200

3

198

1

198

3

198

5

198

7

198

9

199

1

199

3

199

5

199

7

199

9

200

1

200

5

200

7

200

9

10

100

1,000

10,000

100,000

1,000,000

10,000,000

100,000,000

Logic Tr./Chip

Tr./Staff Month.

x x x

x x x

x

21%/Yr. compound Productivity growth rate

x

58%/Yr. compounded Complexity growth rate

10,000

1,000

100

10

1

0.1

0.01

0.001

Logi

c Tr

ansi

sto

r p

er C

hip

(M

)

0.01

0.1

1

10

100

1,000

10,000

100,000

Pro

du

ctiv

ity

(K)

Tran

s./S

taff

- M

o.

Source: Sematech

Complexity outpaces design productivity

Co

mp

lexi

ty

24

Why Scaling?

• Technology shrinks by 0.7/generation

• With every generation can integrate 2x more functions per chip; chip cost does not increase significantly

• Cost of a function decreases by 2x

• But … – How to design chips with more and more functions?

– Design engineering population does not double every two years…

• Hence, a need for more efficient design methods – Exploit different levels of abstraction

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Integration Levels

1960 Small-Scale Integration (SSI)

1970 Medium-Scale Integration (MSI)

1974 Large-Scale Integration (LSI)

1985 very large-scale integration

(VLSI)

Over in

Late /1990

ultra-large-scale integration

Technology

• 10 µm • 3 µm • 1.5 µm • 1 µm • 800 nm (0.80 µm) • 600 nm (0.60 µm) • 350 nm (0.35 µm) • 250 nm (0.25 µm) • 180 nm (0.18 µm) • 130 nm (0.13 µm)

• 90 nm • 65 nm • 45 nm • 32 nm (Double Patterning) • 22 nm (End of Planar Bulk

CMOS) • 16 nm (Transition to

Nanoelectronics) • 11 nm (Nanoelectronics)

Feature Size

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Device Feature Size

• Feature size reductions enabled by process innovations.

• Smaller features lead to more transistors per unit area and therefore higher density.

Rapid Increase in Density of Microelectronics

Memory chip density

versus time.

Microprocessor complexity

versus time.

Page 15: Presentation 1

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Processor Transistor count Date of

introduction Manufacturer Technology Area

Intel 4004 2,300 1971 Intel 10 µm 12 mm²

Intel 8008 3,500 1972 Intel 10 µm 14 mm²

Motorola 6800 4,100 1974 Motorola 6 μm 16 mm²

Intel 8080 4,500 1974 Intel 6 μm 20 mm²

RCA 1802 5,000 1974 RCA 5 μm 27 mm²

Intel 8085 6,500 1976 Intel 3 μm 20 mm²

Zilog Z80 8,500 1976 Zilog 4 μm 18 mm²

Intel 8086 29,000 1978 Intel 3 μm 33 mm²

Intel 8088 29,000 1979 Intel 3 μm 33 mm²

Motorola 68000 68,000 1979 Motorola 3.5 μm 44 mm²

Intel 80286 134,000 1982 Intel 1.5 µm 49 mm²

Intel 80386 275,000 1985 Intel 1.5 µm 104 mm²

Intel 80486 1,180,235 1989 Intel 1 µm 173 mm²

Processor Transistor count Date of

introduction Manufacturer Technology Area

R4000 1,350,000 1991 MIPS 1.0 µm 213 mm²

Pentium 3,100,000 1993 Intel 0.8 µm 294 mm²

ARM 7 578977[3] 1994 ARM 0.5 µm 68.51 mm²

Pentium Pro 5,500,000[4] 1995 Intel 0.5 µm 307 mm²

AMD K5 4,300,000 1996 AMD 0.5 µm 251 mm²

Pentium II 7,500,000 1997 Intel 0.35 µm 195 mm²

AMD K6 8,800,000 1997 AMD 0.35 µm 162 mm²

Pentium III 9,500,000 1999 Intel 0.25 µm 128 mm²

AMD K6-III 21,300,000 1999 AMD 0.25 µm 118 mm²

AMD K7 22,000,000 1999 AMD 0.25 µm 184 mm²

Pentium 4 42,000,000 2000 Intel 180 nm 217 mm²

Atom 47,000,000 2008 Intel 45 nm 24 mm²

AMD K8 105,900,000 2003 AMD 130 nm 193 mm²

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Processor Transistor count Date of

introduction Manufacturer Technology Area

Itanium 2 McKinley 220,000,000 2002 Intel 180 nm 421 mm²

Cell 241,000,000 2006 Sony/IBM/Toshiba 90 nm 221 mm²

Core 2 Duo 291,000,000 2006 Intel 65 nm 143 mm²

Itanium 2 Madison 6M 410,000,000 2003 Intel 130 nm 374 mm²

AMD K10 quad-core 2M

L3 463,000,000[5] 2007 AMD 65 nm 283 mm²

AMD K10 quad-core 6M

L3 758,000,000[5] 2008 AMD 45 nm 258 mm²

Itanium 2 with 9MB

cache 592,000,000 2004 Intel 130 nm 432 mm²

Core i7 (Quad) 731,000,000 2008 Intel 45 nm 263 mm²

POWER6 789,000,000 2007 IBM 65 nm 341 mm²

Six-Core Opteron 2400 904,000,000 2009 AMD 45 nm 346 mm²

16-Core SPARC T3 1,000,000,000[7] 2010 Sun/Oracle 40 nm 377 mm²

Quad-Core + GPU Core

i7 1,160,000,000 2011 Intel 32 nm 216 mm²

Processor Transistor count Date of

introduction Manufacturer Technology Area

Six-Core Core i7 (Gulftown) 1,170,000,000 2010 Intel 32 nm 240 mm²

8-core POWER7 32M L3 1,200,000,000 2010 IBM 45 nm 567 mm²

8-Core AMD Bulldozer 1,200,000,000[8] 2012 AMD 32nm 315 mm²

Quad-Core + GPU AMD Trinity 1,303,000,000 2012 AMD 32 nm 246 mm²

Quad-Core + GPU Core i7 1,400,000,000 2012 Intel 22 nm 160 mm²

Quad-Core Itanium Tukwila 2,000,000,000[11] 2010 Intel 65 nm 699 mm²

8-core POWER7+ 80M L3 2,100,000,000 2012 IBM 32 nm 567 mm²

Six-Core Core i7/8-Core Xeon E5

(Sandy Bridge-E/EP) 2,270,000,000 [12] 2011 Intel 32 nm 434 mm²

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Processor Transistor count Date of

introduction Manufacturer Technology Area

8-Core Xeon Nehalem-EX 2,300,000,000[13] 2010 Intel 45 nm 684 mm²

10-Core Xeon Westmere-EX 2,600,000,000 2011 Intel 32 nm 512 mm²

Six-core zEC12 2,750,000,000 2012 IBM 32 nm 597 mm²

8-Core

Itanium Poulson 3,100,000,000 2012 Intel 32 nm 544 mm²

62-Core Xeon Phi 5,000,000,000 2012 Intel 22 nm

Xbox One Main SoC 5,000,000,000 2013 Microsoft 363 mm²

FPGA Transistor count Date of introduction Manufacturer Technology

Virtex ~70,000,000 1997 Xilinx

Virtex-E ~200,000,000 1998 Xilinx

Virtex-II ~350,000,000 2000 Xilinx 130 nm

Virtex-II PRO ~430,000,000 2002 Xilinx

Virtex-4 1,000,000,000 2004 Xilinx 90 nm

Virtex-5 1,100,000,000[21] 2006 Xilinx 65 nm

Stratix IV 2,500,000,000[22] 2008 Altera 40 nm

Stratix V 3,800,000,000[23] 2011 Altera 28 nm

Virtex-7 6,800,000,000[24] 2011 Xilinx 28 nm

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Design Abstraction Levels

n+ n+

S

G D

+

DEVICE

CIRCUIT

GATE

MODULE

SYSTEM

Views / Abstractions / Hierarchies

D.Gajski, Silicon Compilation, Addison Wesley, 1988

Architectural Logic

Circuit

Behavioral Structural

Physical

device

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300mm wafer, 90nm

90nm transistor (Intel)

P4 2.4 Ghz, 1.5V, 131mm2

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