presentation lecture1
TRANSCRIPT
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brick shaping
raw materials
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Moores Law in MicroprocessorsTransistors on lead microprocessors double every 2 years
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64
256
1,000
4,000
16,000
64,000
256,000
1,000,000
4,000,000
16,000,000
64,000,000
10
100
1000
10000
100000
1000000
10000000
100000000
1980 1983 1986 1989 1992 1995 1998 2001 2004 2007 2010
Year
Kb
itcapacity/chip
Evolution in DRAM Chip Capacity
1.6-2.4 m
1.0-1.2 m
0.7-0.8 m
0.5-0.6 m
0.35-0.4 m
0.18-0.25 m
0.13 m
0.1 m
0.07 m
human memoryhuman DNA
encyclopedia2 hrs CD audio
30 sec HDTV
book
page
4X growth every 3 years!
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Die Size Growth
4004
8008
80808085
8086286
386486Pentium proc
P6
1
10
100
1970 1980 1990 2000 2010
Year
Dies
ize
(mm
)
~7% growth per year
~2X growth in 10 years
Die size grows by 14% to satisfy Moores Law
Courtesy, Intel
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Clock Frequency
Lead microprocessors frequency doubles every 2 years
P6Pentium proc486
38628680868085
8080
80084004
0.1
1
10
100
1000
10000
1970 1980 1990 2000 2010
Year
Frequency
(M
hz
)
2X every 2 years
Courtesy, Intel
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Power Dissipation
P6Pentium proc
486
3862868086
80858080
80084004
0.1
1
10
100
1971 1974 1978 1985 1992 2000Year
Power(W
atts
)
Lead Microprocessors power continues to increase
Courtesy, Intel
Power delivery and dissipation will be prohibitive
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Power Density
40048008
80808085
8086
286386
486Pentium proc
P6
1
10
100
1000
10000
1970 1980 1990 2000 2010
Year
Power
Dens
ity
(W/cm
2)
Hot Plate
Nuclear
Reactor
RocketNozzle
Power density too high to keep junctions at low temp
Courtesy, Intel
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Design Productivity Trends
2003
1981
1983
1985
1987
1989
1991
1993
1995
1997
1999
2001
2005
2007
2009
Logic Tr./ChipTr./Staff Month.
xxx
xxx
x
21%/Yr. compoundProductivity growth rate
x
58%/Yr. compoundedComplexity growth rate
10,000
1,000
100
10
1
0.1
0.01
0.001
Log
icTran
sistorper
Chip(M
)
0.01
0.1
1
10
100
1,000
10,000
100,000
Pro
duc
tiv
ity
(K)Tra
ns./
Staff-
Mo.
Comp
lex
ity
Courtesy, ITRS Roadmap
Complexity outpaces design productivity
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How far can light travel in 1 clocksignal?
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Major Design Challenges Microscopic issues
ultra-high speeds
power dissipation andsupply rail drop
growing importance ofinterconnect
noise, crosstalk
reliability, manufacturability
clock distribution
Macroscopic issues
time-to-market
design complexity(millions of gates)
high levels of abstractions
reuse and IP, portability
systems on a chip (SoC)
tool interoperability
Year Tech. Complexity Frequency 3 Yr. Design
Staff Size
Staff Costs
1997 0.35 13 M Tr. 400 MHz 210 $90 M
1998 0.25 20 M Tr. 500 MHz 270 $120 M
1999 0.18 32 M Tr. 600 MHz 360 $160 M
2002 0.13 130 M Tr. 800 MHz 800 $360 M