presented by : moran katz and zvika pery mentor: moshe porian
DESCRIPTION
Internal Logic Analyzer. Presented By : Moran Katz and Zvika Pery Mentor: Moshe Porian. Project’s goal. Design an internal logic analyzer to the FPGA which will be an independent part and will: (1) Get configurations from the user (2) Record the chosen signals - PowerPoint PPT PresentationTRANSCRIPT
![Page 1: Presented By : Moran Katz and Zvika Pery Mentor: Moshe Porian](https://reader036.vdocument.in/reader036/viewer/2022062408/5681398a550346895da11fa9/html5/thumbnails/1.jpg)
Presented By: Moran Katz and Zvika Pery
Mentor: Moshe Porian
Internal Logic Analyzer
![Page 2: Presented By : Moran Katz and Zvika Pery Mentor: Moshe Porian](https://reader036.vdocument.in/reader036/viewer/2022062408/5681398a550346895da11fa9/html5/thumbnails/2.jpg)
Project’s goal
• Design an internal logic analyzer to the FPGA which will be an independent part and will:
(1) Get configurations from the user (2) Record the chosen signals
(3) Send relevant data back to the user
USER
Internal Logic
Analyzer
WaveForm
Configurations Relevant Data
![Page 3: Presented By : Moran Katz and Zvika Pery Mentor: Moshe Porian](https://reader036.vdocument.in/reader036/viewer/2022062408/5681398a550346895da11fa9/html5/thumbnails/3.jpg)
Implementation
The system save all the incoming data, and according user configurations detect trigger rise and send back the relevant data
CLK
TRIGGER
DATA DATA
INPUT OUTPUT
RISE
![Page 4: Presented By : Moran Katz and Zvika Pery Mentor: Moshe Porian](https://reader036.vdocument.in/reader036/viewer/2022062408/5681398a550346895da11fa9/html5/thumbnails/4.jpg)
Integration
UART IN RX PATH
WBM
OUTPUT BLOCK
WhishBoneintercon
Signal Generator
InternalLogic
AnalyzerCore
WBM
WBS
WBM
WBS
TX PATH
WBM
WBS
UART OUT
USER WBS
WBM- Whishbone MasterWBS-Whishbone Slave
![Page 5: Presented By : Moran Katz and Zvika Pery Mentor: Moshe Porian](https://reader036.vdocument.in/reader036/viewer/2022062408/5681398a550346895da11fa9/html5/thumbnails/5.jpg)
Possible Applications
The system can be used for an easy, comfortable and smart debug in any FPGA board regardless the manufacture.furthermore it can be use in any device who support the UART protocol.