presented by: reshef schreiber itay leibovitz

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Presented by: Presented by: Reshef Schreiber Reshef Schreiber Itay Leibovitz Itay Leibovitz Instructed by: Instructed by: Eran Segev Eran Segev

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Serial Communication Daughter Board for the DSP C6711 Evaluation Board Part A Final DR. Presented by: Reshef Schreiber Itay Leibovitz. Instructed by: Eran Segev. Project Objectives. Hardware Board development: sits on TI’s DSP evaluation board. Software - PowerPoint PPT Presentation

TRANSCRIPT

Presented by:Presented by:

Reshef SchreiberReshef SchreiberItay LeibovitzItay Leibovitz

Instructed by:Instructed by:

Eran SegevEran Segev

Project ObjectivesProject Objectives

Hardware Board development: sits on TI’s DSP evaluation board.

Software Drivers development: using the DSP as our CPU

Board ObjectivesBoard Objectives

The Serial Communication Board (SCB) enables the DSP developer to interface to the commercial DSP evaluation board using USB common serial channels and by that expanding its I/O capabilities

The SCB interfaces mechanically and electrically to the External Memory Interface (EMIF) connectors of the evaluation board

DSP Evaluation BoardDSP Evaluation Board

SCB InterfaceSCB Interface

SCB USBExternal Memory Interface (EMIF)

Power

3.3 V

Interrupts

DLP – USB245MDLP – USB245M featuresfeatures

Protocol is handled automatically within the module

384 byte FIFO Transmit buffer / 128 byte FIFO receive buffer for high data throughput

Send / Receive Data over USB at up to 1 M Bytes / sec

Integrated 6MHZ – 48MHZ clock multiplier PLL

USB 1.1 and USB 2.0 compatible

USB Read CycleUSB Read Cycle

• When RXF# is low, at least 1 byte is present in the FIFO’s 128- byte receive buffer and is ready to be read with RD. RXF# goes high when the receive buffer is empty

USB Write CycleUSB Write Cycle

• When TXE# is high, the FIFO’s 385 byte transmit buffer is full, or busy storing the last byte written.

EMIFEMIF The memory signals required for the daughter-The memory signals required for the daughter-

card interface connectors are:card interface connectors are: Address pinsAddress pins

7 address signals of the DSP are provided to give the address space to the daughtercard.

Data pinsData pins 8 data signals are provided to facilitate access to memory and

parallel peripherals. Chip SelectChip Select

CE2 is provided to access individual memory and I/O space. Byte EnableByte Enable

BE0 is used in order to access the first byte in a 32bit word .

SCB block diagramSCB block diagram

Evaluation Board

Interface(FPGA)

USBModule

External Memory Interface (EMIF)

Interrupts

Data Bus

USB_RD

USB_WR

TXE

RXF

Data

FPGA block diagramFPGA block diagram

AddressDecoder

Data_OutMux

TestRegister

EAD(6:0)

CE2BE0

AWE

ARE

Data Bus

USB_CSUSB_RDUSB_WR

Select

Reg_CS

TXERXFBOARD_IDReset_OutSleepVCC_Out

Data out

FPGA FunctionsFPGA Functions

Address decoding for three peripherals : The USB module (R/W) Controls buffer (Read only) Test register (R/W)

Generating USB read and write cycles The Test register is used to verify that the SCB is present and

functioning The Controls Buffer enable polling of the USB control

signals (TXE,RXF)

The Controls BufferThe Controls Buffer

TXERXFBOARDID *

VCC Out *

Reset Out *

Sleep *00

* Not used functionally

USB_CNT EntityUSB_CNT Entity

Chip SelectDecoder

USB ControlsLogic

EAD(6:0)

BE0

CE2

ARE

AWE

USB_CS

Reg_CS

Cnt_CS

USB_WR

USB_RD

Memory MapMemory Map

0xA0000000 USB

Controls

Test_Register

EMIF Address D(31:24) D(23:16) D(15:8) D(7:0)

0xA0000004

0xA0000008

XX

XX

X

X

X X X

Software ObjectivesSoftware Objectives

The software package currently includes: Drivers supply the ability to read and write from

the USB in 2 ways: Polling Interrupts

Those drivers run on the DSP.

USB drivers run on a PC (supplied with the USB module).

The Software (Main function)The Software (Main function)

Evaluating Control Registers

Checking Existence of SCB

While(1)

Evaluating Control RegisterEvaluating Control Register

CE2CTL – handles read/write timings to EMIF where our USB is present

We evaluated the CE2CTL to 0x3233CB03 which means:

In write cycle : write setup = 30ns

write strobe = 80ns

write hold = 30ns

In read cycle : read setup = 30ns

read strobe = 110ns

read hold = 30ns

Timer RegistersTimer RegistersTimer Control Reister – mainly deals with the referenced clock. We evaluated

it to be the internal CPU clock divided by 4.

Timer Period Register - The timer period register contains the number of timer input clock cycles to count. This number controls the frequency.

We evaluated it to 0x00000001 which means – input clock divided by 2

For conclusion the altera that is connected to TOUT pin gets a 20Mhz

Clock that is the internal CPU clock divided by 8.

USB ReadUSB Read

unsigned char read_usb(void){

unsigned char *pUsb_Chip;pUsb_Chip =(unsigned char *)USB_CHIP_ADDR;

while (reciever_buff_ready() == NOT_READY);return *(pUsb_Chip);

}

unsigned char reciever_buff_ready(void){

unsigned char *pControl;pControl =(unsigned char *)USB_CONTROL_ADDR;

if((*(pControl)& RXF_MASK) != 0)return(NOT_READY);

elsereturn(READY);

}

The read_usb() function waits until the receiver buffer is ready to be read, and then reads the next byte.

The receiver_buff_ready() function verifies that the receiver buffer is ready by polling the RXF bit.

USB WriteUSB Write

void write_usb(unsigned char data){

unsigned char *pUsb_Chip;pUsb_Chip=(unsigned char *)USB_CHIP_ADDR;

while (xmitter_buff_ready() == NOT_READY);*(pUsb_Chip)= data;

}

unsigned char xmitter_buff_ready(void){

unsigned char *pControl;pControl=(unsigned char *)USB_CONTROL_ADDR;

if((*(pControl)& TXE_MASK) != 0)return(NOT_READY);

elsereturn(READY);

}

The write_usb() function waits until the transmitter buffer is ready to receive the next byte, and then writes it .

The xmitter_buff_ready() function verifies that the transmitter buffer is ready to receive the next byte by polling the TXE bit.

Read InterruptsRead Interruptsstatic void interrupt HRD_prvISR_USB_RX(void){

extern unsigned char ReadTailPtr;register unsigned int *pRamMemory;pRamMemory = (unsigned int *)0x80000000;

INTR_CLR_FLAG(CPU_INT5);

*(pRamMemory + ReadTailPtr++) = read_usb_intr();

if (ReadTailPtr > 999)ReadTailPtr = 0;

}

this function is the interrupt function. Every time the RXF goes down to 0 the CPU jumps to this function. This function reads the next byte from the receiver buffer and writes it to the current offset (RxWritePtr) from pRamMemory that’s mapped to SDRAM at 0x80000000.

unsigned char read_usb_intr(void){ unsigned char *pUsb_Chip; pUsb_Chip = (unsigned char *)USB_CHIP_ADDR; return *(pUsb_Chip);}

This read function doesn’t need to wait until the receiver buffer is ready to be read.

DemonstrationDemonstration

Evaluating registers Checking existence of SCB

Writing 0xAB to the altera register Reading from the altera register and comparing the value to 0xAB

Creating 1000 bytes buffer for reading from USB Initializing offset pointers and start point

Sending data from the USB test application Upon receiving an interrupt storing the data in the buffer While loop for checking new data in buffer and writing it

back to the USB.