product overview • strategic direction · design security. k050 k130 k180 k270 ... usb 2.0 480...
TRANSCRIPT
© 2001 Actel Confidential and Proprietary 2Corporate Presentation - 4Q01
Actel Overview
Established FPGA SupplierFirst Product Shipped - 1988
$226M in sales in 2000, 32% growth over 1999
Strong balance sheet - $135M cash, no debt
More than 500 employees
16% R&D spending in 2000
Three FPGA technologies availableAntifuse, Flash, SRAM
Substantial FPGA patent portfolio (170+)
Forbes list of “200 Best Small Companies in America”
Included in S & P Smallcap 600 Index
© 2001 Actel Confidential and ProprietaryCorporate Presentation - 4Q01
Actel’s 3-Tier Aerospace Business Model Differentiation
Rad Rad HardHardRadiation Survivability EssentialRisk vs. cost concernLong Life 10-15 yearsMission Failure disastrousMilitary & Deep Space Missions
Rad Rad TolerantTolerantRadiation Survivability ImportantCost vs. risks concernShort Life 5-7 years LEO Satellites
Military/ Aerospace/High ReliabilityMilitary/ Aerospace/High ReliabilityRadiation Survivability not criticalGenerally Mil-Std 883 or Mil-TempAvionics, munitions, ground basedequipmentHarsh Industrial Environments
Key ParameterKey Parameter
Military/Avionics Military/Avionics & &
Other Other HiRelHiRel
Rad Rad TolerantTolerant
Rad Rad HardHard
Mar
ket S
egm
enta
tion
Mar
ket S
egm
enta
tion
Total DoseTotal Dose
SEU SEU ImmunityImmunity
Harsh Harsh EnvironmentsEnvironments
Long LifetimeLong Lifetime
© 2001 Actel Confidential and Proprietary 4Corporate Presentation - 4Q01
Actel Product Spectrum Today
RHRHRH
ProASICPLUSProASICProASICPLUSPLUS
3,000 10,000 100,000 1M 2M
ProASICProASICProASIC
SX-ASXSX--AA
Radiation Hard
Radiation Tolerant
Military/Avionic/HiRel
RTSX-SRTSXRTSX--SSRTAX-S (Planned)RTAXRTAX--S (Planned)S (Planned)
Customer Customer NeedNeed
Density
Harsh EnvironsHarsh EnvironsLong LifeLong Life
SEU ImmunitySEU Immunity
Total DoseTotal Dose
© 2001 Actel Confidential and Proprietary 5Corporate Presentation - 4Q01
Actel YTD 2001 Revenue Profile
By Market SegmentConsumer
1%Computing
3%Industrial/Other19%
Mil/Aero24% Communications
53%
By Geographical SegmentPan-Asia
10%
Europe29%
North America61%
© 2001 Actel Confidential and Proprietary 7Corporate Presentation - 4Q01
Antifuse Product OfferingBenefits of antifuse FPGA technology
High performanceLow powerSingle-chip
SecureLive at power-upCost effective
Product Process K Gates Max I/O Leading features
SX-A 0.22um 108 360 Performance, non-volatile features
eX 0.22um 12 130 1/6 power of typical CPLD (64-256 mcell)
RTSX-S 0.22um 108 205 SEU immune with built-in TMR
Express 0.15um 2000 684 Performance, interface features
Product Process K Gates Max I/O Leading features
SX-A 0.22um 108 360 Performance, non-volatile features
eX 0.22um 12 130 1/6 power of typical CPLD (64-256 mcell)
RTSX-S 0.22um 108 205 SEU immune with built-in TMR
Express 0.15um 2000 684 Performance, interface features
© 2001 Actel Confidential and Proprietary 8Corporate Presentation - 4Q01
SX-A Family
250 MHz systemperformanceLow powerSingle-chipLive at power-upHot-swap supportMixed-voltage support
2.5V, 3.3V, 5VCost leadership for high-volume apps
SX08A SX16A SX32A SX72A
System Gates 12k 24k 48k 108k
Logic Modules 768 1452 2880 6036
Registers 256 528 1080 2012
Max User I/O 130 177 249 360
© 2001 Actel Confidential and Proprietary 9Corporate Presentation - 4Q01
SX-A LeadershipPerformance leadership versus mainstream competition
20ns
15ns
10ns
5ns
0ns
Spartan2-6 13 14.65 16.18 14 14.76 9.8 15 16 11.1
SXA-3 8.2 11.1 11.9 7.6 9.2 8.9 11.7 8.2 7.9
CTL INTF960 INT_TOP MCDATA OMC_TOP CIGABIT2 PHOTOPR STSTOP FPGA1
Reg
-Reg
Pos
tlayo
ut
Customer Designs
© 2001 Actel Confidential and Proprietary 10Corporate Presentation - 4Q01
RTSX-S Family
FeaturesDesigned specifically for Space ApplicationsUp to 2,012 SEU Hardened Flip-Flops eliminate Software TMR DesignSingle Event Latch-up ImmuneSupports Hot-Swapping and Cold SparingConfigurable I/O Support 3.3V/5.0V PCI, LVTTL, TTL and CMOSSecure Programming Technology prevents reverse engineeringSX-A Pin compatibility for prototyping with commercial devicesQML Certified Devices
SX32S SX72S
System Gates 48k 108k
Logic Modules 2880 6048
Registers 1080 2016
Max User I/O 224 205Packages CQ208 CQ256
CQ208 CQ256
SX32S SX72S
System Gates 48k 108k
Logic Modules 2880 6048
Registers 1080 2016
Max User I/O 224 205Packages CQ208 CQ256
CQ208 CQ256
© 2001 Actel Confidential and Proprietary 11Corporate Presentation - 4Q01
RTSX-S SEU Leadership
E-06
E-07
E-08
E-09
E-10
E-11
E-12
Cro
ss S
ectio
n
SRAM FPGA
RTSX32S
Practical SEU Immunity
0 10 20 30 40 50 60 70 80
LET (MeV-cm²/mg)
© 2001 Actel Confidential and Proprietary 12Corporate Presentation - 4Q01
Flash Product OfferingBenefits of flash FPGA technology
Lowest power in its classIn-system programmableNon-volatileSingle-chip
SecureLive at power-upFine grained arch. for ASIC flowFlash to ASIC/Conversion Program
Product Process K Gates Max I/O Leading features
ProASIC 0.25um 475 440 ASIC alternative, single-chip
ProASICPLUS 0.22um 1000 712 ASIC design flow, security lock
Product Process K Gates Max I/O Leading features
ProASIC 0.25um 475 440 ASIC alternative, single-chip
ProASICPLUS 0.22um 1000 712 ASIC design flow, security lock
© 2001 Actel Confidential and Proprietary 13Corporate Presentation - 4Q01
ProASIC A500K Family
FeaturesReprogrammableLive at power-upSingle-ChipLow Power
ASIC AlternativeFine Grain ArchitectureRegister rich ASIC Design Flow
FIFO Control LogicDesign Security
K050 K130 K180 K270
System Gates 100k 290k 370k 475k
Max Registers 5.4k 12.8k 18.4k 26.9k
RAM Bits 14K 45k 54k 63k
RAM Blocks 6 20 24 28
Max User I/O 204 306 362 440
Packages PQ208 PQ208 PQ208 PQ208
BG272 BG272 BG456 BG456
FG144 BG456 FG256 FG672
© 2001 Actel Confidential and Proprietary 14Corporate Presentation - 4Q01
ProASICPLUS OverviewEnhancements from the ProASIC architecture
0.22m 4LM Flash-Based CMOS FPGAIncreased programmable logic up to 56K registers
Double the high-performance routing resources Two PLLs (1.5 to 240 MHz) with multiply, divide and delay optionsTwo high speed LVPECL differential pairs (Clock or Data inputs)Higher performance I/Os with 50 MHz PCIImproved In-system programming
Larger amount of configurable SRAM up to198kbits
© 2001 Actel Confidential and Proprietary 15Corporate Presentation - 4Q01
ProASICPlus Family
System Gates
Max Registers
EmbeddedRAM Bits
Max User I/O
Packages
APA150
150,000
6,144
36k
232
PQ 208
BG 456
FG 144
FG 256
APA300
300,000
8,192
72k
280
PQ 208
BG 456
FG 144
FG 256
APA450
450,000
12,288
108k
332
PQ 208
BG 456
FG 144
FG 256
APA600
600,000
21,504
126k
472
PQ 208
BG 456
FG 256
FG 676
APA750
750,000
32,678
144k
232
PQ 208
BG 456
FG 676
FG 869
APA1000
1,000,000
56, 320
198k
712
PQ 208
BG 456
FG 896
FG 1152
© 2001 Actel Confidential and Proprietary 16Corporate Presentation - 4Q01
ProASIC/ProASICPLUS
In-System Programming
ProASICPLUS enhanced ISP features
Micro-processor interface Chip remains powered-up during programming
ISP Demo Board available in 1Q02Program daisy chained devicesApplication note & user guide provided
App note includesBoard schematicsBill of materialsSoftware requirements for ISP interface
© 2001 Actel Confidential and Proprietary 17Corporate Presentation - 4Q01
ProASICPLUS In-System Programmer
Small form factor - 24 in3
Low cost Hardware features
Small 26-pin header20” ribbon cableECP parallel port
Software featuresWin 95/98/NT/00 O/SSTAPL supportDaisy chain capabilityLog file generation
© 2001 Actel Confidential and Proprietary 18Corporate Presentation - 4Q01
Flash to ASIC Conversion Program
Certified ASIC Partner-Farady ASICs fabricated by UMCFacilitated by ProASIC fine grain architectureMinimizes conversion risksSupports all ProASIC partsSupports PQ and BGA packagesSupports Commercial and Industrial temperaturesLow risk and cost effective
© 2001 Actel Confidential and Proprietary 19Corporate Presentation - 4Q01
Actel Product Spectrum
Markets
eXeX
ExpressExpress
ProASICPLUSProASICPLUS
3,000 10,000 100,000 1M 2M
ProASICProASIC
SX-ASX-A
FullFeatured
FPGA
EconomyFPGA
CPLDEquivalent
Density
© 2001 Actel Confidential and Proprietary 21Corporate Presentation - 4Q01
Opportunity for Embedded FPGA
109876543210
2000 2001 2002 2003 2004
Worldwide UPL Shipments
$BEPGAFPGACPLDSPLD
CPLD & FPGA market position fund EPGA opportunityActel SoC/EPGA strategies: BridgeFPGATM & VariCoreTM
© 2001 Actel Confidential and Proprietary 22Corporate Presentation - 4Q01
Increasing Bandwidth in the Network
DSL Modem
OC-3/STM-1
155 Mbps
Core Switch
USB 2.0480 Mbps
IEEE 1394400 Mbps
EnterpriseGateway
GigabitEthernet1.0 Gbps
Server
FibreChannel1.0 Gbps
PCPC
10/100 Ethernet100 Mbps
MAN Router
OC-12 / STM-4622 Mbps
Core Switch
OC-192 / STM-6410 Gbps
OC-48 / STM-162.5 Gbps
MAN Router
OC-12 / STM-4622 Mbps
ADSL 1.5 Mbps
ISP DSLAMEach generation brings
More speedNew standardsInteroperability challenges
MP3Player
Mass StorageDigital
Camera
© 2001 Actel Confidential and Proprietary 23Corporate Presentation - 4Q01
Communications Interfaces
10
100
1,000
10,000
100,000
Local I/O Bus Backplane System Area Network
Local Area Network
Wide Area Network
PCI-X
PCI
PCI-X
PCI
USB1.1USB1.1
USB2.0USB2.0
10/100Ethernet10/100
Ethernet
GigabitEthernetGigabit
Ethernet
Sonet / SDHOC-768 / STM-256Sonet / SDH
OC-768 / STM-256
Sonet / SDHOC-48 / STM-16Sonet / SDH
OC-48 / STM-16
Sonet / SDHOC-12 / STM-4Sonet / SDHOC-12 / STM-4
10 GigabitEthernet
10 GigabitEthernet
SCSIUltra160SCSI
Ultra160
SCSIUltra320SCSI
Ultra320 2G FiberChannel2G FiberChannel
10G FiberChannel
10G FiberChannel
InfiniBandInfiniBandSonet / SDH
OC-192 / STM-64Sonet / SDH
OC-192 / STM-64
CSIX
XAUI,XGMIIXAUI,XGMII
Ban
dwid
th -
Mbp
s
SPI-3PoS-PHY3FlexBus3
SPI-3PoS-PHY3FlexBus3
SPI-4PoS-PHY4FlexBus4
SPI-4PoS-PHY4FlexBus4
RapidIO
HyperTransportHyperTransport
SPI-5SPI-5
IEEE1394IEEE1394
3GIO
© 2001 Actel Confidential and Proprietary 24Corporate Presentation - 4Q01
Actel Focuses on Interoperability
BridgeFPGATM
ASIC/ASSP
ASIC/ASSP
GP FPGA+ Soft IP
VariCoreTM
EPGA
General purpose FPGA combined with soft-IP
BridgeFPGATM, configurable bridges for emerging standards
VariCoreTM embedded FPGA cores
© 2001 Actel Confidential and Proprietary 25Corporate Presentation - 4Q01
BridgeFPGATM Concept
High-speed I/OUp to 3.125GbpsMultiple standards
ASIC for performance, cost & powerFGPA for flexibility
Control & memory interfaceProtocol translation
Fast-turn methodologySupports emergingstandards
General Purpose I/O
General Purpose I/O
PHY
PHY
General Purpose FPGA CORE
ConfigurableProtocol
Controllers
ConfigurableI/O
(LVDS, …)
Control System (uP, PCI, PCI-X, ...)
Memory System (ZBT, DDR, QDR)H
igh
Spee
d D
ata
ASIC
ASIC
© 2001 Actel Confidential and Proprietary 26Corporate Presentation - 4Q01
VariCore EPGATM FamilyLicensable FPGA core
0.18um SRAM FPGA technologyBlock sizes: 5K - 40K ASIC gates2K ASIC gates/mm20.13um in development
UMC, CSM & TSMC processesProduct Support
Complete development environmentDebug/probing capabilityDevelopers kit with eval boardFlow support for most popular SoC EDA toolsEmbedded configuration, power control, BIST, & JTAG interfaces
© 2001 Actel Confidential and Proprietary 27Corporate Presentation - 4Q01
SummaryActel’s antifuse technology delivers
High performanceLow powerSecureLive at power-up
Actel’s Flash technology deliversNonvolativity and reprogrammabilityLow powerSecureLive at power-up
Strategic developmentsLicensable VariCoreTM FPGA cores to enable PSOCBridgeFPGATM addresses interoperability needs