programming the svga
TRANSCRIPT
-
8/16/2019 Programming the SVGA
1/4
SVGA (Super Video Graphics Array) Library
Introduction to SVGA
A long time ago, IBM defined the first video standards, MDA (monochrome), CGA, EGA and the
MCGA. In 19! the "GA #as released. As the com$%ter mar&et gre#, more video card
man%fact%res created hi'res cards. o#ever, the #ere not created after an &ind of standard.
*+-+-/*, for e-am$le, had, and still has, n%m0er h on one card, *h on another and +/hon a third. 2hat #as not all, the 0an& si3e (refer section +) differed, the #ere overla$$ing... 4o%
get the $ict%re, 56 72A5DA8D
:rogrammers therefore had to #rite several different drivers for each and ever card, and as& the
com$%ter or the %ser #hat driver to %se. 2he man%fact%rers got together and created the "ideo
Electronics 7tandards Association ("E7A). "E7A defined a ne# standard so that $rogrammers ;%st had to #rite a single set of gra$hic ro%tines. 2he called it "E7A "BE ("E7A "ideo Bios
E-tensions), and has nothing to do #ith "E7A (A?+>).All f%nctions ret%rn +> in A@ if the are s%ccessf%l. 2he
s%0 f%nction val%e is stored in A< register.
7%0 f%nction ' get "E7A information
7%0 f%nction 1 ' get "E7A mode information7%0 f%nction ' set "E7A video mode
7%0 f%nction ' get c%rrent video mode
7%0 f%nction + ' saverestore "E7A video state
7%0 f%nction / ' 0an& s#itching
7%0 f%nction * ' getset logical scan line length
7%0 f%nction ! ' getset dis$la start
7%0 f%nction ' getset DAC $alette control
!. Video "odes#
"ode $eso%ution &o%ors Ban's "eory
h *+-+ /* + /*0
11h *+-+ /* / 0
1h -* 1* + /*0
1h -* /* /10
1+h 1+-!* 1* 190
1/h 1+-!* /* 1 !*0
-
8/16/2019 Programming the SVGA
2/4
1*h 1-1+ 1* 1 .!M0
1!h 1-1+ /* 1.M0
1h -* te-t
19h 1-/ te-t
1Ah 1-+ te-t1Bh 1-/ te-t
1Ch 1-* te-t
1Dh - & 10
1Eh - *+& 10
1>h - 1*.M 190
11h *+-+ & 1 .!M0
111h *+-+ *+& 1 .!M0
11h *+-+ 1*.M 1/ 1.M0
11h -* & 1/ 1.M0
11+h -* *+& 1/ 1.M0
11/h -* 1*.M 1.+M0
11*h 1+-!* & + 1./M0
11!h 1+-!* *+& + 1./M0
11h 1+-!* 1*.M * .M0
119h 1-1+ & + ./M0
11Ah 1-1+ *+& + ./M0
11Bh 1-1+ 1*.M * .!M0
2o set desired mode set A@ to -+> and B@ to the mode n%m0er.
. Ban' S*itchin+#
e #ill 0e having an address s$ace that is less than the accessi0le memor. 2h%s o% need to
shift the 0eginning of the #indo# to access certain $arts of the memor.
,. SVGA "ode Info#
2he 7"GA Mode info 0loc& is %sed to hold the information ret%rned 0 the interr%$t -1h #hen
s%0f%nction -1 is %sed. 2his 0loc& is %sed for addressing the $i-els, calc%late 0an& si3e,etc
2he 7"GA Mode Info ta0le is given 0elo#.
-ae ffset Si/e(Bytes) escription
ModeAttri0%tes Mode Attri0%tes
inAAttri0%tes 1 indo# A attri0%tes
inBAttri0%tes 1 indo# B attri0%tes
inGran%larit + indo# gran%larit
in7i3e * indo# si3e
inA7egment 7egment address of indo# A
-
8/16/2019 Programming the SVGA
3/4
inB7egment 1 7egment address of #indo# B
in>%nc:tr 1 + Address of the indo# >%nction Call
Btes:er7can
-
8/16/2019 Programming the SVGA
4/4
6ie% 1 6ie% 2
Byte 1 Byte 2 Byte ! Byte
GGGBBBBB 88888GGG GGGBBBBB 88888GGG
!28 or 1,3bit co%or odes# 6ne $i-el loo&s li&e this. 5ote that the highest 0it in 0te t#odoesnFt affect the $i-els color. It can 0e %sed for trans$arenc etc.
6ie%
Byte 2 Byte 1
88888GG GGGBBBBB
6ie% 1 6ie% 2
Byte 1 Byte 2 Byte ! Byte
GGGBBBBB 88888GG GGGBBBBB 88888GG
9. 2,:2,8 co%or odes# As the famo%s mode 1h all /* color modes are inde-ed. 2he :i-eladdress is calc%lated as y4bytesper%ine5
6ie%
Bte 1
IIIIIIII
;. The VGA $e+ister Set2he registers #hich are common to all "GAs fall into si- ma;or gro%$s=
Seh
Attri0%te Controller ''''' Ch C1h
DAC C*h,C!h ''''' Ch,C9h