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High-Speed Circuits & Systems Lab. Dept. of Electrical and Electronic Engineering Yonsei University Project 1 Design Guide

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Page 1: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

High-Speed Circuits & Systems Lab.

Dept. of Electrical and Electronic Engineering

Yonsei University

Project 1

Design Guide

Page 2: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Introduction

This Project is composed of 3 parts

1. Single – Stage Differential Amplifier

2. Cascode Amplifier

3. Two – Stage OTA

Deadline : Submit hardcopy

until 2:00 PM on May. 4, 2017 @ B629

Page 3: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Single – Stage Differential Amplifier

• Design specification

Parameter Value

Av > 20 dB

BW > 120 MHz

CMRR > 60 dB

ICMR > 1.4 V

Power < 1.25 mW

Page 4: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Simulation Tips

Set DC to 0Vdc

Set ACMAG to 1 (Important!)

• Differential input pair setting

Page 5: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Simulation Tips

• Differential input pair setting

𝑽𝑪𝑴 + 𝟎. 𝟓 ∆𝑽

𝑽𝑪𝑴 − 𝟎. 𝟓 ∆𝑽

∆𝑽

Part name : E

Page 6: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Simulation Tips

• Output Plot

DC Gain > 20 dB

3dB Bandwidth > 120 MHz

Page 7: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Simulation Tips

• Gain measuring

⇒ Using VDB Marker!

Page 8: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Simulation Tips

• BW measuring

-3dB

Your Bandwidth

Click Toggle cursor

Page 9: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Simulation Tips

• CMRR

CMRR = |Adm/Acm|

But our gains are dB scale,

CMRR (dB) = Adm (dB) – Acm (dB)

< Common Mode Gain >

Page 10: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Simulation Tips

• ICMR

𝑽𝑴𝑨𝑿

ICMR = 𝑽𝑴𝑨𝑿 − 𝑽𝑴𝑰𝑵 > 1.4 V

Gain < 20dB

Page 11: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Cascode Amplifier

• Design specification

Parameter Value

Av > 34 dB

BW > 250 kHz

Output

Impedance> 30kΩ

Power < 1.25 mW

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Simulation Tips

• Output Plot

DC Gain > 34 dB

3dB Bandwidth > 250 kHz

Page 13: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Simulation Tips

• Output Impedance

Gain = 𝒈𝒎 × Output Impedance

You need to calculate 𝒈𝒎 =𝝏𝑰𝑫

𝝏𝑽𝑮𝑺to

calculate output impedance

𝒈𝒎

𝑹𝑶𝑷

𝑹𝑶𝑵

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Simulation Tips

• Plot differentiating

DC Gain > 34 dB

3dB Bandwidth > 250 kHz

1) Click Add Trace

3) Choose signal what you want to differentiate

2) Select D( )

example

Then, your plot is differentiated by x-axis’ variable what you have sweeped.

Page 15: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Two – Stage OTA

DC Gain > 34 dB

3dB Bandwidth > 250 kHz

• Design specification

Parameter Value

Av > 76 dB

BW > 25 kHz

Phase

Margin> 75 o

CMRR > 75 dB

ICMR > 0.4 V

Power < 2.5 mW

Page 16: Project 1 Design Guide - tera.yonsei.ac.krtera.yonsei.ac.kr/class/2017_1_1/test_problems/Project1 Design Guid… · Project 1 Design Guide. 2 Introduction This Project is composed

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Two – Stage OTA

DC Gain > 34 dB

3dB Bandwidth > 250 kHz

• Phase margin measuring

PM > 75o

-180o

Gain = 0dB

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Grading Policy

DC Gain > 34 dB

• Single – Stage Differential Amplifier [20], Cascode Amplifier [20], Two – Stage OTA [40],

Design Report [20].

• How large gain-bandwidth product your design achieves [10]. This point will be given to

those design that satisfies all design specifications for Part III. This score will be given

in order from highest to lowest gain-bandwidth product.

GB product = Gain * BW = 10𝐺𝑎𝑖𝑛 [𝑑𝐵]

20 * BW [Hz]

• The three teams that produce best design result will be given opportunities to present

their results in class in English. [5]