i

Acknowledgement

We express our gratitude to Mr. Idris Bholebawa for supporting & guiding us through

the completion of this project. We appreciate the patience & understanding he has shown us

till the very end.

We are also very grateful to our Lab Assistant who gave us valuable information

regarding quality-components & where to get the best buy. His help has made this project

efficient in both cost and outcome.

We also acknowledge the advice and guidance given to us by our friends and

classmates.

Thank You.

Parth Tirkar (U10EC013)

Bhoomika Gupta (U10EC014)

Aditi Prasad (U10EC018)

Anamika Sahu (U10EC064)

ii

Abstract

Pulse Amplitude Modulation is a form of signal modulation where the message

information is encoded in the amplitude of a series of signal pulses. These signal pulses can be

impulses (Ideal sampling) or square wave (either flat-top or Natural sampling). Our projects

aim is to implement a circuit that can faithfully perform Double-Polarity or Bipolar pulse

amplitude modulation in Natural sampling mode.

The circuit performs Bipolar PAM i.e. the input signal can be unipolar (either positive

or negative) or bipolar (both positive and negative), and the circuit will faithfully modulate

both kinds of message signal. The PAM signal generated is in the naturally-sampled mode i.e.

the output follows the modulating input signal for the whole ON time of the sampling pulse &

zero is transmitted during the OFF time of the pulse. It finds its applications largely in field of

communication networks.

iii

List of Contents

List of Figures iv

List of Tables v

1. Introduction

1.1 Motivation 1

1.2 Report Summary.. 1

2. Literature Survey 2

2.1 Pulse modulation techniques.. 2

2.2 Timer I.C. 555. 2

2.3 Operational Amplifiers Characteristics. 2

2.4 Switching of Semiconductor devices.. 3

2.5 Methods of Noise Reduction in Output 3

3. Design & Working Principle 4

3.1 Block Diagram.. 4

3.2 Summarized working 4

3.3 Sampling pulse generation 5

3.4 Sampling pulse inversion. 5

3.5 Bilateral Switch Network. 6

3.6 Summing Network 8

4. Circuit Diagram 11

4.1 Final Circuit Design. 11

4.2 PCB Circuit.. 12

5. Testing 15

5.1 Observations . 15

5.2 Output & Input Specifications.. 17

6. Conclusion 18

7. Future Scope 19

Appendix 1 NE555N Datasheet 21

Appendix 2 LF351N Datasheet 25

Appendix 3 BC547 Datasheet 27

Appendix 4 BC557 Datasheet 29

References 31

iv

List of Figures

Fig 3.1: Block Diagram of circuit implementing Natural Bipolar PAM. 4

Fig 3.2: An implementation of Bilateral Switch Network................ 7

Fig 3.3: Operational amplifier configured in summing mode. 9

Fig 4.1: Circuit diagram for Bipolar PAM in Natural Sampling mode.. 11

Fig 4.2: PCB Layout designed for the circuit using ExpressPCB.. 13

Fig 4.3: Component Layout Diagram (more commonly called Silkscreen layer) for the PCB

Layout designed above.. 13

Fig 4.4: PCB circuit ( Top View) 14

Fig 4.5: PCB Circuit: Bottom view (Copper Layer)... 14

Fig 5.1: Sampling pulse obtained at the output of NE555.. 15

Fig 5.2: Inverted Sampling pulse obtained at the output of inverting op-amp LF351N 15

Fig 5.3: Input = Sine wave of frequency 1.504 kHz and Pk-Pk Voltage = 7.2 V and Output =

Corresponding Naturally sampled PAM.. 15

Fig 5.4: Input = Sine wave of frequency 1.504 kHz and Pk-Pk Voltage = 7.04 V and Output =

Corresponding Naturally sampled PAM.. 15

Fig 5.5: Input = Triangular wave of frequency 801 Hz and Pk-Pk Voltage = 6.72 V and

Output = Corresponding Naturally sampled PAM.. 16

Fig 5.6: 10 cycles shown for the output in Fig 5.5 16

Fig 5.7: Input = Square wave of frequency 5 kHz and Pk-Pk Voltage = 7.04 V and Output =

Corresponding Naturally sampled PAM.. 16

Fig 5.8: Input = Sine wave of frequency 3 kHz and Pk-Pk Voltage = 7.2 V and Output =

Corresponding Naturally sampled PAM. 16

Fig 5.9: Input = Sine wave of frequency 5 kHz and Pk-Pk Voltage = 7.04 V and Output =

Corresponding Naturally sampled PAM.. 16

Fig 5.10: Input = Square wave of frequency 1 kHz and Pk-Pk Voltage = 6.7 V and Output =

Corresponding Naturally sampled PAM. 16

Fig 7.1: Channel TDM-PAM Transmitter and Receiver. 19

v

List of Tables

Table 4.1: Circuit Components' Function and Description 12

Table 5.1: Circuit Specifications. 17

1

Chapter 1: Introduction

1.1 Motivation

The present mobile system uses GSM technology whose basic working depends upon

Time Division Multiplexing (TDM). In TDM we basically multiplex various pulse modulated

signals which are further shared on time slots basis. These multiplexed signals are generally

PAM signals. Thus generating TDM was the main motive of the project but since it is a very

tedious job (as well as costly) which requires multiple similar circuits so we decided to work

on the basic level and decided on implementing PAM.

1.2 Report Summary

The progress of the report ahead is briefly described below;

Chapter 2: Literature Survey

This chapter describes the various components used in the circuit of the project and their uses

in brief.

Chapter 3: Working and Basic Principle

This chapter explains the detailed principle and working of the project. It describes how

various components were selected through calculations to get the best possible output.

Chapter 4: Circuit Diagram

This chapter gives the circuit diagram of the project and its related PCB layout of both first

and second layer.

Chapter 5: Testing

It describes the testing of circuit practically on hardware. The waveforms observed along

with the results obtained from the circuit are discussed.

Chapter 6: Conclusion

The conclusions we came upon after finally designing and implementing the circuit are

described here.

Chapter 7: Future Scope

This describes the various applications, extensions and usage of PAM. It also shows how the

present circuit can be modified for the implementation of other projects.

2

Chapter 2: Literature Survey

The following topics were studied in detail in association with the project and the best

methods to implement the circuit were arrived upon them.

2.1 Pulse Modulation techniques

Various methods of generating a pulse modulated signal are available like PWM

(Pulse Width modulation), PPM (Pulse Position Modulation), PAM (Pulse Amplitude

Modulation) and PCM (Pulse Code Modulation). We went with the most common and logical

pulse modulation technique that comes to mind when talking about sampling i.e. PAM.

Although the immunity to noise is not very high, but the circuitry is quite simple and thus for

less accurate and cheap alternative, PAM should be implemented.

Natural sampling is one of the ways of implementing PAM. In this, for the whole ON

period of the pulse the shape of input signal is followed.

While coming up with the ways of implementing PAM, we found several ready-made

designs for implementing unipolar or single-polarity PAM (wherein a suitable fixed DC bias

is added to the signal to ensure that all the pulses are positive) and none for Bipolar or

Double-polarity PAM (in this the pulses are both positive and negative). And thus we decided

to design a circuit that performs Bipolar PAM in natural sampling mode.

2.2 Timer I.C. 555

For performing PAM on a message signal, the first and foremost thing that should be

generated is the sampling pulse train. Since, we are doing natural sampling the pulses should

be 50 % duty cycle square waves. For this we chose to resort to the most common method i.e.

using 555 timer.

Various modes of 555 timer were studied in detail and the astable mode clearly came

out as a logical choice to generate the sampling pulse, since it does not require any trigger and

the circuitry is quite simple. Also, it can work for a wide range of Vcc i.e. 5 V to 18 V

(Appendix 1), which is in tune with the op-amp I.C. LF351N that we will be using that

requires Vcc of 15 V (Appendix 2). So, the need of separate supplies for different I.C.s is

eliminated.

2.3 Op-amp Characteristics

The operational amplifier forms an integral part of the circuit and thus its

characteristics like slew rate, internal offset parameters, operation in inverting mode and

summing mode, linear and non-linear regions of operations were studied in detail, to choose

the op-amp I.C. best suited for our circuit and to design it in such a way that wed get the most

precise output possible.

3

Slew rate and input voltage range of the op-amp played an important role in the

selection of the I.C. Since, we were going to use a sampling pulse of frequency above 10 kHz

whose voltage could switch to even 15 Volts, the most common I.C. 741 op amp would not

have worked since its slew rate is a meager 0.5 Volts/s.

2.4 Switching of semiconductor devices

We would be dealing with a sampling pulse of frequency greater than 10 kHz. This

warrants the use of semiconductor devices that can switch without distortion at high

frequency. For this the diodes and the transistors should have good switching properties at

high frequencies, the op-amps should have high slew rate. Several datasheets were referred to

find the best match for components high frequency switching networks.

Bilateral switching networks were also studied in detail, since our aim was to generate

bipolar PAM. A bilateral switch network is one which is able to switch both negative and

positive signals. Some I.C.s like CD4016, CD4066 and similar ones were studied in detail to

comprehend their internal working. Most of these use CMOS switching circuits that involve

the use of n-channel as well as p-channel MOSFETs. Since p-channel MOSFETs are not

readily available locally, the effectiveness of MOSFETs and BJTs as a high-frequency switch

was compared thoroughly.

2.5 Methods of Noise reduction in output

When we consider switching circuits using op-amp noise always comes into picture.

Thus, methods of noise reduction were studied and researched in detail. Several methods were

adopted on their basis like use of diodes to compensate voltage drops, loading series resistor

in final op-amp, choosing the right slew rate op-amp and transistors that can switch at high

speed without give unnecessary voltage drops.

Some characteristics of precision and compensated op-amp were also referred to come

up with some methods to reduce offset generated in op-amps and to make up for the practical

absence of infinite slew-rate in any op-amp. Thus, we were able to isolate the op-amp from

the output to reduce the effect of loading.

4

Chapter 3: Design & Working Principle

3.1 Block Diagram

3.2 Summarized working

The basic working of the circuit can be summarized as below:

The 555 timer is designed to work in astable mode to generate a sampling pulse i.e.

square wave in this case.

Op-amp I.C. LF351 inverts the sampling pulse generated and feeds it to the base of the

pnp transistor BC557, thus making the switch network bilateral.

The positive and negative pulses produced by the 555 and the op-amp respectively are

used to operate the bilateral switch network designed using a combination of npn and pnp

transistors BC547 and BC557 respectively.

Fig 3.1: Block Diagram of circuit implementing Natural Bipolar PAM

To base of PNP

To base of NPN

Positive

Sampling pulse

generator (I.C.

555)

NPN PNP

N

Modulating input

To collectors of transistors

Summing

network (I.C.

LF351N)

Final PAM

output

Bilateral

Switch network

consisting of

complementary

transistors

BC547 and

BC557 From collector terminal of

each transistor Sampling pulse

inverter Negative

pulses (I.C. LF351N)

5

The collector of the transistors are given the message signal or the modulating signal as

input and their bases are given the sampling pulse or carrier signal as input. The

transistors are designed to operate only in the cut-off (OFF mode) and saturation (ON

mode) regions.

The outputs of both transistors are added using a summing network consisting of another

op-amp I.C. LF351. The output from this op-amp gives the ultimate desired bipolar PAM

signal.

3.3 Sampling Pulse Generation

The 555 timer is designed in astable mode to generate the positive sampling pulse with

specifications as follows:

Duty cycle = 50 %

Voltage levels = 15 V (ON) and 0 V (OFF)

Frequency = 15.4 kHz

Pulse width = 32.46 s (ON time)

Though, the practical frequency might be a little more or less than this theoretical

value, due to the resistance of diode connected for the astable mode.

Design:

Frequency of sampling pulse required: 15 kHz

Thus, 1.45

(+ ) = 15 103 ; And for 50 % duty cycle, =

Assuming C = 10 nF, the values of resistors calculated are = = 4.8 k

Taking standard value of resistors, = = 4.7 k

General purpose switching diode IN4007 is connected in parallel with to generate the 50%

duty cycle square wave.

3.4 Sampling Pulse Inversion

Since, the 555 timer can only generate positive sampling pulses; we needed to design

an inverting network that could generate negative sampling pulses that have the ability to turn

on the pnp transistor for the sampling of modulating input in its negative half.

For achieving this, op amp I.C. LF351N has been designed in the inverting mode. This

op-amp provides a direct replacement for I.C. 741 while at the same it compensates for the

6

latters drawback of low speed / low slew-rate. LF351N has a high slew rate of 13 Volts/s.

(Appendix 2).

Design:

To decide on the op-amp I.C. to be used, the minimum slew rate was calculated first.

Slew rate is a large signal phenomenon where a large signal is one whose amplitude is

comparable with the power supply. The change in voltage levels in the sampling pulse is from

0 to 15 Volts. This change occurs almost instantaneously, thus slew rate should be as high as

possible. Ideally it should be infinite, however, faster slew rate op-amps are sometimes

characterized by overshoot and ringing, which cause the output to take longer to reach a

steady state than with slower slew rate op-amps. For this reason settling time is another

important parameter that should be considered to have a perfect output and thus a solution that

balances both issues had to be reached.

Thus, V = 15 Volts.

Pulse width, T = 32.46 s

Ideally the rise time is zero for an ideal square wave but to atleast get one sample in

one ON period, a rise time almost equal to the pulse width can be endured.

Hence, Minimum slew rate required =

= 0.46 Volts/ s

LF351N has a slew rate of 13 V/ s. Thus it gives a rise time of about T/28 s which

is still not anything compared to zero rise time, but can still be endured. Also, the unit gain

bandwidth of this op amp is 4 MHz, which improves the result for small-signal input when

sampled at high frequencies.

Op-amps designed specifically for A/D converter or D/A converters could be used but

then the cost of the project would have increased.

R1 and Rf connected to the inverting pin of the op-amp should be equal, to invert the

sampling pulse without any gain or scaling. Thus, R1 and Rf are randomly selected to be 1 k.

To minimize the input offset current in the op-amp, resistance ROM = R1Rf = 500 is

connected to the non-inverting pin of the op-amp.

3.5 Bilateral Switch network

The control signal that operates a bilateral switch can have both polarities i.e. either a

negative or a positive pulse can switch on the network and the network is switched off at zero

pulse. Other combinations can also be made, but this is the one which has been used in our

case. General purpose complementary transistors i.e. npn BC547 and pnp BC557 have

been used to design the bilateral switch instead of MOSFETs as the BJTs are readily

available.

7

Rb Rb

Rc Rc

D1

IN4007D2

IN4007

RL

RL

MESSAGE INPUT

Q1

BC547Q2

BC557

Positive

sampling

pulse

Negative

Sampling

pulse

Output

3.5.1 Working during positive half of input signal

For positive half of signal the main role is played by the npn-transistor. The input

coming to the collector is rectified using diode so that only positive half of the message signal

is received. When the positive level of sampling pulse (ON period) is encountered the Q1

transistor goes into saturation, since input at base is quite large compared to 0.7 V required to

switch ON the transistor. Thus the collector and emitter of Q1 get shorted and at the collector

terminal zero output is received.

When the zero level of sampling pulse (OFF period) is encountered, Q1 goes into cut-

off, and the collector of Q1 becomes open circuit. The voltage at Q1 for this period follows

the input.

3.5.2 Working during positive half of input signal

For negative half of signal the main role is played by the pnp-transistor. The input

coming to the collector is rectified using diode so that only negative half of the message signal

is received. To switch on the transistor (saturation region), a negative voltage of magnitude

greater than 0.7 Volts is required and thus negative sampling pulse using the op-amp in

inverting mode are given as input to the base of the transistor. Rest of the operation is similar

to the positive half, just the polarities are reversed.

3.5.3 Role of diodes at collector

The switching network would still perform its basic operation if the input was directly

given to the collectors of the transistor without connecting the diodes. These diodes besides

rectifying, work as voltage compensators. In actual, during the saturation period of the

transistor the voltage at collector is not exactly equal to zero, since there is ( ) drop of

Fig 3.2: An implementation of

Bilateral Switch Network

8

around 0.3 Volts (Appendices 3 & 4) is still there which can be neglected in usual cases but

here they can produce significant error for small amplitudes in the message signal. To

compensate this voltage drop the diode IN4007 is connected at the collector which has a low

forward voltage drop of around 0.4 Volts which can lower the error significantly.

3.5.4 Output stage

The outputs at the collectors of both transistors are given to a summing network

described below, which combines PAM output of positive and negative halves to produce the

final output.

3.5.5 Design

The transistors are designed basically as a switch, so that they will only work in the

saturation and cut-off regions.

Base resistor is chosen such that the base voltage VB obtained is greater than

( )= 0.7 Volts. The timer 555 outputs a maximum current of 200 mA when output is 15

Volts. So,

( ) =15 0.7

200 = 71.5

Thus, can have a minimum value of 72 ohms. To be on the safe side, we have

taken = 4.7 k for BC547 considering its maximum absolute ratings and = 100 for

BC557, since the inverted sampling pulse will have the highest voltage level less than 15

Volts.

Collector Resistor is chosen such that the collector current never exceeds the

maximum absolute rating of 100 mA (Appendix 3 & 4). Since, the input will not be greater

than 12 Volts (as the op-amp has the input range of 11.5 Volts) and ( ) = 0.3 V, so

( ) =12 0.3

100 = 117

Thus, we have taken = 4.7 k for both transistors.

3.6 Summing network

Using the bilateral switch network, the modulation was done for positive and negative

half of the modulating signal individually. For the final output to be generated, these separate

unipolar outputs 1 & 2 need to be summed to produce the Double Polarity PAM i.e.

9

1 + 2 . To achieve this, a high speed op amp LF351 is designed as a summing amplifier in

the non-inverting mode.

Design:

The resistor RL (that will be same for both 1 & 2) needs to be decided for better

current distribution. When the transistor is OFF, the collector and emitter terminals become

open i.e. their equivalent resistance is ideally infinite. So, no current should go to the emitter

and all the collector current flows to RL. For better impedance matching the value of RL is

chosen to be quite large compared to Rc. Thus, RL = 100 k .

3

26

7

4

LF351N

R1

Rf

RL

RL

R

Vc1

Vc2 Vout

Fig 3.3: Operational amplifier configured in summing mode

Since, RL is same for both VC1 & VC2, the voltage at non-inverting pin of the op- amp is equal

to 1+2

2 .

Hence,

= 1 +1

1 + 2

2

For, = 1 + 2

, 1 + 1

= 2

Thus, = 1 = 1 k

The series resistor R connected in the output of op-amp is used to decouple the

amplifier output from loading capacitances. Although there are no load capacitances present

in the output but they might arise due to length of external coaxial cables, one might use to

check the outputs.

10

The load impedance that a capacitor presents to an amplifier decreases as the

frequency increases. The frequency that matters here is not the applied signal frequency, but

rather the frequency response of the amplifier used. High speed amplifiers are more sensitive

to capacitive loading because the load impedance is lower (harder to drive) than for a lower

speed amplifier. This capacitance can make the circuit unstable or give noise output or worse

it can turn the op-amp into an oscillator. The series resistor R = 10k that we have chosen

compensates for that.

11

Chapter 4: Circuit Diagram

4.1 Final Circuit Design

The final circuit that we implemented on Printed circuit board (PCB) is as given

below:

R1

4.7k

D1

IN4007R2

4.7kN

E555

RST

DIS

THR

TRIGGND

CON

OUT

VCC

C1

10 nF

R3

4.7k

R4

1k

R5

1k

R6

500E

3

26

7

4

LF351N

3

26

7

4

LF351N

R7

100E

R8

4.7k

R9

4.7k

D2

IN4007

D3

IN4007

R10

100k

R11

100k

R12

1k

R13

1k

R14

10k

PAM OUTPUT

- VEE

-15 V

+VCC

15 V

Q1

BC547Q2

BC557

U2 U3

U17

6

2

1

8

6

MESSAGE

INPUT

4

Fig 4.1: Circuit diagram for Bipolar PAM in Natural Sampling mode

We started roughly from the unipolar PAM circuit. The progress up to the final design

was made using NI Multisim software. All kinds of alterations were made in the software to

arrive upon the best possible solution. The simulations of the circuit in Multisim gave perfect

output because it works upon components or instruments with correct and precise properties,

on the other hand there was a little noise obtained in the hardware implementation.

12

The functions performed by each of the components in the circuit diagram

corresponding to the Block Diagram and working principle explained earlier, are stated in the

table given below:

Table 4.1: Circuit Components' Function and Description

Sr.

No.

Part

ID Component Name Function

Corresponding

Block in Block

Diagram

1. U1 NE555N (Timer 555 8 pin DIP)

Positive Sampling pulse generator Sampling pulse

generation

2. D1 IN4007 (General purpose

rectifier diode)

Critical to operation of timer 555 in

generation of 50% duty cycle.

Sampling pulse

generation

3. U2

LF351N (JFET

Operational Amplifier 8 pin DIP)

Negative Sampling pulse generator

Sampling pulse

generation

4. U3

LF351N (JFET

Operational Amplifier 8 pin DIP)

Summing individual unipolar PAM

outputs to generate final output

Summing

Network

5. Q1 BC547 (General purpose

npn transistor)

Acts as a switch to perform PAM for

positive half of input signal

Bilateral Switch

Network

6. Q2 BC557 (General purpose

pnp transistor)

Acts as a switch to perform PAM for

negative half of input signal

Bilateral Switch

Network

7. D2 IN4007 (General purpose

rectifier diode)

Half-wave rectification of input with

only positive half.

Bilateral Switch

Network

8. D3 IN4007 (General purpose

rectifier diode)

Half-wave rectification of input with

only negative half.

Bilateral Switch

Network

4.2 PCB Circuit

The circuit was implemented on PCB (Printed Circuit Board) as it provided better

results and chances of error are less in this alternative compared to GCB.

The layout was made using ExpressPCB & ExpressSCH Softwares. The circuit

diagram is first implemented in ExpressSCH to make the schematic which is later linked in

ExpressPCB where the actual PCB layout is created. After creating the layout, etching of the

PCB was done to obtain the circuit with copper clad paths or traces. The components were

soldered to complete the final circuit.

The PCB layout and the component layout (Silkscreen) are shown below. It should be

noted that the PCB layout shown here is not up to scale and has been enlarged for better

understanding.

13

Fig 4.2: PCB Layout designed for the circuit using ExpressPCB

Fig 4.3: Component Layout (more commonly called Silkscreen layer) for the PCB Layout

designed above

14

Fig 4.4: PCB circuit ( Top View)

Fig 4.5: PCB Circuit: Bottom view (Copper Layer)

15

Chapter 5: Testing

The circuit was successfully tested to obtain the PAM output for several kinds of

waveforms as message input. The modulating inputs were generated from Function Generator

wherein the waveforms were sine, triangle and square with different frequencies.

5.1 Observations

All the observations were recorded from DSO (Digital Storage Oscilloscope).

Fig 5.1: Sampling pulse obtained at the output of NE555

Fig 5.2: Inverted Sampling pulse obtained at the output of inverting op-amp LF351N

Fig 5.3: Input = Sine wave of frequency 1.504 kHz and Pk-Pk Voltage = 7.2 V Output = Corresponding Naturally sampled PAM

Fig 5.4: Input = Sine wave of frequency 1.504 kHz and Pk-Pk Voltage = 7.04 V Output = Corresponding Naturally sampled PAM

16

Fig 5.5: Input = Triangular wave of frequency 801 Hz and Pk-Pk Voltage = 6.72 V Output = Corresponding Naturally sampled PAM

Fig 5.6: 10 cycles shown for the output in Fig 5.5

Fig 5.7: Input = Square wave of frequency 5 kHz and Pk-Pk Voltage = 7.04 V Output = Corresponding Naturally sampled PAM

Fig 5.8: Input = Sine wave of frequency 3 kHz and Pk-Pk Voltage = 7.2 V Output = Corresponding Naturally sampled PAM

Fig 5.9: Input = Sine wave of frequency 5 kHz and Pk-Pk Voltage = 7.04 V Output = Corresponding Naturally sampled PAM

Fig 5.10: Input = Square wave of frequency 1 kHz and Pk-Pk Voltage = 6.7 V Output = Corresponding Naturally sampled PAM

17

5.2 Output & Input Specifications

The specifications as obtained by implementing the circuit practically are as shown below:

Table 5.1: Circuit Specifications

Output:

Sampling pulse: 0 to +15 Volts, Frequency = 18 kHz

Inverted sampling pulse: 0 to -15 Volts, Frequency = 18 kHz

Maximum error: -0.2 Volts from the original amplitude of the analog

signal

Supply Voltage: Vcc = 15 Volts and Vee = -15 Volts. The power supply

should be set at exactly these values.

Input :

Voltage range:

0 to 11.5 Volts (Input voltage range for op-amp is

11.5 V, otherwise the op-amp goes into saturation and

wont follow the analog signal faithfully)

Frequency range: 0 to 9 kHz (Considering the signal needs to be recovered

from the samples, so fmax = fs/2)

18

Chapter 6: Conclusions

Pulse-amplitude modulation is a form of signal modulation where the message

information is encoded in the amplitude of a series of signal pulses. It is an analog pulse

modulation scheme in which the amplitude of train of carrier pulse is varied according to the

sample value of the message signal.

In this project we successfully implemented the bipolar as well as unipolar PAM on

PCB using IC 555, op-amps and various combinations of resistors, capacitors and transistors

which were found based on several calculations and some speculation.

The circuit was tested successfully to produce PAM outputs in Natural sampling mode

for variety of bipolar analog inputs like sine, triangular and square at different frequencies and

amplitudes.

19

Chapter 7: Future Scope

Pulse-amplitude modulation is widely used in baseband transmission of digital data,

with non-baseband applications having been largely replaced by pulse-code modulation, and,

more recently, by pulse-position modulation.

The applications of PAM and modifications in them are described as below:

TDM (Time Division Multiplexing)

The train of samples is a form of a pulse-amplitude modulated - PAM - signal. If these

pulses were converted to digital numbers, then the train of numbers so generated would be

called a pulse code modulated signal - PCM.

In this TDM-PAM, several messages are sampled, and their samples are interlaced to

form a composite, or time division multiplexed (TDM), signal (PAM/TDM). We can later

extract the samples belonging to individual channels, and then reconstruct their messages.

Fig 7.1: Channel TDM-PAM Transmitter and Receiver

20

Ethernet

Some versions of the Ethernet communication standard are an example of PAM usage.

In particular, the Fast Ethernet 100BASE-T2 medium (now defunct), running at 100 Mbit/s,

uses five-level PAM modulation (PAM-5) running at 25 megapulses/sec over two wire pairs.

A special technique is used to reduce inter-symbol interference between the unshielded

pairs. Current common 100 Mbit networking technology is 100BASE-TX which delivers

100 Mbit in each direction over a single twisted pair one for each direction. Later,

the gigabit Ethernet 1000BASE-T medium raised the bar to use four pairs of wire running

each at 125 megapulses/sec to achieve 1000 Mbit/s data rates, still utilizing PAM-5 for each

pair.

Photobiology

The concept is also used for the study of photosynthesis using a PAM fluorometer.

This specialized instrument involves a spectrofluorometric measurement of the kinetics of

fluorescence rise and decay in the light-harvesting antenna of thylakoid membranes, thus

querying various aspects of the state of the photosystems under different environmental

conditions.

Electronic drivers for LED lighting

Pulse-amplitude modulation has also been developed for the control of light-emitting

diodes (LEDs), especially for lighting applications. LED drivers based on the PAM technique

offer improved energy efficiency over systems based upon other common driver modulation

techniques such as pulse-width modulation (PWM) as the forward current passing through an

LED is relative to the intensity of the light output and the LED efficiency increases as the

forward current is reduced.

21

Appendix 1

22

23

24

25

Appendix 2

26

27

Appendix 3

28

29

Appendix 4

30

31

References

Books:

Martin S. Roden, Analog and Digital Communication Systems (3rd

ed.)

B. P. Lathi, Modern Digital and Analog Communication Systems (4th

ed.)

Ramakant Gayakwad, Op-amps and Linear Integrated Circuits (3rd

ed.)

K.R. Botkar, Integrated Circuits (10th

ed.)

Paul Harden, The Handimans Guide to MOSFET Switched Mode Amplifier, QRPp Journal

Websites

http://en.wikipedia.org/wiki/Pulse-amplitude_modulation

http://www.jensign.com/opampcapacitance/index.html

http://www.analog.com/library/analogDialogue/archives/31-2/appleng.html

http://www.analog.com/library/analogdialogue/archives/38-06/capacitive_loading.html