quality design for valued engineer

Power supply Seminar in Shenzhen Tsinghua UniversityPower supply Seminar in Shenzhen Tsinghua University PowerELab LimitedPowerELab Limited www.PowerESIM.comwww.PowerESIM.com 11

Quality DesignQuality Design

forfor

Valued EngineerValued Engineer


PowerESIM FeaturesPowerESIM Features


•1 session - CBA concept & Loss charcteristic

•2 session - General usage of poweresim

•3 session - Loop analysis and MTBF

•4 session - Xformer, thermal analysis

AgendaAgenda


CBA ConceptCBA Concept


What design engineer is doingWhat design engineer is doing

Vin

R1

R2

Vo

Given

Vo=0.5*Vin

Engineer Choice

1) R1=1, R2=1

2) R1=10, R2=10

3) R1=20, R2=20

Given

Vo=0.5*Vin

Rin=10

Engineer Choice

1) R1=5, R2=5

Given

Vo=0.5*Vin

Rin=10

Pin=1@Vin=100

Engineer Choice

1) R1=?, R2=?


Either less or moreEither less or more

3

2

1

333

222

111

k

k

k

Z

Y

X

CBA

CBA

CBA

?

2

1

???

222

111

k

k

Z

Y

X

CBA

CBA

3

2

1

??33

?22

?11

k

k

k

Y

X

BA

BA

BA

No. of Equations

<

No. of Variables

No. of Equations

=

No. of Variables

No. of Equations

>

No. of Variables


Making up equationsMaking up equations

T1

Np NsCo

Do

M1

Vi

Vi=100 Eqn 1

Vo=12 Eqn 2

Vo=Vi*D*Ns / (1-D)*Np Eqn 3

Np=? Eqn 4

Ns=? Eqn 5

Co=? Eqn6

Vds_max_M1=? Eqn7

Ids_max_M1=? Eqn8

IF_max_Do=? Eqn9

VR_max_Do=? Eqn10

Core_T1=? Eqn11

Wire_Np=? Eqn12

Wire_Ns=? Eqn13


Who is going to solve this?Who is going to solve this?

Vi=100 Eqn 1

Vo=12 Eqn 2


Vi+Vo*Np/Ns=0.8Vds_max Eqn 4

Vo=Ns*0.3*fs/(1-D) Eqn 5

0.5*Vo_ripple=Q/Co Eqn6

Vds_max_M1=lowerest cost in stock Eqn7

Ids_max_M1=lowerest cost in stock Eqn8

IF_max_Do=2*Io Eqn9

VR_max_Do=1.2*(Vi*Ns/Np+Vo) Eqn10

Core_T1=recommended table from ferrite manufacturer Eqn11

Wire_Np=fully filled Eqn12

Wire_Ns=fully filled Eqn13

kth make up combination


Can it be solvedCan it be solved

Vi=100 Eqn 1

Vo=12 Eqn 2


Vi+Vo*Np/Ns=0.8Vds_max Eqn 4

Vo=Ns*0.3*fs/(1-D) Eqn 5

0.5*Vo_ripple=Q/Co Eqn6

Vds_max_M1=lowerest cost in stock Eqn7

Ids_max_M1=lowerest cost in stock Eqn8

IF_max_Do=2*Io Eqn9

VR_max_Do=1.2*(Vi*Ns/Np+Vo) Eqn10

Core_T1=recommended table from ferrite manufacturer Eqn11

Wire_Np=fully filled Eqn12

Wire_Ns=fully filled Eqn13

kth make up combination

Solved

Performance


Equations solving

Component selection

Equations solving

Specification

Traditional recursive iteration design flow

Component

Expert Knowledge

Expert Knowledge

Expert Knowledge

Solving time to timeSolving time to time


From serial to parallelFrom serial to parallel

Specification tier

Component tier

Result …

Component tier

Result

Component tier

Result

Decision by Specification

Proposed CBA Component Based Architecture


SPICE vs CBASPICE vs CBA

CBA asking for SPICE asking for

K

Np

Ns

Co

Do

M1

Vi

Rp

Rp_ac

Rs

Rs_ac

Rm


Select, make and deciseSelect, make and decise


Result orientated – Loss analysisResult orientated – Loss analysis

Conversion Efficiency

01020304050607080

70 120 170 220 270

Input voltage RMS (V)

Efficie

ncy (

%)

Measurement

Simulation


Result orientated – Thermal analysisResult orientated – Thermal analysis

Measured

Simulated


Result orientated – Waveform analysisResult orientated – Waveform analysis

Measured

Simulated


Result orientated – Loop Stability & TransientResult orientated – Loop Stability & Transient

1 10 100 1 103

1 104

1 105

200

150

100

50

0

50

100

150

200200

200

Phasei

3 1041 f i

Measured

Simulated


Result orientated – Input Current HarmonicResult orientated – Input Current Harmonic

-0.1

0

0.1

0.2

0.3

0.4

3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

Harmonic number

Cur

rent

RM

S (A

)

Measured

Class D Limits

Measured

Simulated


Result orientated – MTBF & Life TimeResult orientated – MTBF & Life Time

Simulated

Measured

Will be reported at 1/Mar/2100


Result orientated – DVT reportResult orientated – DVT report

Simulated

Measured


Build a XformerBuild a Xformer

Simulated

Lk=2.982uH

Measured

Lk=2.787uH


Add your own component to all analytical toolsAdd your own component to all analytical tools


Loss CharacteristicsLoss Characteristics


MOSFET Loss CharacteristicsMOSFET Loss Characteristics

Gate drive

Drain voltage

Drain current

t0 t1 t2 t3 t4

t0-t1 drain current catch up with load current

t1-t2 drain voltage falling period

t2-t3 MOSFET fully turn on

t3-t4 drain voltage rising period with miller effect

t4-t5 drain current falling period


Ns Voltage

Diode voltage

Diode current

t1 t2 t3 t4 t5

t0-t1 diode in forward bias

t1-t2 forward current drop to zero

t2-t3 from zero current to peak reverse current (ta)

t3-t4 reverse current droping period

t4-t5 leakage current with reverse voltage

t0

Diode Loss CharacteristicsDiode Loss Characteristics


RdcRskin Rskin

Rdc

Rproximity

RcoreRfringe

Ipri ImagIsec

• Rdc – wire dc losses

• Rskin – wire skin effect losses

• Rproximity – wire proximity effect losses

• Rfringe – fringing flux losses

• Rcore – core losses

Xformer/Inductor Loss CharacteristicsXformer/Inductor Loss Characteristics


Freq.

Loss

Loss=1W@100kHz

Loss=3W@200kHz

B

Loss

[email protected]

[email protected]

Core Loss Characteristics – Core Loss Characteristics – frequency and fluxfrequency and flux

• Every Engineer know, but . . .


Idc_bias

Loss

D

Loss

Idc_bias

D

Core Loss Characteristics – Core Loss Characteristics – dc bias and duty cycledc bias and duty cycle

• Data sheet Loss is Idc_bias =0

• Large loss @ Idc_bias >Bs

• Somewhere in between must exist rising slope @B

• Higher Freq. higher loss

• Higher flux change rate higher loss

• Smaller D means higher flux change rate


ESR

Irms

Temp.

ESR

ESR=1@25oC

ESR=3@-25oC

Freq.

ESR

ESR=1@100kHz

ESR=2@100Hz

Capacitor Loss CharacteristicsCapacitor Loss Characteristics


Loop AnalysisLoop Analysis


• Phase margin m is the distance of the phase angle curve above - 180o at the cross over frequency ωc, where the magnitude plot crosses the 0db line.

• Gain Margin GM in db is the distance of the magnitude plot below the 0 db axis at the frequency where the phase is -180o.

• The Gain Margin and Phase Margin ensure stable operation

M(db)

ω0

-180oω

m

GM

ωc

First idea - MarginsFirst idea - Margins


Vin

D

Vin

D

Vin*D

Graphic averaging conceptGraphic averaging concept

Averaged Thevin

Rquivalent


sL

1/sCVin*D(s)

Vo(s)1)(

)(2

CLs

Vin

sD

sVo

sL

1/sCVin(s)*D

Vo(s)1)(

)(2

CLs

D

sVin

sVo

From non-linear to LaplaceFrom non-linear to Laplace


Switching cellvi

ii

x

ic

vo

Variables concerned are the average values over one switching cycle.

Absorbed current ii:ii = ii(x,vo,vi) (1)

Injected current ic:ic= ic(x,vo,vi) (2)

Zp

More general approach – More general approach – Inject-Absorbed-Current methodInject-Absorbed-Current method


ii

co

o

ccc dv

v

idv

v

idx

x

idi

ii

io

o

iii dv

v

idv

v

idx

x

idi

)()()()()()()( svsCsvsBsxsAsi icoccc

)()()()()()()( svsCsvsBsxsAsi iioiii

Zpsisv co )()(

• In differential form

co diZpdv

• In Laplace form

Assuming it is a linear systemAssuming it is a linear system


)()( sCsY ii

Bi

Ai

Cc

Ac

Zo(s)

X(s)

Zp(s)Yi(s) vo(s)vi(s)

ic(s)ii(s)

ia(s) iout(s)

)(

1)(

sBsZ

co

Output characteristic impedance

General graphical electrical modelGeneral graphical electrical model


di c tVi

Ldd

1

Ldv o

D

Ldv i

d Vi T1 D

L dd

T

2 Ldv o 1

1

2D

DT

L dv i

i c s( )V i T

L1 D( )

1

s T

d s( )T

2 L1

s L

v o s( )D T

L1

D

2

1

s T

v i s( )

Ac(s) Bc(s) Cc(s)

i c s( )1

s

Vi

Ld s( )

1

Lv o s( )

D

Lv i s( )

Vi T1 D

L d s( )

T

2 Lv o s( ) 1

1

2D

DT

L v i s( )

From non-linear to Laplace againFrom non-linear to Laplace again


10 100 1 103

1 104

50

0

50

100

20 log vo_d_con j 2 f( )

f

10 100 1 103

1 104

200

100

0

100

180

arg vo_d_con j 2 f( )( )

f

Bode plot – Vo(s) / D(s)Bode plot – Vo(s) / D(s)


iL(s)

D1

M1

VoVi d

L1 2

PWM

X = iL

-

+

H(s) H(s)

vo=

KLoop 1 Loop 2

sCKsHLoopofgainLoop

1)(2

Compensation network H(s) is to compensation a single pole,not a two pole LC network

The inductor L becomes a controlled current source

Current mode controlCurrent mode control


d s( )1

2R s

D

L T s v o s( )

1

2R s

D

L T s v i s( ) R s i L s( ) v e s( )

F m

F m2

T s 2 S c S n

Fm

d(s) ve(s)

iL(s)

Rs

Vi(s)

R s D T s

2 LR s D T s

2 L

Vo(s)

-

+

-

+

Current command

Inductor current feedback

Input voltage feedback

Output voltage feedback

Peak current modecontrol digital processor gain

Current mode control graphical modelCurrent mode control graphical model


Fm

d(s)

ve(s)

Rs

R s D T s

2 LR s D T s

2 L

-

+

-

+

Cc(s)

Ac(s)Zp(s)

Vi(s)

Vo(s)

iL(s)Bc(s)

++

+

General graphical electrical model General graphical electrical model – – include peak current mode controlinclude peak current mode control


10 100 1 103

1 104

50

0

50

100

20 log vo_ve_2 j 2 f( )

20 log vo_d_con j 2 f( )

f

10 100 1 103

1 104

200

100

0

100

180

arg vo_ve_2 j 2 f( )( )

180

arg vo_d_con j 2 f( )( )

f

Bode plot – voltage mode vs current modeBode plot – voltage mode vs current mode


By introducing a second order (two pole) transfer functionwith resonate frequency at half of the switching frequencyand a damping factor

2

13

23

2

2

2

ln12

ln

5.05.021

1)(

mm

mm

sssF

swsw

Advanced option – subharmonic instabilityAdvanced option – subharmonic instability


Fm

d(s)

ve(s)

Rs

R s D T s

2 LR s D T s

2 L

-

+

-

+

Cc(s)

Ac(s)Zp(s)

Vi(s)

Vo(s)

iL(s)Bc(s)

++

+

F(s)

More complicated graphical modelMore complicated graphical model


10 100 1 103

1 104

1 105

1 106

100

50

0

20 log vo_ve_1_f j 2 f( )

20 log vo_ve_1 j 2 f( )

f

10 100 1 103

1 104

1 105

1 106

200

0

200

180

arg vo_ve_1_f j 2 f( )( )

180

arg vo_ve_1 j 2 f( )( )

f

Modified by F(s)

Modified by F(s)

Advance vs OrdinaryAdvance vs Ordinary


• Continued mode operation and Discontinued mode operation

• Voltage mode, Peak current mode and Averaged current mode

• Parasistic effect• Compensation method

• After all, it should be completed by a program and once forever!

Advance and More advanceAdvance and More advance


Automatic compensationAutomatic compensation

• After all, you only need a final compensated design


1. Dynamic Analysis of Switching-Mode DC/DC converters by Andre’S. Kislovski, Richard Redl, Nathan O. Sokal, Van Nostrand Reinhold

2. Complex Behavior of Switching Power Converters by Dr. Chi Kong Tse, CRC Press

3. RIDLEY,R.B.:’A new continuous-time model for current-mode control’ IEEE Trans. Power Electronics., 1991, 6, (2), pp. 271-280

4. TAN, F.D., and MIDDLEBROOK, R.D.: ‘A unified model for current- programmed converters’. IEEE Trans. Power Electronics., 1995, 10, (4), PP. 397-408

5. MIDDLEBROOK, R.D., and CUK, S.: ‘A general unified approach to modeling switching converter power stages’. Proceedings of the IEEE Power Electronics Specialists conference, PESC’76, 1976, pp. 18-34.

ReferencesReferences


MTBFMTBF


• Failure rate λ is defined as

• Example• 500 components are tested, every

time a failure occurs that component is replaced by a good one. After 1000 hrs, 5 failures have occurred.

hoursoperatingunittotal

failuresofnumberp

hourperxp510

1000

1

500

5

First thing to know – Failure Rate First thing to know – Failure Rate


npratefailureSystem .... 321

Second thing to know – System failure Rate Second thing to know – System failure Rate

k is the predicted failure rate of each component.

(Assuming system fail if either component fail)


p

MTBF

1

Mean Time Between Failure MTBFMean Time Between Failure MTBF

MTBF of a system

(Assuming system fail if either component fail)


According to MIL-217According to MIL-217

p = bArscQET . . .

Where p is the part failure rate

b is the base failure rate

is factors modify the base failure rate


A= Application factor e.g. For MOSFET - 1.5 for linear, 0.7 for switching

Modify factor – Modify factor – Application factorApplication factor

MOSFETCondition A

Pr< 2 Linear 1.5

Switching 0.7

2≤Pr<5 2

5≤Pr<50 4

50≤Pr<250 8

Pr≥250 10


Modify factor – Modify factor – Power rating factorPower rating factor

r= Power rating factor e.g. For transistor – 0.43 for Pr<0.1W

Power Rating W r

0.1 0.430.5 0.771 15 1.8

10 2.350 4.3100 5.5500 10


Modify factor – Modify factor – Voltage stress factorVoltage stress factor

s= Voltage stress factor e.g. For transistor – 0.045 for Vs=0

sxVse0 045 31. .

CEO

CE

V

VVs


Modify factor – Modify factor – Quality factorQuality factor

MOSFET

Condition Q

Bad – Plastic 8

Fair – Lower (Commercial) 5.5

Average – JAN (random check per AQL) 2.4

Good – JANTX (100% test) 1

Very Good – JANTXV (microscope or x ray inspection) 0.7

Q= Quality factor e.g. For MOSFET – 2.4 for AQL checked


Modify factor – Modify factor – Envirnoment factorEnvirnoment factor

Q= Quality factor e.g. For MOSFET – 1 for Office environment

MIL217_E MOSFET

Condition

Office environment – Ground, Benign, 1

Outdoor environment – Ground, Fixed 6

Automobile environment – Ground, Mobile 9


Modify factor – Modify factor – Temperature factorTemperature factor

T= Temperature factor e.g. For transistor – 5.9 @Tj=125oC

Junction Temp Fac

TempoC oT

25 135 1.345 1.655 1.965 2.375 2.885 3.395 3.9

105 4.5115 5.2125 5.9135 6.8145 7.7155 8.6165 9.7175 11

0

2

4

6

8

10

12

Temp degree C

TTe j

21141

273

1

298( )


ConclusionConclusion

• Different part has different definition of x

• No consideration in MTBF will not result in reliable products.

• Considering reliability during design stage yeild cost saving.

• Thermal is always a main issue on reliability

• MTBF is a good index for design quality.


No single question askedNo single question asked


Magnetic ComponentMagnetic Component


Which one is a Xformer?Which one is a Xformer?


Lm1

N1 N2i1i2Lk1 Lk2

L11

n1 n2i1 i2Lk

sL11 sL22

I2sM I1sM

i1 i2

ssI

ssI

LM

ML

sV

sV

2

1

22

11

2

1

ssI

ssI

LmN

NLkLm

N

N

LmN

NLmLk

sV

sV

2

1

1

2

1

221

1

2

11

211

2

1

ssI

ssI

LLn

n

Ln

nL

sV

sV

2

1

22111

2

111

211

2

1

22

11

LM

ML

22111

2

111

211

LLn

n

Ln

nL

1

2

1

221

1

2

11

211

LmN

NLkLm

N

N

LmN

NLmLk

All model are the sameAll model are the same


dvHI

uL

k

ok

2

H

• Leakage inductance is a representation of leakage flux

• Leakage flux is the flux that doesn’t link through the core, or flux cut through windings space.

First issue – leakage inductanceFirst issue – leakage inductance


• By reducing distance between two windings

H

• By reducing No. of turns

H

• Keep total No. of turns

• Interleaved winding

H H

Reducing leakage inductanceReducing leakage inductance


Do they have the same peak flux level ?

Ip Ip

T1 T1

Magnetizing inductanceMagnetizing inductance

Do they have the same magnetizing current ?


Ip Ip

T1 T1

imag

iNp

I1

imag

iNp

I2

imagiNp

iNpimag

1IAeN

LBp

p

m

2IAeN

LBp

p

m

Outside circuit determine flux levelOutside circuit determine flux level


AWG#24

Dia=0.51mm

f = 100kHz

Dskin=0.24mm

Usage=99.7%

AWG#24

Dia=0.51mm

f = 300kHz

Dskin=0.139mm

Usage=79.2%

• Skin effect is not a problem

meterfu

Do

skin

Skin effect-little effectSkin effect-little effect


coscosh

sinsinh12 2

mPd

• Proximity losses is approximately proportional to the square of the layers and square root of frequency

• Detail representation can be basically described by the Dowell formula

• In general, good transformer design would not have many stacked layer and wire size is properly chosen, hence proximity loss is not a dominant source

skinD

d

2

Proximity losses – losses caused by No. of layersProximity losses – losses caused by No. of layers


wire

wirewire dlBf

Pd

42

• Fringing flux losses is proportional frequency• Fringing flux losses is proportional to square of flux cut

perpendicular to the axis of wire• Fringing flux losses is proportional to 4th order of the wire

diameter• In short it is a dominant source of lossed of for a gapped core

Fringing flux losses – Fringing flux losses – losses by the diameter of wirelosses by the diameter of wire


B

H

Bpp

22 fBppAeVolPd ss 2BppfVolPd

21 kk BppfVolPd

OR

Core losses – hysterisis loss+eddy current lossCore losses – hysterisis loss+eddy current loss


• Now all can be done by a click

Transformer related – Transformer related – Losses, Cross regulation, Spike, etcLosses, Cross regulation, Spike, etc


• LIoyd H. Dixon, Magnetics transformer handbook, Unitrode• R. Prieto et, Interleaving Techniques in Magnetic components, 1997

IEEE• Van A. Niemela, Leakage-Impedance Model for Multiple-Winding

Transformers, 2000, IEEE• Anderson F. Hoke et, An Improved Two-dimension Numberical

Modeling method for E-core Transformers, 2002 IEEE• Ansgar Brockmeyer, Experimental Evaluation of the Influence of

DC-Premagnetization on the Properties of Power Electronic Ferrites, 1996 IEEE

• M. Albach et, Calculating Core Losses in Transformers for Arbitary Magnetizing Currents A comparison of Different Approaches, 1996 IEEE

ReferencesReferences

quality design for valued engineer

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