r.ANALOG WDEVICES

AN·211 APPLICATION NOTE

ONE TECHNOLOGY WAY. P.O. BOX 9106. NORWOOD, MASSACHUSETTS 02082-9106.8171329-4700

The Alexander Current-Feedback Audio Power Amplifier* by M.-k AIeander

This application note was written by Marie Alexander, who received his BSEE from the University of Toronto in 1981. As a consultant to Analog Devices, Marie describes a unique power amplifier topology that is the result of h;' long standing interest in audio power amplifier de­sign and critical listening of audio systems.

The current-feedback approach p,..ented here meets the traditional audio requirements of power amplifiers, but also adds the additional benefit of very high speed and bandwidth (200 VII'S slew rate, 1 MHz bandwidth) that results in excellent dynamic performance, and hence, sound quality.

INTRODUCTION The subject of power amplifier design is one of those controversial areal of audio engineering that continu .. to receive intense debete, despite the fact that there are literally dozens of papers available to guide the de­signer. Many different topologies have evolved from the relatively modest beginnings of solid state power ampli­fier design in the late 1950s and early 198Oa, and this has lead to a few very unique and original designs. A sub­stantial number of transistorized amplifiers that were built during these early years were little more than rede­signs of vacuum tube circuits with lower voltage supply rails, and often had performance levels that left a great deal to be desired. Quite a few of them sounded signifi­cantly worse than their thermionic predecessors. The "real revolution" in audio power amplifier design actu­ally occurred during the 19701 and introduced such new innovations as direct coupling, fully complementary de­sign, pseudo Cia .. A biasing, and current dumping; not to mention the discovery of the importance of dynamic intermodulation distortion testing and its relationship to slew rate. Unfortunately, the plethora of so called "new" amplifier designs that have proliferated since this period

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are often varistionl of older circuits that originated dur­ing the 19701, and generally feature only slight modifi­cations to the input, output or gain stages.

Some designers have demonstrated rail-commutated output stages, which allow them to improve the operat­ing efficiency of a big amplifier to such an extent that the huge amount of output transistor heat sinking usually necessary is reduced to that of a much lower power design. These can suffer from "switch over" distortion caused by the output stage switching between different supply rails, and can be quite objectionable. Certainly, high output power should not be obtained at the ex­pense of inferior operating specifications, but this is in­deed the cue with certain types of amplifiers. Some clever design techniques do achieve quite impressive performance, however, albeit at the expense of greatly increased circuit complexity. Still other amplifiers dis­pense completely with the familiar principles of negative feedback, and their creators claim that their circuitry provides a sound more "open and lifelike," even though the distortion performance is ulually poor. On the whole, though, most audio power amplifiers are essen­tially discrete copies of monolithic voltage feedback op amps, such as the 4138, but are invariably simplified to reduce the transistor count.

The PurpoM of this technical note is to introduce the audio designer to a truly new power amplifier topology, not an adaptation of an existing design, that offers ex­ceptional performance on a par with the best of the available solid state designs (voltage feedback or other­wise). This new topology completely dispenses with the principl.. of globel voltage feedback, so commonly used in most amplifiers, in favor of a design based in­stead on the principl .. of current feedback. In addition, this note addresses many of the important practical as­pects of successfully getting a design off the ground. aside from choosing the belic core amplifier deSign. In almost all cases, having a good besic amplifier topology is not enough to guarantee that the final piece of equip­ment will perform to the original design expectations. Consequently, additional topics such al board layout.

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component selection, paralleling output devices, place­ment of high curreAt wiring, and thermal design are considered as well.

A LITTLE BACKGROUND ON FEEDBACK Before dissecting the new audio amplifier circuit in de­tail, some background on the differences in operational characteristics between voltage feedback and current feedback amplifiers is appropriat.. Since it is likely that the read.r may not have been previously exposed to the latt.r, an overview of voltag. feedback followed by a look at the advantages of current feedback is necessary. This discussion will allow on. to und.rstand why cir­cuits that make use of this relativ.ly new topology are 10 important. Becaus. the bandwidth of an audio amplifier is usually one of the most important specifications, a relativ.ly simpl. equation for the upper -3 dB point is essential. Simplifying the current fMdback amplifi.r and its att.ndant feedback network into a representative cir­cuit mod.1 for nodal analysis provides the k.y to arriving at a compact, but reasonably accurate, .xpression for the frequ.ncy r.sponse. Appendix A has complet. de­tails of the circuit analysis.

The theoretical analysis of a voltage feedback circuit that often accompanies its frequent criticism has been wet I described in other works,' and thus will not be reiterated h.re. Since the original impetus behind the develop­m.nt of this new power amplifi.r design was a general dissatisfaction with the performance achievable by volt­ag. feedback circuits, some discussion of their diAd­vantages is worthwhile. This will serve to set the stage for the in-d.pth discussion of current feedback amplifi.r analysis, in Appendix A. Although the analysis section can be skipped without disrupting the continuity of this not., the reader is encouraged to review it.

Constant gain bandwidth characteristics, resulting from the application of voltage feedback, present a problem if one requires reasonably high gain while limultaneously achieving wide closed-loop bandwidth. Som. very high voltage power amplifiers may require gains n high n 50, for exampl., plus a bandwidth of severll hundred kilohertz which obviously means that I gain bandwidth product in the rlnge of 10 MHz to 20 MHz is needed. This is not eaay to achieve, eepecially in a high voltage de­sign. An additional problem with voltage feedback Im­plifiers is that their slew rate is U8UIlly limited by the transconductance stege which hn a finite maximum output current, normally equII to the tail current of the differential input transistor pair, availlbl. to chlrge the compensation capacitor. High slew rate is very desirable in I large-lignal audio power amplifi.r and mlndates the use of larg. input-stlg. tail currents and Imlll com­penAtion capacitor values. Unfortunately, in the inter­ests of amplifi.r stability, reducing the valu. of the compensation capacitor requires some degen.retion of the input stag. (to reduce its transconductence) which thus reduces the open-loop gain. This action reduces the loop gain available in the audio band and cau ... an incr.ase in THO products, since it is the loop gain thlt

serves to reduce the open-loop amplifier distortion, most of which originates in the highly nonlinear output stage. What all this boils down to is the fact that a difficult trade-off has to be made ,between stability, open-loop gain, and slew rate without compromising the overall ac performance and transient response. CI.arly, a global voltage feedback scheme may not nec­eSArily be the optimum choice for ultrahigh perfor­mance audio power amplifi.rs, and in some cases it will not even be possible to meet all the design goals using this topology.

Current feedback operational amplifiers were originally introduced because they overcame the bandwidth varia­tion, inversely proportional to closed-loop gain, exhib­ited by voltage feedback amplifiers. They still show a slight variation of bandwidth, however; as the gain is increased above unity, but it is much less significant than with the latt.r. In fact, current feedback amplifiers don't begin to behave like voltage feedback amplifiers until the closed-loop gain is made quite large (-50). The simplified model of a current feedback amplifier in Fig­ure 1 shows that it u ... a unity gain input buffer whose output current is fed, via a bidirectional current mirror, into a transimpedance gain stage. The voltage gener­ated h.re is then buffered and fed to the output terminal. Typical values for RT are quite high, usually sev.ral hun­dred kilohms or .ven a few megohms. R1NV is the output resistance of the input buffer, and feedback resistors R,

and Rz set the input-to-output voltage gain in a fashion somewhat similar to that of a conventional op amp. H.re, however, it i. an .rror current I, that sustains the output voltige and not an error voltage.

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Figure 1. The Model of a Current Feedback Amplifier Shows that an Error Current, I"� Determine. the Overall Output Voltage.

Th. concept of a finite glin bandwidth product can also be applied to a current feedback amplifier as a measure of its performance, although it is only m.aningful at high gains. Arguably, the most important attribute of this topology i. that the amount of current available to charge the compensation capacitor during output slew­ing i. proportional to the difference between the actual and final output voltages, just lik. a simpl. RC circuit. As such, th.re is theoretically no slew rat. limit with this topology, which malcea it v.ry attractive for an audio power amplifi.r. Practical circuit limitltions inevitably

impose a restriction on the maximum current level that can be handled in the gain stage of a current feedback amplifier, however, and it is this limiting that gives rise to a finite slew rate. Still, the slew rates achievable with these types of circuits are often higher by as much as a factor of 5 (or greater) than their voltage feedback coun­terparts, for a given quiescent supply current Current feedback represents a much more logical choice for a power amplifier than voltage feedback, and this will be demonstrated.

POWER AMPUfiER CIRCUIT TOPOLOGY Prior to looking at the actual amplifier circuit, the simpli­fied block diagram of Figure 2 will be considered to help understand how the overall design works on a system level. This will make the final amplifier circuit easier to follow. As may be gathered from Figure 2, this is a rather unconventional design, in which there are two op amp input stages feeding a single gain stage and power out­put buffer. By considering this design one block at a time, however, it is becomes easier to grasp the way in which each of the major sections interacts with one another.

Thelnput ..... The input buffer used in this power amplifier is simply a conventional voltage feedback op amp chosen for its excellent audio characteristics, and reuonably high out­put current capability. This ensures that the limiting fac­tor in terms of overall amplifier performance will be the current feedback gain block and not the input stage. The output current from input amplifier A1 is taken from its power supply pins and fed to the emitters of a pair of common baH cascode transistors that provide regu­lated dc voltages for the op amps. At first glance this might appear to be a very strange connection, because

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the power supply pins of A1 are used as outputs and its output is used as an input. However, this is in accor­dance with the model shown in Figure 1 since the output current from the input buffer must be fed, via the bidi­rectional current mirror, into the transimpedance gain stage. It is here that the high output voltage is ultimately generated, prior to buffering by the unity gain output stage. The half-wave rectification action of A,'s output current, due to its cia .. AB output stage, causes the two current mirrors to receive complementary input cur­rents. When A1 is sourcing output current, it causes a corresponding increase in the current of the upper mir­ror and a decrease in that of the lower mirror. This forces the voltage at the output of the transimpedance stage to swing positive. For cases where A1 is sinking I current, exactly the opposite is true. A current mode I

gain stage arrangement such as this is fully complemen­tary and truly push-pull, which means it should exhibit low even-order distortion. Note that the quiescent sup­ply current of A1 conveniently serves to bias the two current mirrors that sit referenced to each power supply rail, thus providing an appropriate operating point for the transimpedance stage and bias voltage generator.

In most commercially available current feedback ampli­fiers, the input buffer stage has a gain of unity and is generally of an open-loop design. Here, an op amp is being used as the input stage instead and thus can be configured to provide some gain. This is extremely easy to do since it only involves tapping the shunt resistor to ground at the output of A1. The overall amplifier mid­band gain is therefore:

(1)

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Figure 2. A Simplified Block Diagram of the Amplifier Shows that the Input Amplifiers, A, and Az. Feed a Common Gain Stage and Output Buffer.

AUDIO PRODUCTS 4-59

The Gain Stage and Frequency Compensation The outputs of the two current mirrors that are con­nected to each supply rail feed an adjustable voltage bias generator which provides the necessary bias for class AB operation of the complementary MOS-IGBT (Metal­Oxide-Sem iconductor Insulated-Gate-Bipolar-Transistor) output stage. The bias generator is designed to have very low output impedance over the operating fre­quency range of the amplifier. Compensation is pro­vided by CC1 and Ccz; two capacitors are used instead of one to keep the structure of the gain stage symmetrical. Unlike the Simplified current feedback model shown in Figure 1, this design has the compensation capacitors returned to the feedback summing node instead of ground. This alternate connection has a very beneficial effect on the amplifier step respon .. when it is loaded by a fairly low value impedance such as a loudspeaker.

An IGBT emitter follower output stage, such as the one used in this amplifier, has a transfer function that con­tains two poles and a real zero plus the usual dc gain term of slightly less than unity. When the amplifier driv .. high valu .. of load impedance, such as the feed-· back resistors alone, the two output stage poles are quite high in frequency (usually above 20 MHz), and contribute little excess pha .. shift within the amplifier's puabend. Quite a different situation ari ... when a load is connected to the output of the amplifier. The two pol .. in the output stage now split apert, and the domi­nant one becomes sufficiently low in frequency that it contributes excell phase shift at lower frequencies within the amplifiers' pallbend. This can cau .. a consid­erable problem if the compensation scheme in Figure 1 is used since it may r .. ult in undesirable ringing on the edg .. of a square wave. The compensation scheme of Figure 2 overcomes this problem by in .. rting a high frequency closed-loop zero that tends to make the am­plifier more stable. Also, this compensation arrange­ment allows the use of smaller capacitors than with the original scheme. Appendix A shows the complete re­spon .. of the amplifier when this alternete compensa­tion scheme is used. If we allUme that the small signal transresistance, RT, is quite high and a. that the output buffer gain is near unity, then the closed-loop pole and zero will occur at frequenci .. given by:

and

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(3)

where CC12 is the sum of CC1 and Ca. Notice that the frequency at which the zero occurs is approximately equal to the closed-loop bandwidth multiplied by the gain of the current feedback loop, if RINV is fairly small in value. The .. equations, plus Equation (1), are the neces­sary design formulas needed to determine the gain and small signal bandwidth of this amplifier. Later on it will

4-80 AUDIO PRODUCTS

be demonstrated that the mathematical theory and ac­tual measurements made on the circuit do indeed corre­late very well with each other.

Driver and Output Sta .... This part of the power amplifier design is quite conven­tional, relatively speaking, and no attempt was made to use error correction or pseudo clall A biasing schemes to lower the output stage crossover distortion. Since the primary design objective for this amplifier was wide bandwidth and high slew rate, it was felt that any addi­tional circuitry following the transimpedance gain stage might degrade the closed-loop stability. B .. ides, low cr08lOV8r distortion can be achieved by running the output transistors at a sufficiently (but not excessively) high idling current. A simple double emitter follower driver stage, therefor., was chosen to buffer the voltage generated by the gain stage and feed it to the gates of the power IGBTs. This driver stage is capeble of provid­ing several hundred milliamps of charging current for the I�BT gate capacitances while the output is slewing, and IS mandatory in a high speed design such as this.

DC Control Am .... The purpose of this additional input stage is to provide an accurate, low drift, dc gain path to the main output that is independent of the ac gain path and its poor dc characteristics. In the original version of this amplifier, expensive pricision matched NPN and PNP dual transis­tors were used in the two current mirrors, but no dc control amplifier w .. used. It wa. incorrectly allumed that precise matching of the transistors in each mirror would result in very low output offset voltage, as long as the input buffer had realOnably low input offset voltage as wetl. Aa it happena, this ia not the ca .. with a current feedback amplifier. Any miamatch between the two cur­rent mirrors resultl in a finite amount of bias current appearing at the output terminal of the input buffer which must flow through feedback r .. istor R. to th� output. It cannot flow through R. and R7 to ground, becau .. the current in these resistors ia 88't only by the voltage appearing at the output of the input buffer. The output offlet voltage, without the dc control amplifier is thua:

Voos = VIO$fA11 (1 + ::) (1 + R. � R7) + IIIAS R. (4)

Normally, VIOS (A,) can be made quite amall by using a low offlet op amp. Unfortunately, the output terminal bias current, I� can be aa large .. 1oo .,.A under static conditiona and even larger if a thermal gradient exists between the two mirrors on the power amplifier driver board. Thi. can easily lead to an output offlet in excess of 100 mV, which chang .. as the amplifier warms up. A large offlet like thia ia likely to cau .. an audible click when the relay that connectl the loudspeakers to the amplifier is energized, and ia generally undeairable.

The IOlution to th ... problema ia a low frequency servo­loop that controla the dc output voltage, independently of any low frequency current or voltage fluctuations in

the main current feedback gain path. This is facilitated by the use of a second low power precision op amp, A2, that is configured as an integrator with very low cross­over frequency (less than 5 Hz). The low crossover fre­quency ensures that the integrator will not have any effect on the performance of the overall amplifier in the audio band. Voltage feedback is applied from the main output back to the input of the integrator through resis­tors R,o and R", which set the closed-loop dc gain. This gain is made equal to that given by equation (1). Since A2 drives a resistor connected to ground, as shown in Figure 2, it behaves as an operational transconductance amplifier with the output current taken from its power supply terminals. This compensating output current is then fed to the two common-baH regulator transistors where it is summed with the signal current from the power supply terminals of A,. The output current of A2 is thus forced to cancel l.1AS almost exactly becau18 the dc gain of the integrator, coupled with the additional gain produced by the transimpedance stage, is very high. Conaequently, the integrating control loop completely overrides the current feedback loop at de and the output offset is reduced from that given by Equation (4) to:

Voos = VIOSIA2I (1 + :::) (5)

This means that it can be made arbitrarily small through the choice of a low offset amplifier for �. Here the cost of an additional op amp is more than offset by not having to UN expensive matched NPN and PNP dual transistors in the current mirrors.

AMPLIFIER CIRCUIT DESIGN The complete circuit diagram for one channel of the amplifier is shown in Figure 3, and an accomPlinying parts list is included in Appendix B. This design utilizes 2 Ie op amps, 17 bipolar transistors in the gain and driver stag .. , and at least 2 complementary IGaT power transistors from Toshiba in the output age. These re­cently introduced devices are euentially similar to power MOSFETs in that they have a very high imped­ance input terminal (the gate) and squara-law transfer characteristics, but are manufactured using a slightly modified double diffuMd MOS procna. Unlike power

MOSFETs, however, they feature consistentiy higher currant handling ca.-bifity for N- and P-channel tranai. tors of a given die size. This allowa one to get by with a smaller die size IGST output stage than one using MOSFETs, thus providing a fairly substantial cost sav­ings (especially on the P-channel transistors). The driver stage in this amplifier can easily accommodate multipla pairs of power devices in the output stage, becau .. of its high peak current drive caPlibility, but just • single PIIir of 250 V, 20 A IGBTs was used in the version that was characterized here. Power supply voltages for the driver board and output stage may range from ±20 V to ± 75 V. Most of the components that mount on the com­pact driver board, the layout of which is shown in Figure 4, are quite readily available and inexpensive.

An input filter with a cutoff frequency of approximately 2 MHz precedes the input stage. It was included to re­duce the potential for RF interference problems, and to eliminate the possibility of the amplifier oscillating on power-up with the input left floating (something that was noticed during the original development of this to­pology). The filter is formed by the 100 n input resistor and 750 pF shunt capacitor. A 100 ten resistor is con­nected to ground at the input of A" and provides the necessary dc bias current path to ground if the input is inadvertently left open. The overall amplifier gain is set by R .. R7, and R., and substituting the values of these resistors into equation (1) yields a figure of 24.087 or 27.64 dB. If more gain from the circuit is desired, the valu .. of R. and R7 should be changed, but their sum should be kept approximately equal to 50 n so that the gain of the current feedback section stays constant (at about a factor of 16). By simply swapping the 16.5 nand 33.2 n resistors, for example, the gain of the input stage becomes approximately equal to 3, and the gain of the overall amplifier increases to a factor of �.47 or 33.7 dB. In fact, the gain of the input stage can be made as large as 20 dB before its bandwidth drops below that of the rest of the amplifier.

The references for the two common-ba .. regulator tran­sistors (0, and �), which provide stable supply volt­ages for the op amps, are actually two PIIirs of standard NPN bipolar transistors (2N3904s) used as Zener diodes (0'4 through 0'7)' They are connected in series (with their collector leads clipped off) to obtain a net break­down voltage of around 1 5 V for the pair. There really is a good reaaon for using such an arrangement since it would obviously be easier to use a 15 V "Zener" diode, as opposed to this seemingly more complicated ap­proach. In reality, the connection of two bipolar transis­tors in this manner exhibits significantly less low frequency noise than the 15 V "avalanche" diodes, as they are more appropriately called, and is actually more cost effective. The compoaita Zeners are byPlissed with 10 ... F 26 V tantalum capacitors, used mainly for reasons of economy and size, which fllter out residual noise from the diodes as well as the power supply rails. Two resis­tors marked Rt11A8 on the circuit diagram (R, and R2), which are connected to each supply, serve to bias Zener connected transistors 0'4 through 0'7 and should be chosen such that with nominal power supply operating voltages (anywhere from 50 to 70 volts) about 1 mA of current will flow through them.

The two Wilson currant mirrors connected to each rail, and fed from the collectors of 0, and �, are formed from a low voltage transistor, a diode and a high voltage transistor (2N5551 or 2N5401 ). They are degenerated somewhat with 100 n 1% resistors to improve matching. Anti-aaturation diodes (02 through Os) have been in­cluded to prevent storage time problems with the cas­cade transistors (�and a.) in either of the two mirrors during clipping, and this r .. ults in extremely rapid re­covery from overdrive. It should be noted that the onset of clipping in the tranaimpedance stage will occur at

AUDIO PRODUCTS 4-61

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about 2 V from either power supply rail for very small overdrive conditions, but hard clipping in this stage will actually be dependent on the current limit of the input amplifier A,. This occurs because, during hard clipping, the current summing network connected to the output of A, is no longer balanced and significant current can flow in its output stage. Consequently, the current in the mir­rors increases very rapidly up to the value of A,'s maxi­mum output capability (usu.lly 30 mA to 40 mAl, causing a corresponding voltage drop acrosl the afore­mentioned 100 n relistors. The effect of this excessive current in the mirrors is such that it causes the clipped signal to "pull in" slightly from the r.ils, al the amplifier is driven h.rder .nd h.rder into its overlo.d region. It is very important not to let the circuit stay in thil condition for any Significant period of time, since the power dissi­pation in a, and � will increne f.r beyond their nom­in.lly rated value of • few hundred milliwatts. Peak dissip.tion in these transistors can reach al much as 1.5 W to 2 W, with typical r.iI voltages of 50 to 70 volts; therefore, very I.rge dc input lign.ls or low frequency squ.re w.ves should be .voided. If these oper.ting con­ditions are anticipated, however, clip-on heat sinks for a, and Oz are mandatory.

Frequency compensation in this particular design is pro­vided by two 47 pF compensation capacitors that are connected to the feedback summing node (C. and �), al mentioned previously. This results in a total value of 94 pF. The reason such a large value of capacitance w.s chosen is quite simple: it completely swamps out any nonlin.ar voltag. d.pendent capacitances that are present at the high impedance g.in node, resulting in constant amplifier bandwidth .s the supply voltage is varied. Concerns .bout too low a slew rate, with such large compensation capacitors, .re usu.11y justified in a voltage feedb.ck .mplifiers, but h.re th.re is •• much .s 30 mA of current av.ilabl. to charge them .nd slew rate limiting will not norm.lly be encountered.

A calculation of the .xpected frequ.ncy rasponM of the amplifier is now in order, .nd can be accomplished quite easily by substituting the value of 94 pF for Cc,z, and the values of 750 n for R., 1 6.5 n for R7, and 33.2 n for R. into Equation (2). Th. v.lu. for RtNV is a little more difficult to determine since we must know • priori what the v.lu. of the closed-loop output resistance of A, ii, at th. over.1I -3 dB point of the .mplifi.r. Th. solution to this problem actu.lly involves . littl. bit of circul.r rea­soning, but the motive behind it i. rather •• SY to .... If Equ.tion (2) is ev.lu.ted initi.lly without considering the effect of RtNV, • closed-loop bandwidth of 1 .12 MHz is calculated. Since the effect of • finite RtNV is to lower the bandwidth somewhat, • prediction of the fin.1 .m­plifi.r clo.ed-loop b.ndwidth will allow .n initl.1 gUH8 for this p.rameter to be made. In this caM • prediction of • fin.1 closed-loop bandwidth of 1 MHz il m.d •• If we now take the open-ioop output resistance of A, from its data Iheet (.bout 70 0) .nd divide it by on. plus the value of its loop g.in .t the predicted "-3 dB point of 1 MHz (about 7.68), a v.lu. of 9.11 n i. obtained. Wh.n

this estimate for R1NV is included in Equation (2), an overall closed-loop bandwidth of 1.034 MHz is the final relult. This is really very close to the original guess of 1 MHz, and it seem. that no further iteration will be nec­essary to get closer to .n acceptable anlwer. It should now be plainly app.rent th.t extraordinarily wide closed-loop bandwidth seeml rather easy to come by in a current feedb.ck pow.r .mplifier, even when the com­pens.tion cap.citors are quite large. For thil reason, careful bo.rd layout and wiring techniquel are of tanta­mount importance in .ctually getting a design such as this to work properly without oscillating.

The output stage bi.1 voltage generator, connected be­tween the collectors of a. and a.. is formed from a programm.ble shunt regul.tor (�), with an NPN I emitter-follower buffer (a.) driving its control input. This buffer il not norm.lly required in most .pplications be­caUM the control input bi •• current of 07 (a TL431) is only a few micro.mps, but it il included here for thermal compensation of the output stage idling current. A com­mo� problem with bi.sing output stage. that use verti-cal OMOS devices (MOSFETs and IGBTs) is that at mod.rately low current levell, the decre.se in VTH of approximately 3 mVrc caU .. 1 the collector current to increase for . fixed gate-to-emitter bial voltage. If tran­sistor a. il securely mounted on the sam. h.at sink as the power IGBT output stag., its V .. will decr.a .. as the output tranlistors h.at up. Thil decr .... in VeE of about 2 mV/oC, which il multipli.d up in the bias gen.rator by approximately • factor of three, thus h.lp. to stabilize the quiescent current in the IGBT output st.g •. A form-C rel.y can .Iso be included .cross the 50 ten bi •• adjust­ment pot (VR,), al .hown, to allow the amplifi.r to be powered up with zero bias voltag. on the output transil­tors. This feature, when used in conjunction with resis-tive surge protection sch.mes for the main filt.r capacitors (and bridge rectifi.rs) during power up, will prevent any static voltage drop across the current limit-ing resistor due to the amplifi.r class AB idling current.

Som. means must be provided, •• well, to protect the output transistors from any condition that could c.u .. their gate-to-emitter voltag_ to exceed the maximum .lIowed valu. of ::t20 V. Thus, Zen.r diodes O. and 0'0 are connected from eith.r lide of the bias gen.rator to the main output, and prevent the voltag. seen between the gain stage and the emitters of the IGBTs from ex­ceeding more than about 12 V.

The IGBT output stage i. operated in a complementary emitter-follower configuration running at an idling cur­rent of about 100 rnA, .nd .. ries gate resistors RZ3 and Rze are included to limit the frequ.ncy response. This mitig.tes .ny tendency, in the f.irly wideb.nd output stage, tow.rds parasitic oscillation. Current in the output stage is .. nsed .cross two low v.lue resistors, RZ4 and Rft, connected in .. ries with the emitters of the IGBTs. As the voltage drop across eith.r of these two resistors incre .... tow.rd. 0.7 V, 012 or 0'3 will begin to conduct current aw.y from the gain st.ge .nd thus limit the

AUDIO PRODUCTS 4-63

output voltage. This is a convenient way to limit the current in the output stage to a safe value. Emitter de­generation resistors (10 n ) must be used in conjunction with the two limiter transistors, 0'2 and 0,3' because this circuit has quite a bit of gain when active and tends to oscillate slightly at high frequencies. Since these tran­sistors must sink or source all the current from the tran­simpedance stage (up to the current limit of A,) when the output current is being limited, the voltage across the 10 n resistors will increase slightly as the amplifier is driven into hard limiting. This causes a corresponding increase in the actual value of limited current, resulting in a somewhat "soft" limiting curve.

Of course, current limiting alone is not enough to guar­antee power transistor integrity if short circuits to ground at the output are anticipated. This results from the fact that excessive power di .. ipation in the output stage will still occur if the current limit is set fairly high (actually a very desirable attribute in a modern ampli­fier). Fusing the power supply feed to the output stage will usually be necessary for protection of the power transistors.

PRACTICAL CIRCUIT CONSIDERATIONS It is often mistakenly allumed that once a respectable topology has been chosen for a power amplifier, it is a simple task to construct a completed unit that meets all the original design goals. In fect, getting the phYSical details of an amplifier's construction properly sorted out can be just II time consuming as the actual design of the driver electronics themselv ...

CIrcuit Boerd LIIyout This is probably one of the most critical elements for a wide bandwidth audio power amplifier. The key to good board layout for this design is to keep trace lengths to an absolute minimum wherever possible, and to keep the overall layout very small in physical size. Figure 4 shows the layout of the board used to characterize this new topology, and as can be seen, the component packing density is reasonably high - it measures Ie .. than 9 em on a side. The layout of the driver board actually follows the amplifier circuit diagram fairly cIOMIy in orientation, since it was begun on the left hand side where the input stage resides, and finished on the right where the output stage drivers are located.

Power supply bu .... travel along the top and bottom edges of the board, thus providing a convenient means of picking off power for the various stag... The two

polyfilm bypa .. capacitors on the board actually have their own ground return paths that are independently isolated from the signal ground bus near the input mge. This may seem a like a subtle refinement, but on the original layout the bypall caPacitors shared the same ground bus as the input stage, and strange low level oscillations were noticed on the first prototypes. It turned out that the oscillation was occurring as a result of the discharging of the bypass capacitors into the driver transistors (and ultimately the gates of the output

o

o

o

0 0

!OO" �oo! '<toli

0 0": 0" 01 0, Oc, 0

JRG

o

a. Topside Silkscreening

o 0 o o o 0 '0

..... �-IiII! ..... -- 0 0 0 0 0

OOO

�

o o 0

000 00 000

0 � o

o 0

b. Topside Layout

c. Bottom.ide Layout

JRG

o

Figure 4. A Compact Driver Board Contains All Amplifier Circuitry Except the IGBT Output Stage.

transistors) due to an initial perturbation in the circuit. This initial disturbance eventually lead to a self sustain­ing relaxation oscillation (of a few hundred hertz) be­�ause the ground bus surge, as the capacitors were discharging, was sufficiently large so as to be coupled back into the input stage of the amplifier. The improved layout of Figure 4 does not exhibit this anomaly.

CritIcal Component Selection Some of the resistors in this design require great care in their selection, since the wrong type of resistive element will lead to unexpectedly poor performance. In particu­lar, the 750 0 feedback resistor R. should be an over­sized completely non inductive metal film power resistor with a di88ipation rsting of at least 2 W (remember that the peak current in thil component may be al high al 75 mAl. Failure to use a resistor with a high enough power rating will very likely lead to thermal modulation of the actual resistance value and a corresponding inc ...... in overall amplifier intermodulation distortion when large low frequency input signal components are present. Ad­ditionally, a low temperature coefficient of resistance is very desirable for this part. The current sensing resistors in the output stage (RM and Ra) should allO be of the low or noninductive variety. Since the short rise time of the amplifier (approximately 350 nl) means that a large dildt in the load, and hence these resistors, can occur, any exC88Sive inductance will cause the voltage acrOll them to increase during fast edge transitions thus caUI­ing premature current limiting.

Input amplifier A, plays a significant role in the overall performance of the .mplifier. It must po..... .11 the desirable ch.racteristics of • good line level audio op • mp (n.mely low distortion, high slew rate .nd wide g.in bandwidth product), plus it must h.ve good output current capability 81 well. The SSM2131 BiFET .udio op amp with a GBW of 10 MHz .nd slew r.te of 40 VI.,.. more th.n meets the requirements for this design. AIIO, amplifier � in the integrating de control stage must have very low input offMt current in addition to low offset vottage. Thil il because 1 MO resistors .re used, in series with its input pinl, to obtain the long time constant needed in thil stage. Too I.rge .n input offset current would cau.e • sufficiently large differenti.1 dc error to appear ICI'08I theM reeiators (m.ny mY) .nd it would render a low input offMt voltage op amp totally usel .... The OP-97 �uateIy satisfies these require­ments with an input offIet current of only 30 pA .nd offset vottage of 30 Jl.V.

, ......... OutputT .......... This is .n extremely important topic because most .m­plifiers will use more than one pair of output tr.nsistors per channel, 10 that low impedance loads can be accom­modated without the output stage self-destructing. Since the maximum power dissipation in the output stage incre .... with decreasing load imped.nce, it is desirable to ensure adequate static and dyn.mic current sharing amongst .11 the output tr'nlistors. This will min­imize the junction-to-caae temper.ture rise in any one

output device; Power MOSFET output stages can be effectively made to share current by means of tight ther­mal coupling between all transistors, and through the inclusion of appropriately valued series source­ballasting resistors. There is no reason to believe that power IGBT output stages, with their very similar square law transfer characteristics, will behave any differently if the same techniques are employed.

Typically for best current sh.ring in a MOSFET output st.ge, the v.lue of the lOurce resistors should be » 1/gm of each transistor over its desired drain current r.nge. Since the tr.nsconductance is lowest at the out­put stage quiescent point, using this value of gm should gu.r.ntee sharing over the full output current range. Unfortunately, in practice this may lead to rather largel resist.nce v.lues' .nd correspondingly large voltage drops when high values of load current are being deliv­ered. A better IOlution is to do a limited amount of prescreening on the N- and P-channel IGBTs to eliminate any devicel with larger than average characteristic devi­ations in VTH and gm (at the idling point). Once this is done, it becomes feasible to use series emitter resistors in the range of O.21gm to O.51gm, which will help to minimize the voltage drop. For the Toshiba IGBT output devices used in this design, the typical gm at an emitter current of around 100 mA is clo .. to 1S. For example, if an eight transistor output stage is needed that must have a total idling current of 400 mA, series emitter resistors in the range of 0.2 0 to 0.5 0 are acceptable along with lOme limited screening of the output transis­tors prior to installation.

WlrlngT ....... Some amplifier designers relegate power supply and output terminal wiring to the lowest level of the design ph .... However, since these wires may carry large pul­sating currents with a harmonic content well above the audio band, it pays to devote lOme attention to this task. Wiring is probably one of the most critical things that must be accomplished succeufully, if the final design is to get anywhere close to the performance me.sured on a prototype breadboerd (where the wires .re normally quite ihort). Usu.11y the layout of the power supply wiring is not particularly well controlled, but some very simple rules should be obMrved that will maximize the likelihood of success at first power up.

One of the most important rules in wiring I.yout is to use twisted pairs for the forward .nd return currents paths in .ny loop. Thil minimizes the series inductance of the conductors, lince inductance incre .... with cross sectional loop ar ••• Thus all power supply wires from the filter capacitors to the amplifier output stage(s) (and driver boards) should be twisted together, as shown in the system connection diagram of Figure 5. Fuses are placed in seri .. with the power rails to protect the out­put stage in the event that .n accidental short circuit in the load occurs. They should be of the fast blow type, .nd must be rated appropriately so that they will not

AUDIO PRODUCTS 4-65

RILAY +,,---#DIRL+

DRtVa 12V _ "-+---++01

!ClIP'" CIIIOWe CC'IIIIC11ON AlIHOAT AI

�

C14

..... 1011V C11

1 ...... 1011V

1 ...... 1., C11

IltAlDPOWU lWfI&.y ....

TOGITHIR NOn: POWlIR V+ , !CIIP CCI •• cnaNlKIWUN IWfI&.Y .. ... .;;���e����e��1 lIMa � AND 0U'r'UT STAGe IK710N AlIHOATAI� �

Rgure 5. A Power Wiring Scheme Requ;,.. Proper Attention to Defaillt Low Distortion Is to Be Achieved.

open up under peak outpUt power lev .... The wi,.. that . run from the output stage to the loudspeaker connectors

�- .hould also be twisted together, a •• hown, to minimize their inductance. All interconnection. between the driver boards and their respective outpUt stag ... hould be kept very .hort, in the interests of closed-loop stability. The .. ri .. gate resistors for the IGSTs .hould be connected directly at the package terminal. of th .. e devices.

These tips are all a definite step in the right direction, but there is something .... to consider that is decidedly not obviou.. Since the positive and negative supply Iuds which feed the output �s� have half-wave rectified

current waveforms, a. shown in Figure 6, the harmonic current (occurring at even multiplea of the fundamental output frequency� circu ..... in the loop formed between

the power .upply capecitorland the output tran.istors2. If there is any mutual induc:tance between theee power supply Iuds and the output terminal loop, after the point at which neptive fMdback h .. been extracted, even order distortion componenta can be induced in the output thet cannot be attenueted by the feedback action of the amplifier. For a typical amplifier with RL ,. 8 0 and sinusoidal excitetion, then et an output frequency f ,. 10 kHz, the induced second harmonic component in the output loop will be approximately 0.33% per ..,H of mu­tual inductance. It .hould be noted that the magnitude of the induced distortion components i. proportional to the output frequency (i.e., they get larger as the frequency goes up), which can be minimized by k .. ping the power

input and .peaker wiring runs perpendicular to each other. Thus the outpUt transistors should be physically

4-68 AUDIO PRODUCTS

connected to the power supply feed and output terminal cabling .. shown in Figure 7. Thi. approach minimizes the mutual coupling between the power input and out­put paths of the amplifier.

.... 1IinkInt and ThMnIII ConaicNretiona Heataink selection .hould never be underestimated be­cause it is one of those critical areas that, if neglected, will inevitably r .. ult in damage to the output transistors from exceaaive junction temperature. In most class AS power amplifiers, the total dissipation in the output stage i. split equally between the two banks of output transistors (the N-channel units and the P-channel units). An equation that relates the power supply rail voltage and load Impedance to the total maximum output stage power dissipation, under sinusoidal excitation, is given by:

(6)

where e i. the phase angle of the load. As an example, consider the case of an amplifllr with a two transistor outpUt stage powered by �60 V raila, and loaded by an impedance of 80 with a ph ... angle of +30". Under theee conditions the maximum dissipeted power will be 105.3 W. The To.hiba N- and P-channel lGSTs are rated for 180 W dissipation at. Tc of 25OC, but this is derated to zero at a Tc of 15CrC. The junction-to-case thermal reaistance (R..,d for these transistors is calculated by dividing the total difference in case temperature change (125"C� by that of the total change in power dissipation

v. _ .... _____ .... _

v- _+-_____ ..... _

Figure 6. Harmonic Currents in a Power Amplifier Circulate Between the Supplies and the Class AB Output Stage.

Figure 7. The Preferred Output Stage Layout and Component Placement

(180 WI. This results in a figure of 0.894·CJW. Since the total power dissipated in the output �e is split equally between the two transistors, the effective R..,c il equal to 0.89412 or O.34rctW. To ensure that the outpUt stage transistors do not reach their maximum allowed junc­tion temperature of 1SOOC, the total thermal resistance from junction-ta-ambient (assuming T A = 25OC) must not be greater than 1250C1105.3 W or 1. 19"CJW. When the junction-to-case thermal resistance of the total out­put stage is subtracted from this number, we are left with the net allowed case-to-ambient thermal resistance (RecA) of O.84:rCJW. This value includes any thermal resistance due to the insulating washers that must be used to prevent the transistors from making electrical contact with the heat link (often as much as O.�CJW per insulator). Thus in reality, some allowance for the inter­face materials must be made in the choice of the final extrusion which will provide heatsinking for the power transistors. In the example here, a large finned heatlink with a sink-to-ambient thermal resistance (ReBA) of around 0.89"CJW is required. Of course, had two pairs of transistors been used in the output stage, the net R..,c

would have been lower by a factor of two and a smaller extrulion could have been used for the heataink. Thus there is a limited trade-off that can be made between the number of transistors and the lize of the output stage hHtlink, for a given power supply rail voltage and load impedance.

MEASURED PERFORMANCE Table I provides a synopsis of the overall performance of the current feedback power amplifier using the new complementary IGBT output devices. Although this de­sign does not achieve astoundingly low distortion levels typical of more comptex topologies that employ linear­ization schemes in the output stage, the measurements made show that the THO and IMO generated by this circuit are still respectably low. Figure 8 shows that the overall harmonic distortion at 50 W output into an 8 n load is a minima' 0.001% at 1 kHz, rising to just under 0.0090/0 at 20 kHz. This is a particularly good result con­sidering that only one pair of output transistors has been used. Also, no low-pass LR isolation network has been used in series with the output that would tend to

AUDIO PRODUCTS 4-67

II

attenuate the high frequency harmonics. This would ar­tificially improve the amplifier performance in the vicin­ity of 20 kHz, and was deliberately excluded. SMPTE intermodulation distortion for 60 Hz and 7 kHz mixed 4: 1 is plotted in Figure 9 a8 a function of the rms input level and, as the curve indicates, it is extremely low being just 0.0004% at 41.7 W into 8 n (0.92 V rms input). The absence of any significant upward slope in the curve of Figure 9, except where the amplifier il entering its over­load region at about 0.95 V rms input, indicates a lack of thermal modulation effects on the 750 n feedback resistor.

= _. s -. __ _ , _ _ , .. _ • •• 18 •• .... ,--' .... . ::: .:: : ::.: : :::::::::::::: ::::::. :::::

. ... -= :::: .::. :: : . ::-;;iip

-1-- " .. . .. -:::::::::: .:::::: . .-.. �

............... ....... 1-. .. [7-...... .j...J..�>�-... --.. -- .... .. . ........... - ... .. .. ... +�I+H--

1-._. .. ...... 1-. .. .. ..-.. - /v •. - f ................ L .. ·U· .. .... .. ·W .. � .

..... � .. ...... � ... "m::/. '�i" •. § .. -� .......... _ _ .. -.......... ......... .. +++++-1+--

�+-"+.j..I+-.........

--" I-.. I-HH+ff--·+-++++++#---l L. ...

... _ . ......... J......L_ .... .L..L.LLL _ _ L-L...J......L..LI.J..U_-'

Rgure 8. Amplifier THO Is Below O.DOn Throughout the Audio Sand When Delivering 50 W to An 8 n Load.

.. _ . ..... .... ... -: .

.....--:-r---=-n

. .- ... . ::::::::::::::::::::::::::: .... ::::::::::::::::::::: .:::::�:::::::::: .:::::::::: .. :::::::: .:::::: .. ::::: .. :::: ..

........................................ -... .._ .... _ ........ - ..... _+--

Rgure 9. SMI'TE Interrnodulation DilllOrtlon (60 HzI7 kHz 4: 1, 40 W into 8 nJ I. Exceptionally Low, RNChing Almoat 0.0002% Before R�ng a. the Amplifier Enters it. Overload Region.

4-68 AUDIO PRODUCTS

Table 1 . Sumrnary of Amplifier Performance (VSUPPLY = :40 V, Current Umited to 2.5 A Average Per �II, At. = 8 0)

Sine Wave Power Output (Voltage Limited)

Total Harmonic Distortion at 1 kHz Total Harmonic Distortion at 20 kHz

(Depends Strongly on Idling Current Level in Output Stage)

SMPTE Intermodulation Distortion . Dynamic Intermodulation Distortion

(DIM-100) Frequency Response (-3 dB) Slew Rate Rise Time (Input Filter in Circuit) Total Quiescent Supply. Current

70 W 0.001% at 50 W

0.009% at 50 W 0.0004% at 41.7 W

0.0012% at 50 W OC to 1 MHz >200 V/JA.S 400 ns 130-150 mA

Static distortion measurements ali de, what does put the current feedback topology into a cia .. of its own is the dynamic performance. High Ilew rate is always critical in any large signal amplifier design, but proper waveform control during the reproduction of a square wave is just al important. Because of the nature of the gain stage arrangement in thil amplifier, slew rate limiting occurs at a very large rate of change (typically 250 V/JA.S). Most normal program material is unlikely ever to cause slew limiting in this amplifier, even with large output swings. Conaequently, the value measured for the DIM-1oo dy­namic intermodulation distortion test is a very low 0.0012% at 50 W output into 8 n, as shown in Figure 10 .

-..... -- - -, .. _ . ..... .

.... r-....... -_ .. -_ ..... ,.--,- r--.... -r-.. ·-:f= .. -:I.--=· .. EE .. � ... .......... -.... -t--:: . �

..... __ ............... _-- .. _ ....

_ ........... .. .... -...... .......... ........ '''-I-- .

• _ '-.. ______ ....l-___ ...L._ .. _ . ..1...-_-'_ ...... .. _ .. ' __ . ..... 1

Rgure 10. Low DlM-foo Transient Intermodulstion Dis­tortion (3. 16 kHzl16 kHz 4. 1, 50 W into 8 nJ R .. u/t8 from the Clean Transient R .. pon ...

This is the lowest value of DIM-l 00 distortion that the author has ever seen reported for a sol id-state power amplifier. In numerous listening tests, the "fast" sound of this amplifier and its tight LF performance have been commented upon. The large signal step response of the amplifier into an 8 n load at 1 00 kHz is shown in Figure 1 1 , and the no load response with an 80 V p-p square­wave at the output is shown in Figure 1 2. Either photo­graph reveals that the ampl ifier is inherently stable and exhibits no trace of overshoot on fast edges.

Figure " . The Amplifier Exhibits Minimal Overshoot When Driving a High Frequency Square Wave into an

8 fl Load.

Finally the frequency response, as shown in Figure 1 3, does indeed verify the somewhat overbearing calcula­tions done earlier and proves that the closed-loop band­width extends all the way out to 1 MHz. Such a wide frequency response is definitely overkil l for any audio power amplifier (200 kHz-300 kHz is probably more than adequate). but it does show what is achievable with a modern design.

Figure 12. A Large Signal Square Wave at 100 kHz Shows that the IGBT Output Stage Is Inherently Stable Even Without a Load.

.30 +25

.20 'II +15

I

! +10

1&1 +5 CJ � 0

o > -6 -10

-15

-20 10

i I !

I

I : I

I

I I

100

I I ! I I I

i i I I

1

I I i

!

i T I

1 k 10k 100k

FREQUENCY - Hz

, ........ I I

I 1\ I I I

i i � I

I' i I I

! 1 M 10M

Figure 13. The Small-Signal Frequency Response Does Indeed Extend All the Way Out to 1 MHz, as Predicted by the Calculations.

CONCLUSION Once in a whi le a new design comes along that offers a different way of doing an old job. The amplifier that has been presented here offers an evolutionary approach to the task of driving a loudspeaker. When proper attention is paid to all the details (and some of them are nontrivial indeed), current feedback amplifiers can offer superior sonic performance to all known topologies.

REFERENCES ' Mark Alexander, "A Current Feedback Audio Power Amplifier," 88th Convention of the Audio Eng. Soc., reprint #2902, March 1 990.

2Edward M. Cherry, "A New Distortion Mechanism in Class B Amplifiers," Journal of the Audio Eng. Soc., Vol 29, No. 5, pp. 327-32 8, May 1 981 .

AUDIO PRODUCTS 4-69

II

APPENDIX A: FREQUENCY RESPONSE OF CURRENT FEEDBACK AMPLIFIERS To derive the input-to-output transfer function of a cur­rent feedback amplifier, the representative model shown in Figure 1 4 must be analyzed. Instead of a differential input stage, th is topology util izes a unity gain input buffer, driving a low impedance current summing node, which forces the inverting terminal to be at the same potential as the noninverting input. A nonzero input buffer output resistance, R1NV' is shown in series with the inverting terminal and must be included in the anal­ysis of closed-loop gain versus frequency. Neglecting this resistance is a common oversight in simplified anal­yses, and leads to a transfer function that will not show any bandwidth variation with gain at al l . Feedback is applied from the main amplifier output back to the in­verting terminal through the current summing network that comprise of R, and R2.

VIN (INPUT)

CURRENT

MIRROR

"TRANSIMPEDANCE

STAGE"

Figure 14.

Vo (OUTPUT)

The action of the input buffer is to force a finite current to flow through R, that must be balanced by an almost exactly equal but opposite current in R2. Any difference between these two· currents is an error current that flows into or out of the low impedance inverting terminal. This error current (as opposed to an error voltage in a con­ventional operational amplifier) is then mirrored and fed into a transimpedance stage, consisting of RT and Cc, where current-to-voltage conversion takes place. The voltage generated here is buffered by another unity gain stage and is fed to the main amplifier output. Because the value of the small signal transresistance, RT, is very h igh (normally several megohms) only minute error cur­rents are needed to change the voltage at node 2 by several volts. Consequently, the amount of current that must flow into or out of the inverting terminal under steady state conditions is extremely small. The feedback network, even though it consists of fai rly low value

4.-7D AUDIO PRODUCTS

resistors, therefore presents a very light effective load on the output of the input buffer. To derive a transfer function for this amplifier, nodal equations must be writ­ten for nodes 1 and 2, and then combined in an appro­priate way to obtai n the final result:

Vo

R2 1 +-R, -

----:-----:::-:-

-----:------:----(7) R2+ ( 1 + ��)R'NV Cc + - - + s �����---L--

RrABuF

This relationship is actual ly very similar to that of a voltage feedback amplifier, and it can be seen that the dc closed-loop gain is nearly equal to 1 + R2/R, (assuming that the product RTAeuF is also reasonably large). The low frequency gain term is something with which most users of IC op amps should already be famil iar. At a first glance the frequency dependent term might seem to be quite similar to that of a voltage feedback amplifier, but it is in fact very different. This can be seen more easily if the expression for the closed-loop pole frequency is written down :

.& _ ABUF 'POLE = (8)

2 1T( R2 + (1 + :�)R'NV)CC Interestingly, this result shows that the pole frequency now depends predominantly on the value of feedback resistor R2 and the input buffer output resistance R1NV multiplied by the closed-loop gain. Normally the value of R1NV is made as low as possible to minimize the change in pole frequency with gain, and is typically less than one tenth that of the minimum recommended feedback resistor value. At high gains, as mentioned before, the closed-loop bandwidth starts to become inversely pro­portional to the gain because the term in the denomina­tor of Equation (8) due to R1NV starts to become dominant. The gain bandwidth product is thus:

GBW = ABUF 2 1T R'NV Cc (9)

The gain of the output buffer, AeuF' also plays its part in determining the closed-loop pole frequency. As the main amplifier output is loaded, this gain drops well below unity, and causes a reduction in closed-loop bandwidth as dictated by Equation (8). This actually tends to make the amplifier more stable since the high frequency nondominant poles contribute less additional phase shift at the lower closed-loop -3 dB point. In fact, many commercial current feedback amplifiers show sig­nificant gain peaking with l ight loads, and don't begin to behave acceptably until loaded fai rly heavily. Another thing to remember is that the minimum recommended

value for feedback resistor R2 must be strictly adhered because too Iow a value will result in an excessively high closed-loop pole frequency. This can result in severe gain peaking due to the higher order poles becoming more dominant, and is especially a problem at low gains when the multiplicative effect of R1NV on the closed-loop pole time constant is minimal.

During early development of the current feedback power amplifier it was noticed that instabil ity appeared on the edges of square waves, using the ground referenced compensation scheme. Some experimentation revealed that connecting the compensation capacitors to the feedback summing node made the instability disappear. An analysis of the amplifier response using this new arrangement was undertaken, since something must have changed to make it more stable. Indeed, when the compensation capacitors are returned to the feedback summing node i nstead of ground, the transfer function of the circuit changes quite significantly. This modified compensation arrangement also allows one to get by with smaller capacitors than before, but without com­promising closed-loop stabil ity. To see this, the current feedback model must be analyzed again but this time

the compensation capacitor Cc is returned to the s u m ­ming node instead of ground :

( 1 + �)( l ... s (2R'R'Cc)) Va = R, R, ... R, _

1 1 01 V'N (. R, ) ( ( R, R') ) R, ... 1 + R, R'NV 2R,Cc + 1 ... R, '" R,. R,wCc 1 +

RrAlJUI' ... S A.UF - RlNvCc

The major difference between Equations (7) and ( 1 0) is the appearance of a zero in the numerator determined by the parallel combination of R, and R2, and some additional terms in the denominator. The zero tends to partially cancel the second pole of the amplifier due to the IGBT output stage, resulting in greatly improved stability. Probably the most interesting thing to notice about Equation ( 1 0) however, is that the R2CC time con- II stant is now multiplied by a factor of two instead of unity •

as before. Since it is this time constant that predomi­nantly determines the closed-loop pole frequency, the original compensation capacitor value can thus be scaled down by a factor of one half.

AUDIO PRODUCTS 4-71

APPENDIX B : AMPLIFIER COMPONENT LIST FOR A SINGLE CHANNEL

Quantity Designator

Integrated Circuits

SSM-2131 P BiFET Audio Op Amp A, OP-97FP Precision DC Op Amp A2 TL431 CP Programmable Shunt Regulator 07

Transistors 2N3904 NPN, 40 V (4 Are Used as Zener diodes) 2N3906 PNP, 40 V 2N5401 PNP, 1 50 V (or 2SC2682 from NEC) 2N5551 NPN, 1 60 V MPS-U 10 NPN, 300 V'

MPS-U60 PNP, 300 V2

GT20D1 01-Y N-CHAN IGBT 250 V, 20 A (Toshiba) GT20D201 -Y P-CHAN IGBT 250 V, 20 A (Toshiba)

Diodes 1 N914 1 00 V, 1 00 mA Small Signal Diode 1 N5242B 1 2 V, 500 mW Zener Diode 1 N4938 200 V, 1 00 mA Low tRR Diode MR822 200 V, 5 A Low tRR Rectifier

Resistors

7 2 3 3 1 1

9 2 2 2

(All Values Are in Ohms, and Are 1/4W 1 % Metal Fi lm Unless Otherwise Specified) 0.05 fl, 3 W, 5% Noninductive (Shallcross LO-3 Series) 2 1 0.0 2 1 a5 1 n2 1 1 00 (2 Are Used as Gate Resistors for the IGBTs) 7 249 1 499 1 750, 2-5 W, 1 % Noninductive Metal Film 1 4.99 k 1 1 0.0 k 1 1 1 .5 k 1 1 6.9 k 1 2�9 k 1 1 00 k 1 1 .00 M 2 RalAs (49.9 k with ±65 V Power Rails) 2 50 kfl Multiturn Trimpot (Helitrim 68WR503 or Equivalent) 1

Capacitors 47 pF 5% Silvered Mica (or Ceramic) 200 V 2 750 pF 5% Silvered Mica (or Ceramic) 200 V 1 0.1 IIoF 1 0% Ceramic or Mylar 63 V 4 1 IIoF 10% Ceramic 1 00 V 1 2 IIoF 1 0% Polyfilm 100 V (Electrocube 230B1 B205K) 2 10 IIoF 10% Tantalum Electrolytic 25 V 3 2 to 1 0 IIoF 1 0% Polyfi lm 100 V 2 220 or 330lloF 1 0% Aluminum Electrolytic 1 00 V 2

Miscellaneous: Form-C Reed Relay (Coto 221 ' -1 2-300) 1 Thermalloy 6100B Heatsink for the Driver Transistors 2 Extra Large Finned Heatsink for the IGBT Output Stage 1 Insulating Pads for the IGBTs 2 5-Pin Molex Header 0.1 56 Inch Pin Spacing 1 7-Pin Molex Header 0. 1 56 Inch Pin Spacing 1 3-Pin Molex Header 0. 100 Inch Pin Spacing 1 Right Angle RCA Jack 1 Amplifier evaluation PC Board3 1

R24, R2S R,g, R20 R7 Rs R3, R'3-R,S' R23, R2S R22 R,o Ra R'2 R2, R" R17 R, a R4 Rs, Rg R" R2 VR,

K,

' First choice substitution is NEC 2SC2682; second choice Toshiba 2SC2238B. Note correct pinouts. 2First choice substitution is NEC 2SA1 142; second choice Toshiba 2SA968B. Note correct pinouts. 'Available to quelified OEMs. Contact local ADI sales office for details.

4-72 AUDIO PRODUCTS