IPRD13 - 7-10 Oct. 2013, Siena

Recent Achievements of the ATLAS Upgrade Planar Pixel Sensors R&D Project

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on behalf of the ATLAS PPS R&D Collaboration

Gianluigi Casse

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Acknowledgements: PPS Collaboration Members PPS’s participating members:

• CERN

• AS CR, Prague (Czech Rep.)

• LAL Orsay (France)

• LPNHE (France)

• University of Bonn (Germany)

• HU Berlin (Germany)

• DESY (Germany)

• TU Dortmund (Germany)

• University of Göttingen (Germany)

• University of Geneva (CH)

• MPP & HLL Munich (Germany)

• Università degli Studi di Udine – INFN (Italy)

• KEK (Japan)

• Tokyo Inst. Tech. (Japan)

• IFAE-CNM, Barcelona (Spain)

• University of Liverpool (UK)

• University of Glasgow (UK)

• UC Berkeley/LBNL (USA)

• UNM, Albuquerque (USA)

• UCSC, Santa Cruz (USA)IPRD13 - 7-10 Oct. 2013, Siena

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ATLAS Planar Pixel Sensor Project

• Prove Planar Technology for all radii of HL-LHC with rad-hard geometries (n-in-n, n-in-p)

• Geometry optimization: Slim/Active edges for improved tiling, other optiimisations.

• ProductionsCiS, MPI-HLL, MICRON, HPK, VTT

• IrradiationsReactor neutrons (Ljubljana) 26 MeV protons (Karlsruhe) 800 MeV protons (Los Alamos)24 GeV protons (CERN)70 MeV protons (CYRIC)26 MeV protons Cyclotron (Birmingham)

• Advanced simulationsTCAD packages with radiation

parameters

• Lab and test beam measurements Radioactive sources

120 GeV π (CERN) 4 GeV e- (Desy) Eudet telescope

TOOLS

GOALS• Cost reduction

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ATLAS Planar Pixel Sensor Project

Silicon Planar technology for ATLAS upgrade pixels??Have you seen the requirements?

Simone Martini ( c. 1284 – 1344)

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Phase-II Upgrade Pixel Detector

Inner radii: 2 layersLayer 1: 352 2-chip modulesLayer 2: 576 4-chip modulesIssues: radiation damage & small pixels 1.4x1016n/cm2; 7.7MGy

Forward pixels 6 disks per side552 6-chip modules280 4-chip modules3.1 m2 silicon areaIssues: large scale production of cheap thinned modules1.8x1015n/cm2; 0.9MGy

Outer radii: 2 layersLayer 3 & 4: 2940 4-chip modulesIssues: large scale production of cheap thinned modules1.7x1015n/cm2; 0.9MGy

Barrel pixels:5.1 m2 silicon area

NOTE: ATLAS applies a safety factor of 2 to the estimated doses for detector qualification!

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Requirements

• 2 outer Barrel layers / Disks– Sensor planar n-in-p– Pixel size 50 μm x 250 μm– 150 μm thicknesss– ROIC FE-I4X; 2x2cm2 thickness 150 μm– ToT = 4 bits– 2x2 FE-I4 (Quad) ~4x4cm2

– Data rates of 640 Mbit/s per module

Current ATLAS Phase-II upgrade ATLAS

• 2 Inner Barrel layers– Sensors

All sensor materials possible150 μm silicon or thinner

– Pixel size 25 μm x 150 μm – ROIC thickness 150 μm– ToT = 0-8 bits– 2x1 and 2x2 chip modules– Data rate as high as 2 Gbit/s per module

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N-in-N vs N-in-P

• Single sided process • No backside-alignment needed

More foundries available Easier handling/testing, due to lack of patterned back-side implant

• Cost-effective• Danger of sparks between chip and sensor ?

• Double sided process (more expensive, up to 40%)

• Pixel can be shifted below guard-rings• Used already widely (ATLAS, CMS, ...)

Issues to compare:Radiation hardnessPrevention of edge sparksEdgeCost and handling

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Radiation hardness and thickness

It is well documented that radiation hardness is improved (after high fluences) by thinning the sensors. Good for reducing the material. Radiation hardness of n- and p-type substrates and optimal thickness for the pixel layers is investigated.

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Radiation hardness of n-in-n and n-in-p sensors

RESMDD, 9-12 October 2012- Florence

• Produced at CiS 285 μm

• Irradiated up to 2 · 1016 neq/cm2 Charge as high as 4.2 ke at 1 kV

• FE-I4 chip allows for low thresholds of (1-1.5) ke

• Hit efficiency fully recoverable by increasing bias voltage

T. Wittig, “Radiation hardness and slim edge studies of planar n+-in-n ATLAS pixel sensors for HL-LHC”, PIXEL2012

Combined results from MPP and TU Dortmund

Irradiated with neutrons p to 1016 neq/cm2

• Charge exceeds threshold by a factor 2

• Hit efficiency 98.1 % in central region (losses in punch through bias)

C. Gallrapp et al., “Performance of novel silicon n-in-p planar Pixel Sensors ”, Nucl. Instrum. Meth. A679 (2012) 29

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Thin n-in-p Sensors with FE-I4 chip

RESMDD, 9-12 October 2012- Florence

A. Macchiolo, "Thin n-in-p pixel sensors and the SLID-ICV vertical integration technology for the ATLAS upgrade at HL-LHC", PIXEL2012

[KEK/HPK] R. Nagai, et al., "Evaluation of novel KEK/HPK n-in-p pixel sensors for ATLAS upgrade with testbeam", DOI: 10.1016/j.nima.2012.04.081

S. Terzo et al. (MPI Munich), Planar Pixel Sensors meeting, Paris, 30 Sep. 2013

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Edge sparking issueAt Pixel 2010 T. Rohe reported discharges between sensor and read-out chip.• BCB: No Discharges observed up to

1000 V• Parylene: Tested up to 700 V, no sparks

[1]. (Later, other samples, 1000 V)• Silicon adhesive: No discharges

observed up to 1000 VY. Unno et al., “Development of novel n+-in-p Silicon Planar Pixel Sensors for HL-LHC”, http://dx.doi.org/10.1016/j.nima.2012.04.061

Radiation tolerance might require the application of high bias voltage. This might have the risk of edge sparking due to the proximity of the high voltage edge and the grounded edge of the ROC. Several solutions are envisaged to address this problem both in n-in-n and n-in-p readout geometries. N-in-n : backplane guard ringsN-in-p : Coating with paryleneEdge implant on the sensor to reduce the voltage.Other coatings: glue, silicone adesive, BCB. Different solutions to be implemented at the detector producer or as a post processing step. Optimal solution to be chosen also based on cost and yield.

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Geometry optimisation:adaptive pixel size

• Compatible with the FE-I4 floor-plan

• Better suited to particular z-regions of the barrel or forward disk/wedges regions

• R&D towards strixel solutions25x500 µm2

50x1000 µm2

100x125 µm2 125x167 µm2

25x1000 µm2

Various pixel sizes, punch through or polysilicon biased, AC and DC coupled, Liverpool

To study: inner pixel size, square pixels in forward direction (low R), strixel solutions ...

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S. Terzo et al., PPS meeting, Paris, 30-09-2013.

Inclined tracks. (High eta).

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As expected : • greater number of 2 hit clusters along Y in 500x25 (VTT10)

o Increased charge sharing• Minimal change in cluster size in x-direction

o (500x25 cluster size is slightly more skewed to 1 than 250x50(VTT5) )

Cluster Size X Cluster Size Y

Testbeam results comparing 50x250 mm2 and 25x500 mm2

H. Hayward, "Hiroshima" Symposium – HSTD-9, 2013

Residuals Y [μm]

Residual, efficiency and resolution – 250x50 vs 500x25

RMS values are approximately (when the resolution from telescope of the DEY testbeam is accounted for) what is expected for pitch/root(12):500x25 : 500/√12 = 144.3250x50 : 250/√12 = 72.17500x25 : 25/√12 = 7.217250x50 : 50/√12 = 14.43Width of distribution 500 for 500x25 and about 250 for 250x50

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Efficiency = 0.99673%Efficiency = 0.999369%

H. Hayward, "Hiroshima" Symposium – HSTD-9, 2013

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Geometry optimisation:slim or active edges

• Reduce need for overlap or inactive gaps (depending on system geometry and location)

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Slim or Active Edges: Introduction

Reducing the distance from the cut edge to the active area can be implemented by guard ring design and edge passivation or by active edges.

• Two approaches for active edges

DRIE (Deep Reactive Ion Etching) and side implantation

DRIE trenching, filling and doping by diffusion

• Two approaches (with several variants) to edge isolation

SCP: Scribe-Cleave-Passivate Technology

Backplane Guard-Rings (n-in-n only)

Active edge

Passivatededge

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Active edges with planar n-in-p sensors

CCE with 90Sr scans

n-in-p pixels at VTT: active edge process with back-side implantation extended to the edges

100μm thicknessVbreak~120VVdepl ~7-10 VCharge ~ 6±1 ke

A. Macchiolo, "Thin n-in-p pixel sensors and the SLID-ICV vertical integration technology for the ATLAS upgrade at HL-LHC", PIXEL2012

- MPP joint project

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Active edges with planar n-in-p sensors

FE-I3MPP - 50 μm edge sensorVbias=15 V

FE-I4MPP - 125 μm edge sensorVbias=15 V

• Edge pixels show the same charge collection properties as the central ones• Plan to study the hit reconstruction efficiency at the edges with test-beam before and after

irradiationA. Macchiolo, "Thin n-in-p pixel sensors and the SLID-ICV vertical integration technology for the ATLAS upgrade at HL-LHC", PIXEL2012

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Deep trench diffusion (electric field stabilisation)10 mm width220 mm depthPolysilicon filling

Active Edges

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Slim Edges: n-in-n Design Approach Project by TU Dortmund

• Guard Rings are shifted beneath the outermost pixels• Least possible inactive edge 200μm∼• Less homogeneous electric field, but charge collection dominated

by region directly beneath the pixel implant• Approach adopted in IBL

Bottom right: Test design with stepwise shifted pixels, this shows how collected charge is affected due to a less homogeneous electric field when pixels are shifted under the GR’s, bottom left: shows the effect on efficiency for same structure.

A. Rummler, Silicon n-in-n pixel detectors: Sensor productions for the ATLAS upgrades, first slim-edge measurements and experiences with detectors irradiated up to SLHC fluences, 6Th Trento Workshop on Advanced Radiation Detectors

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Slim Edges: SCP • Project by SCIPP (UCSC) and NRL Post-

Processing approach• SCP: Scribe-Cleave-Passivate• For n-in-p: ALD deposition of alumina

• Relies on:Low damaged sidewall due

to cleaving.

Controlled potential drop along sidewall due to fixed interface charge from passivation.

P. Weigell,   "Recent Results of the ATLAS Upgrade Planar Pixel Sensors R&D Project", PIXEL2012

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Y. Unno, 2013/10/01 PPS meeting at Paris

Dry Etch and Alumina Process

Similar process developedBy HPK

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Geometry optimisation:other design variations

• Punch-through or resistor (polysilicon) bias of the pixel matrix from a common rail. Mitigation of the inefficiency induced by the bias dot (or resistor).

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FE-I4 Module Hit Efficiencies

F=4x1015 neq cm-2 400 VGlobal eff.= 96.5%

F=4x1015 neq cm-2 500VGlobal eff.= 96.9%

Design of the FE-I4 pixel

Hit efficiency of the module projected in one single pixel cell, Eudet telescope, 120 GeV pions at CERN-SPS (one of many examples from the testbeam activity of PPS groups.

• Main loss of efficiency in the bias dot and in the bias rail problem is relevant only for perpendicular tracks.

A. Macchiolo, "Thin n-in-p pixel sensors and the SLID-ICV vertical integration technology for the ATLAS upgrade at HL-LHC", PIXEL2012

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Bias Grid Design

To overcome the efficiency loses in the punch through structure for perpendicular tracks, different designs are under investigation: “Bias rail” is a metal over insulator, no implant underneath

Dortmund (right)Bias rail routed differently 2 alternative designs

KEK (below)PolySilicon resistor (encircling pixel implant) 3 different designs

Liverpool (CERN Pixel V mask, mentioned before)PolySilicon resistor (above pixel implant)

IPRD13 - 7-10 Oct. 2013, Siena

The ATLAS Inner Tracker at the HL-LHC will require a whole new detector, with pixel sensors covering an area exceeding 8 m2. Planar pixels are the obvious solution for most of the layers. The PPS project is making exciting progresses in the various issues posed by this extremely demanding detector. LIKE:

• Radiation hardness• Diode geometry (n- or p-type substrates)• Study of different pixel geometries that could be part of the ATLAS ITK• Reduced edges• Quad detectors (not mentioned here, at the moment the likely choice for

modules)• Cost reduction

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Summary

IPRD13 - 7-10 Oct. 2013, Siena

The PPS groups use simulation, laboratory measurements and test beams to design and test the advanced solutions proposed. A huge effort is performed and here I only mentioned a few highlights of the common activity.

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Summary