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Page 1: Review
Page 2: Review

Sequential Circuits

All state changes (transitions from present state Qn to next state Qn+1) in memory elements are controlled by a system clock

Page 3: Review

Review of Flipflops

D flipflop

T flipflop

SR flipflop

JK flipflop

Page 4: Review

Circuit Analysis Example

Draw the equivalent state diagram of the following synchronous sequential circuit which has a 1-bit input S and 1-bit output Z

Page 5: Review

Step 1: Determine Flipflop Input and System Output Equations

All equations should be in terms of the system input and flipflop outputs only

D = S’Q + SQ’

Z = Q

Page 6: Review

Step 2: Create the State Transition Table

Input Current State Excitation Next State Output

S Qn D Qn+1 Z

0 0 0 0 0

0 1 1 1 1

1 0 1 1 0

1 1 0 0 1

• Write all possible combinations of system inputs and current state (flipflop outputs)

Page 7: Review

Step 2: Create the State Transition Table

Input Current State Excitation Next State Output

S Qn D Qn+1 Z

0 0 0 0 0

0 1 1 1 1

1 0 1 1 0

1 1 0 0 1

• Using the equation for the flipflop input, complete the excitation column

• D = S’Q + SQ’

Page 8: Review

Step 2: Create the State Transition Table

Input Current State Excitation Next State Output

S Qn D Qn+1 Z

0 0 0 0 0

0 1 1 1 1

1 0 1 1 0

1 1 0 0 1

• Knowing the flipflop behavior given the flipflop input, determine the next state (next ff output)

Page 9: Review

Step 2: Create the State Transition Table

Input Current State Excitation Next State Output

S Qn D Qn+1 Z

0 0 0 0 0

0 1 1 1 1

1 0 1 1 0

1 1 0 0 1

• Using the equation for the system output, complete the table.

• Z = Q

• Note: Q dependent

Page 10: Review

Step 3: Draw the State Diagram

Create circles (your current states)

Create arrows pointing to the next states for every input combination

Follow the convention on the arrow: input/output

Input Current State Excitation Next State Output

S Qn D Qn+1 Z

0 0 0 0 0

0 1 1 1 1

1 0 1 1 0

1 1 0 0 1

Page 11: Review

Step 3: Draw the State Diagram

0/0 0/1

1/0

1/1

1 0

Input Current State Excitation Next State Output

S Qn D Qn+1 Z

0 0 0 0 0

0 1 1 1 1

1 0 1 1 0

1 1 0 0 1

Page 12: Review

State Transition Diagrams

Usual convention: state-> bubbles, transitions->arrows

Input and output values are indicated beside the transition it is associated with

Page 13: Review

Mealy or Moore Machines

Mealy machines Output depends on the state and the input

Output values are indicated beside the transition (arrow)

There is a combinational path between the output and the input

Moore machines Output depends on the state alone

Output values can be indicated in the state (bubble)

No direct combinational path between the output and the input

Page 14: Review

Mealy or Moore Machine

0 0

1

0

0

0

1

1

1

A B 0/0

0/0

1/0

1/1

A/0 B/0

C/1

Page 15: Review

Recall: State Minimization

Two states are equivalent if it satisfies the following: Corresponding outputs for all input combinations are the same

Corresponding next states for all input combinations are equivalent

Three techniques were taught under EEE 21 Reduction by Inspection (Very tedious, result may still be reducible)

Reduction by Partitioning (Usually involves many steps, gets the job done)

Reduction by Implication (Can be done in one table, gets the job done)

Adel’s personal favorite!

Page 16: Review

Reduction by Inspection

Page 17: Review

Reduction by Inspection

Page 18: Review

Reduction by Inspection

Page 19: Review

Reduction by Inspection

Page 20: Review

Reduction by Implication

Page 21: Review

Reduction by Implication

X

X

X

X

X

X

X

X

X

X

X

X

X X

X

X

X X X X

BD CG

AD CF

CD AC

EH AD

EH AD

EG AH

BD CG

AD CF

CD AC

GH DH

AB FG

BC AG

GH DH

AC AF

/

/

Page 22: Review

Reduction by Implication

X

X

X

X

X

X

X

X

X

X

X

X

X X

X

X

X X X X

BD CG

AD CF

CD AC

EH AD

EH AD

EG AH

BD CG

AD CF

CD AC

GH DH

AB FG

BC AG

GH DH

AC AF

/

/

X

X X

X X

X

X X

X

/

/

/

/

/

Page 23: Review

Reduction by Implication

X

X

X

X

X

X

X

X

X

X

X

X

X X

X

X

X X X X

BD CG

AD CF

CD AC

EH AD

EH AD

EG AH

BD CG

AD CF

CD AC

GH DH

AB FG

BC AG

GH DH

AC AF

/

/

X

X X

X X

X

X X

X

/

/

/

/

/

A = D = G

B = C = F

E = H

I

Page 24: Review

Reduction by Implication

A = D = G

B = C = F

E = H

I

Page 25: Review

Comparison

Reduction by Inspection:

6 states

Reduction by Implication:

4 states

Page 26: Review

Reduction by Partitioning

Group states according to their output pattern (class).

Once grouped, check next states and determine what class the next states belong to.

If states belonging on the same class has the same next class patterns, they are equivalent states.

Else, create a new class for the state/s violating the previous rule (step 3).

Since a new class has been created, redo the process (starting at step 2).

Once step 3 is not violated anymore, stop.

Page 27: Review

Reduction by Partitioning

Page 28: Review

Reduction by Partitioning

Page 29: Review

Reduction by Partitioning

Page 30: Review

Reduction by Partitioning