RF Library based on Block Diagram and Behavioral descriptions

Benjamin Nicolle 1,2, Jean-José Mayol 2, William Tatinian 1, Jean Oudinot 2, Gilles Jacquemod 1

Behavioral Modeling and Simulation ConferenceSeptember 20-21, 2007 – 2.4 – 2:15 – 2:40 PM

1. Laboratoire d'Electronique Antennes et Télécommunications – UNSA CNRS UMR 6071 – 06560 Valbonne, France2. Mentor Graphics – ZIRST Montbonnot – 38334 Saint Ismier, France

Contact : benjamin.nicolle@unice.fr

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #2

Introduction– Classical simulation support– Proposed simulation support– ... and EDA Softwares ?– One solution with ADVance System Model Extractor (SME)

RF Library presentation– Noise Figure implementation– Phase Noise implementation– RF blocks modeling summary

Transceiver simulation results– Specifications extraction– Transceiver results– Focus on Transmitter

Conclusion

AgendaAgenda

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #3

Introduction– Classical simulation support– Proposed simulation support– ... and EDA Softwares ?– One solution with ADVance SME

RF Library presentation– Noise Figure implementation– Phase Noise implementation– RF blocks modeling summary

Transceiver simulation results– Specifications extraction– Transceiver results– Focus on Transmitter

Conclusion

AgendaAgenda

Mixing description languages to reducedevelopment time, increase model accuracy

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #4

Introduction– Classical simulation support– Proposed simulation support– ... and EDA Softwares ?– One solution with ADVance SME

RF Library presentation– Noise Figure implementation– Phase Noise implementation– RF blocks modeling summary

Transceiver simulation results– Specifications extraction– Transceiver results– Focus on Transmitter

Conclusion

AgendaAgenda

Mixing description languages to simulate a complete application, reduce system complexity

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #5

Introduction– Classical simulation support– Proposed simulation support– ... and EDA Softwares ?– One solution with ADVance SME

RF Library presentation– Noise Figure implementation– Phase Noise implementation– RF blocks modeling summary

Transceiver simulation results– Specifications extraction– Transceiver results– Focus on Transmitter

Conclusion

AgendaAgenda

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #6

IntroductionIntroduction

System Specifications

How canI do it ?

Environment Previous Project Time-to-Market

etc

Classical simulation support

Wireless application :

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #7

IntroductionIntroduction

System Specifications

How canI do it ?

Environment Previous Project Time-to-Market

etc

How canI divide it ?

SubsystemDSP

SubsystemRF

SubsystemBB

Classical simulation support

Wireless application :

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #8

IntroductionIntroduction

System Specifications

How canI do it ?

Environment Previous Project Time-to-Market

etc

How canI divide it ?

SubsystemDSP

SubsystemRF

SubsystemBB

Block 1 Block 2 Block 3 ... Block N

VHDLVerilog

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMSSimulink, ...

VHDL-AMS,Verilog-AMSSimulink, ...

How canI model it ?

Classical simulation support

Wireless application :

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #9

IntroductionIntroduction

System Specifications

How canI do it ?

Environment Previous Project Time-to-Market

etc

How canI divide it ?

SubsystemDSP

SubsystemRF

SubsystemBB

Block 1 Block 2 Block 3 ... Block N

VHDLVerilog

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMSSimulink, ...

VHDL-AMS,Verilog-AMSSimulink, ...

How canI model it ?

How can I send back it ?

SPICE implementation, Transistors Level

Classical simulation support

Wireless application :

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #10

IntroductionIntroduction Classical simulation support

System Specifications

Environment Previous Project Time-to-Market

etc

SubsystemDSP

SubsystemRF

SubsystemBB

Block 1 Block 2 Block 3 ... Block N

VHDLVerilog

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMSSimulink, ...

VHDL-AMS,Verilog-AMSSimulink, ...

SPICE implementation, Transistors Level

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #11

IntroductionIntroduction Classical simulation support

System Specifications

Environment Previous Project Time-to-Market

etc

SubsystemDSP

SubsystemRF

SubsystemBB

Block 1 Block 2 Block 3 ... Block N

VHDLVerilog

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMSSimulink, ...

VHDL-AMS,Verilog-AMSSimulink, ...

SPICE implementation, Transistors Level

System Level ModelsMatlab / Simulink or

VHDL-AMS / Verilog-AMS (??) or Excel, ADS...

VHDL,SystemC

Simulink orVHDL-AMS /

Verilog-AMS (??)

Simulink orVHDL-AMS /

Verilog-AMS (??)

VHDL,SystemC

Simulink orVHDL-AMS /

Verilog-AMS (??)

Simulink orVHDL-AMS /

Verilog-AMS (??)

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #12

IntroductionIntroduction Proposed simulation support

System Specifications

How canI do it ?

Environment Previous Project Time-to-Market

etc

How canI divide it ?

SubsystemDSP

SubsystemRF

SubsystemBB

Block 1 Block 2 Block 3 ... Block N

VHDLVerilog

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMSSimulink, ...

VHDL-AMS,Verilog-AMSSimulink, ...

How canI model it ?

How can I send back it ?

SPICE implementation, Transistors Level

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #13

IntroductionIntroduction Proposed simulation support

System Specifications

How canI do it ?

Environment Previous Project Time-to-Market

etc

How canI divide it ?

SubsystemDSP

SubsystemRF

SubsystemBB

Block 1 Block 2 Block 3 ... Block N

VHDLVerilog

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMSSimulink, ...

VHDL-AMS,Verilog-AMSSimulink, ...

How canI model it ?

How can I send back it ?

SPICE implementation, Transistors Level

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #14

IntroductionIntroduction ... and EDA Softwares ?

System Simulators

ADS, CoCentric, Matlab, Simulink,

SPW, Excel ...

Mixed-signalsimulators

ADVance MS, Smash,AMS Designer, Saber

...

CircuitSimulators

Eldo, Spectre, Spice, ADS ...

LayoutSimulators

Assura, Calibre, Hercules ...

How canI do it ?

How can I send back it ?

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #15

IntroductionIntroduction

System Simulators

ADS, CoCentric, Matlab, Simulink,

SPW, Excel ...

Mixed-signalsimulators

ADVance MS, Smash,AMS Designer, Saber

...

CircuitSimulators

Eldo RF, Spectre, Spice, ADS ...

LayoutSimulators

Assura, Calibre, Hercules ...

Now, we can impact system simulations !

... and EDA Softwares ?

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #16

IntroductionIntroduction One solution with ADSME

Sim

ulink

Mathworks Simulink& Matlab Softwares

Matl

ab

Rea

l T

ime

Work

shop

Library blocks

User-defined blocks

Matlab code

Other Languages

Different targets

Fixed-Step

C export

How can I send back it ?

Dig

ital Sim

ula

tor

Mentor GraphicsADVance MS Software

AM

S B

ehavio

ral

Tra

nsi

stor

Level

VHDL, SystemVerilog

Verilog, SystemC

VHDL-AMS

Verilog-AMS

Fast Spice

Spice

RF Simulation

How canI do it ?

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #17

IntroductionIntroduction One solution with ADSME

Sim

ulink

Mathworks Simulink& Matlab Softwares

Matl

ab

Rea

l T

ime W

ork

shop

Library blocks

User-defined blocks

Matlab code

Other Languages

ADMS Target

VHDL Implementation

ADVance SME

Dig

ital Sim

ula

tor

Mentor GraphicsADVance MS Software

AM

S B

ehavio

ral

Tra

nsi

stor

Lev

el

VHDL, SystemVerilog

Verilog, SystemC

VHDL-AMS

Verilog-AMS

Fast Spice

Spice

RF Simulation

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #18

IntroductionIntroduction One solution with ADSME

System Specifications

Environment Previous Project Time-to-Market

etc

SubsystemDSP

SubsystemRF

SubsystemBB

Block 1 Block 2 Block 3 ... Block N

VHDLVerilog

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMS

Simulink

VHDL-AMS,Verilog-AMSSimulink, ...

VHDL-AMS,Verilog-AMSSimulink, ...

SPICE implementation, Transistors Level Now, I can mixed description languages.

System Level ModelsMatlab / Simulink or

VHDL-AMS / Verilog-AMS (??) or Excel, ADS...

SPICE + Simulink + VHDL-AMSSPICE + Simulink + Verilog-AMS

SPICE + Simulink + VHDL + VerilogSimulink + VHDL-AMS + VHDL

Simulink + Verilog-AMS + Verilog + SystemCSimulink + VHDL-AMS + SPICE + SystemC

....

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #19

Introduction– Classical simulation support– Proposed simulation support– ... and EDA Softwares ?– One solution with ADVance SME

RF Library presentation– Noise Figure implementation– Phase Noise implementation– RF blocks modeling summary

Transceiver simulation results– Specifications extraction– Transceiver results– Focus on Transmitter

Conclusion

AgendaAgenda

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #20

RF Library PresentationRF Library Presentation Noise Figure Implementation

LNA (1) :

+

Noise Figure Generation

VHDL or Simulink

LNAin

InputImpedance

FrequencyResponse

NonlinearResponse

OutputImpedance

LNAout

VHDL-AMS or Simulink

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #21

RF Library PresentationRF Library Presentation Noise Figure Implementation

LNA (1) :

+

Noise Figure Generation

VHDL or Simulink

LNAin

InputImpedance

FrequencyResponse

NonlinearResponse

OutputImpedance

LNAout

VHDL-AMS or Simulink

Input Impedance

Frequency Response

Nonlinear Characteristic

Output Impedance

GV=G P .Z Input

Z Output

TF= 1.0

1 j 1

−2

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #22

RF Library PresentationRF Library Presentation Noise Figure Implementation

LNA (2) :

+

Noise Figure Generation

VHDL or Simulink

LNAin

InputImpedance

FrequencyResponse

NonlinearResponse

OutputImpedance

LNAout

VHDL-AMS or Simulink

Input Impedance

Frequency Response

Nonlinear Characteristic

Output Impedance

If ( Vin < Maximal Input)

Output Voltage = Gv1

* Vin – G

v3 * V

in 3)

Elsif ( Vin

positive)

Output Voltage = Maximal output VoltageElse

Output Voltage = - Maximal output Voltage

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #23

RF Library PresentationRF Library Presentation Noise Figure Implementation

LNA (3) :

+

Noise Figure Generation

VHDL or Simulink

LNAin

InputImpedance

FrequencyResponse

NonlinearResponse

OutputImpedance

LNAout

VHDL-AMS or Simulink

Input Impedance

Frequency Response

Nonlinear Characteristic

Output Impedance

v noise2 =4⋅k B⋅T 0⋅R Input⋅F−1

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #24

RF Library PresentationRF Library Presentation Noise Figure Implementation

LNA (4) :Voltage gain & NF extraction – SPICE Simulations

LNA Characterization (Power)

LNA Characterization (Noise)

Will be presented on IEEE ICECS 2007 - Morocco

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #25

RF Library PresentationRF Library Presentation Phase Noise Implementation

VCO (1) :

White Noise Generation

+

1/f3

1/f2

floor

Transfer Function

Simulink

Cosinegeneration

ModuloIntegrator

VCO GainQuiescent Frequency

VoltageControl

OutputFrequency

VHDL-AMS

Sub-bandcalibration

3

Floor NoiseNeighbor cut-off frequency

FN conversion cut-off frequency

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #26

RF Library PresentationRF Library Presentation Phase Noise Implementation

VCO (2) :

Frequency Variation Modeling

4,9742 GHz 3,5173 GHz

1,7586 GHz2,4871 GHz

1,2435 GHz 879,32 MHz

VCO Output

Divider by 2

Divider by 4

Inductor Command

Time (s)

VCO5 / 3,5 GHz

Divider by 4

Divider by 2

GSM/DCS/GPS

WIFI/BT/DCS/GPS

WLAN

Transient VCO Modeling

More details in SAME 2005 – B. Nicolle et al. “High Level Modelling of Σ∆ Fractional PLL for Noise Estimation”

VCO Architecture

- Multiple VCO gains- Multiple PN characteristics- Multiple behaviors

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #27

RF Library PresentationRF Library Presentation Phase Noise Implementation

VCO (3) :

- Output Amplitude Voltage (V)- Quiescent Frequency (Hz)- VCO Gain (Hz/V)- Initial Phase (rad)- Neighbor Noise Frequency (Hz) - Floor Noise Frequency (Hz)- Floor Noise Level (dBc/Hz)

More details in RFIC 2007 – B. Nicolle et al. “Top-Down PLL Design Methodology combining Block Diagram,

Behavioral and Transistor Level Simulators”

Osc

illat

ion

Freq

uenc

y (H

z)

Ideal

Simulink Model (included & user-defined)

Tune Voltage (V)

Nonlinear

Noisy VCO model in Simulink

1/f 3

1/f 2

Pha

se N

oise

(dB

c/H

z)Offset Frequency (Hz)

xx

x

x xx

x

floor

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #28

RF Library PresentationRF Library Presentation Library Summary

Low Noise Amplifier :

Power Amplifier :

Filter :

Channel :

Mixer :

Power Gain, 3rd order Intercept Point,Input – Output impedance matching,

Frequency, Noise figure

Power Gain, 3rd order Intercept Point,Input – Output impedance matching,

Frequency, Noise figure

Power Gain, 3rd order Intercept Point,Input – Output impedance matching,

Frequency, Noise figure and Phase Noise

Laplace modeling (or Z transform)Input – Output impedance matching,

Noise figure

Input – Output impedance matching,Noise figure, Phase Noise,

Distance, Frequency, IQ imbalance

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #29

RF Library PresentationRF Library Presentation Library Summary

Low Noise Amplifier :

Power Amplifier :

Filter :

Channel :

Mixer :

Power Gain, 3rd order Intercept Point,Input – Output impedance matching,

Frequency, Noise figure

Power Gain, 3rd order Intercept Point,Input – Output impedance matching,

Frequency, Noise figure

Power Gain, 3rd order Intercept Point,Input – Output impedance matching,

Frequency, Noise figure and Phase Noise

Laplace modeling (or Z transform)Input – Output impedance matching,

Noise figure

Input – Output impedance matching,Noise figure, Phase Noise,

Distance, Frequency, IQ imbalance Next steps ?

2nd order Intercept Point

2nd order Intercept Point

2nd order Intercept Point, losses between ports

Any idea ??

(work in progress)Radiation pattern

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #30

Introduction– Classical simulation support– Proposed simulation support– ... and EDA Softwares ?– One solution with ADVance SME

RF Library presentation– Noise Figure implementation– Phase Noise implementation– RF blocks modeling summary

Transceiver simulation results– Specifications extraction– Transceiver results– Focus on Transmitter

Conclusion

AgendaAgenda

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #31

Transceiver simulation resultsTransceiver simulation results Specifications extraction

Bluetooth Transceiver (1) ?

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #32

Bluetooth Transceiver (2) ?

Transceiver simulation resultsTransceiver simulation results Specifications extraction

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #33

Requirements & objectives

Bluetooth Baseband Transceiver modeling => Modulation & BER

Objectives :

Specifications extractionTransceiver simulation resultsTransceiver simulation results

Bluetooth RF Transceiver modeling => Block specifications extraction

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #34

Requirements & objectives

Bluetooth Baseband Transceiver modeling => Modulation & BER

Objectives :

✔ 2.4 GHz ISM Band – Receiver Sensitivity : -73 dBm - Power : 1mW to 100 mW✔ Quadrature waveforms I/Q – Data Rate : 1 Mbps (1,2,3 bits symbol)✔ Transmitter & Receiver with dual-conversion technique (2,4 / 1,6 / 0,8 GHz) ✔ Need of a RF library with key generic and critical parameters :

✔ LNA : Gain, IP3 & Noise Figure, Impedance Mismatches✔ PA : Gain, IP3 & Impedance Mismatches✔ Mixers : Gain, IP3 & Noise Figure, Phase Noise & Impedance Mismatches✔ Channel : Distance, Frequency & Attenuation, Phase Noise, White Noise Adjunction

✔ Bit Error Rate = 0.1% ✔ Gaussian Frequency Shift Keying (GFSK) + Frequency Hopping (from -39 to 39 MHz)

✔ Adjust the RF Block Specifications to match BER✔ BT Transceiver Model with hierarchical level (Simulink / ADMS / SPICE) and mixes it ! ✔ Bonus : Combines it with SystemC (protocol / baseband)

Specifications extraction

Bluetooth RF Transceiver modeling => Block specifications extraction

Transceiver simulation resultsTransceiver simulation results

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #35

Transceiver resultsTransceiver simulation resultsTransceiver simulation results

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #36

Transceiver results

Required Specifications for each blocks along the BT signal in the transceiver

Transceiver simulations results (work in progress)

Simulation time decreases by 5 ~ 6 x ratioAllows mixed SPICE / Behavior / Simulink description levels (and SysC...) → (next point)

Transceiver simulation resultsTransceiver simulation results

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #37

Focus on TransmitterTransceiver simulation resultsTransceiver simulation results

SimulinkVHDL-AMSVerilog-AMSSPICE

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #38

Transceiver simulation resultsTransceiver simulation results Focus on Transmitter

Bluetooth Emitter – Simulations comparison – 75 µs simulation time

Conclusion (Simulink simulation basing) Simulink exported on ADMS → 6x faster Simulink exported on ADMS + SystemC → 7x faster Simulink exported plus behavioral languages and/or SystemC → 2x faster Simulink exported plus SPICE and/or SystemC → 1.4x slower but SPICE visibility (RF instructions)

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #39

Introduction– Classical simulation support– Proposed simulation support– ... and EDA Softwares ?– One solution with ADVance SME

RF Library presentation– Noise Figure implementation– Phase Noise implementation– RF blocks modeling summary

Transceiver simulation results– Specifications extraction– Transceiver results– Focus on Transmitter

Conclusion

AgendaAgenda

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #40

ConclusionConclusion

Conclusion on Transceiver Work : Simulink or SystemC exported on ADMS → 6 to 7x faster (Simulink to ADMS) Mixed Simulink/SystemC and SPICE on ADMS → 2x slower (ADMS) SPICE circuit simulation with MODSST algorithms → 34x faster than transient (Eldo RF)

Next steps : - Combines RF instructions for SPICE and abstraction (SystemC and Simulink) acceleration to reduce simulation time !

- Validate this methodology with a ZigBee Transceiver Circuit

Combine description languages : To reduce system complexity, To increase model accuracy, To reduce some EDA software limitations (as Phase Noise for ADMS), To develop model faster !

Need a generic RF Library : To reduce simulation time, To allow model re-use with generic / critical parameters, To mix EDA softwares, mix system and circuit designers (utopia ?)

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #41

Thank you for your attention.Any questions ?

ConclusionConclusion

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #42

Transceiver resultsTransceiver simulation resultsTransceiver simulation results

IEEE BMAS 2007 – Paper 2.4 - RF Library based on Block Diagram and Behavioral descriptions - Slide #43

Transceiver simulation resultsTransceiver simulation results

RandomBit

Generator

ReImg

freq

0,8G

+

I way

Q way Bandpass filter

PowerAmplifier

Antenna

RF Emitter

LO_2_I

LO_2_Q

LO_1 freq

ReImg

2,4G

GFSKModulator

Baseband Emitter

Frequency Hopping

Cyclic Encoder+ Buffer

10 samples @ 15 µs

ReImg

freq

0,8G

ReImg

freq

0,8GDSP Part

1 sample@ 625 µs

IndexGeneration

625 samples@ 1.0 µs

62500 samples @ 1.0 µs

Simulink descriptionSystemC description

Simulink description

Simulink description Simulink descriptionVHDL-AMS behavior

Verilog-AMS behaviorSPICE circuit

Focus on Transmitter

Different descriptions but focused on key blocks : DSP Part as Simulink or SystemC Baseband Part as Simulink RF Transmitter : Simulink + VHDL-AMS Power Amplifier : Simulink / Verilog-AMS / VHDL-AMS / SPICE circuit

Verilog-AMS behavior