rr220203 linear and digital ic applications

Code No: RR220203 Set No. 1

II B.Tech II Semester Supplementary Examinations, Aug/Sep 2006LINEAR AND DIGITAL IC APPLICATIONS

( Common to Electrical & Electronic Engineering, Electronics & ComputerEngineering and Instrumentation & Control Engineering)

Time: 3 hours Max Marks: 80Answer any FIVE Questions

All Questions carry equal marks

1. (a) Draw the pin diagram and schematic symbol of a typical OP-AMP IC741 andexplain the function of each pin.

(b) Discuss the three basic types of linear IC packages and briefly explain thecharacteristics of each.

(c) State the two types of integrated circuits classified according to their mode ofoperation and briefly explain the significance of each. [6+6+4]

2. (a) List and explain the two special cases of inverting amplifiers. [6]

(b) What is a voltage follower? What are its features and applications? [4+6]

3. (a) Draw the diagram of a monolithic Sample-and hold circuit and explain itsoperation. [2+5]

(b) Explain the terms Aperture time, Aperture uncertainty and Hold-mode set-tling time with respect to the above circuit. [3x3]

4. (a) Explain the operation of Astable multivibrator using 555 timer.

(b) Design a square waveform generator of frequency 1kHz and duty cycle of 75%using 555 timer. [8+8]

5. (a) Give the block diagram of PLL and explain about each block in detail. [8]

(b) Define the following terms with reference to PLL

i. Lock range

ii. Capture range

iii. Pull-in-time.

[3+3+2]

6. (a) Explain the term Frequency Sealing with suitable example.

(b) Design a wide band-pass filter with fL=200Hz. FH=1KHz and a pass-bandgain=4. Draw the frequency response and calculate Q factor for the filter.

[6+10]

7. For the given circuit shown below (figure 1):

(a) Explain the operations of the circuit with the help of Truth-Table.

(b) If hFE of Q1 is 30, find hFEmin of Q2

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Figure 1:

(c) If hFE of Q2 is 30, what is Fan-Out?

(d) Find Noise-Margin. [4x4]

8. (a) Draw the circuit of a Weighted Resistor DAC and obtain expression for n-bits.

(b) Sketch the Analog output voltage for the given digital input code.

(c) What are the major disadvantages in this type? [6+5+5]

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1. (a) Define the terms : SVRR,CMRR, input bias current, input offset voltage,GainBandwidth product

(b) What are the differences between the inverting and non inverting terminals?What do you mean by the term virtual ground? [10+6]

2. (a) Explain the operation of a scale changer with circuit diagram. [2+4]

(b) Describe the principle of operation of a peak detector with wave forms. [10]

3. (a) Discuss the functioning of a practical differentiator and derive the necessaryexpressions.

(b) Design an Op-Amp differentiator that will differentiate an input signal withfmax = 100 Hz. [8+8]

4. (a) Explain the significance of each of comparators and operation of 555 timer.[3+5]

(b) Explain the application of 555 timer as Linear ramp generator. [8]

5. (a) Explain in detail the following terms with reference to PLL

i. Lock range

ii. Capture range

iii. Capture transient

iv. Pull-in-time. [4+4]

(b) i. Draw the internal functional diagram of NE 566 VCO and derive expres-sion for free running frequency.

ii. From the given component values find the free running frequency Controlvoltage VC = 10.9V , VCC = 12V , R1=4.7k and C1=1.1nF .

[4+4]

6. (a) Explain the term VSVS configuration. Design a VCVS low-pass Butter-worth second order filter with a cutoff frequency of 4 kHz. Assume necessarydata in the design process.

(b) Design a second order IGMF band-pass filter with the following specifications: fo=500 Hz; Gain at resonance=-5 and band-width=50Hz. Use the circuitshown below (figure 1). Assume necessary data

[8+8]

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Figure 1:

7. (a) What is meant by Tri-state logic ? Draw the circuit of Tri-state TTL logicand explain its functions.

(b) Draw the circuit of ECL logic OR/NOR gate and explain its functions. [8+8]

8. (a) Give the working principle of Analog-Multiplexer. Give block diagram of a 16input analog multiplexer using CMOS gates and explain how it works.

(b) Draw the circuit diagram of sample and hold circuit and explain its working.[8+8]

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1. (a) Discuss the electrical characteristics of an OP-AMP in detail.

(b) Draw an ideal voltage transfer curve of an OP-AMP.

(c) What are the features of IC 741? [10+2+6]

2. (a) Give circuit of a scale changer and inverting summer using Op-Amp and ex-plain their operation.

(b) The circuit of a inverting summing amplifier is designed with R1 = R = 1K,

and R2 = 2R1, R3 = 2R2, .. Rn = 2Rn1 . the input voltages v1, v2, . vn canbe 0 or 10V.

i. Determine the minimum output voltage, assuming at least one input isnon-zero. The maximum allowable resistance is 55K.

[8+8]

3. (a) Briefly describe three uses of an analog multiplier. [8]

(b) What do you mean by sampling? Explain the basic circuit for sample andhold circuit. [2+6]

4. Design and explain a 555 Astable multivibrator to operate at 10 KHz with 40%duty cycle. [12+4]

5. (a) What is the working principle of PLL. Give the block diagram of 565 PLLwith its pin configuration (DIP) and explain about each block.

(b) Define the following terms :

i. Lock- in-range

ii. Capture range

iii. Pull-in-time.

(c) Give any one applications of PLL and explain it in detail. [5+5+6]

6. (a) Explain the term VSVS configuration. Design a VCVS low-pass Butter-worth second order filter with a cutoff frequency of 4 kHz. Assume necessarydata in the design process.

(b) Design a second order IGMF band-pass filter with the following specifications: f

o=500 Hz; Gain at resonance=-5 and band-width=50Hz. Use the circuit

shown below (figure 1). Assume necessary data

[8+8]

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Figure 1:

7. (a) When do we prefer H.T.L. (High-Threshold Logic) gate? And explain why ?

(b) Draw the Integrated circuit of H.T.L. 3-input NAND gate, and explain itsoperation with the help of Truth Table.

(c) Find out the average power dissipation of the gate. [6+5+5]

8. (a) Compare different A/D converters for their merits and demerits.

(b) Give the schematic circuit diagram of a successive approximation type A/Dconverter and explain the operations of this system. [8+8]

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1. (a) What are the three differential amplifier configurations? Compare and con-trast these configurations. [3+6]

(b) what is a level translator circuit? Why is it used with the cascaded differentialamplifier used in OP-AMPS? [1+2]

(c) Explain the term Slew Rate and how it affects the frequency response of anan OP-AMP? [2+2]

2. (a) With a circuit diagram and waveform explain the operation of an invertingand non-inverting comparators? [2x6]

(b) What is the limitation of Op-Amp as comparators? [4]

3. (a) Sketch the circuit of a logarithmic amplifier using one op-amp and explain itsoperation. State its application. [2+4+2]

(b) What is a sample and hold circuit? Why is it needed? Draw a sample andhold circuit and explain its operation. [2x4]

4. Explain the use of 555 timer as free running ramp generator and draw the outputwaveforms. [16]

5. (a) Give the block diagram of NE 565 PLL and explain the role of each block.Make circuit connections to track the incoming signal and explain its opera-tions.

(b) With neat sketches, explain the following terms:

i. Lock-in-range

ii. Capture range

iii. Pull-in time.

(c) Sketch the capture transient and explain why it is generated before locking?[6+5+5]

6. (a) What are the advantages of active filters over passive ones?

(b) Design a second order low pass Butterworth filter for a cut off frequency of2kHz. Assume necessary data.

(c) What is an all pass filter? Draw the circuit of the filters. [5+6+5]

7. (a) Realize the given expression y = AB + CD using N-Mos logic and verify it.What is the name of the given function and what is its advantage?

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(b) Compare the relative merits of NMOS, CMOS, TTL and ECL logic families.[8+8]

8. (a) List out and compare different types of A/D converters.

(b) Give the schematic circuit diagram of the fastest A/D converter and explainits operation. [8+8]

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rr220203 linear and digital ic applications

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