rt8293a 340khz synchronous step-down converter
DESCRIPTION
Step-Down ConverterTRANSCRIPT
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RT8293A
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Ordering Information
Note :
Richtek products are :
` RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Applicationsz Wireless AP/Routerz Set-Top-Boxz Industrial and Commercial Low Power Systemsz LCD Monitors and TVsz Green Electronics/Appliancesz Point of Load Regulation of High-Performance DSPs
3A, 23V, 340kHz Synchronous Step-Down Converter
General DescriptionThe RT8293A is a high efficiency, monolithic synchronousstep-down DC/DC converter that can deliver up to 3Aoutput current from a 4.5V to 23V input supply. TheRT8293A's current mode architecture and externalcompensation allow the transient response to beoptimized over a wide range of loads and output capacitors.Cycle-by-cycle current limit provides protection againstshorted outputs and soft-start eliminates input currentsurge during start-up. The RT8293A also provides outputunder voltage protection and thermal shutdown protection.The low current (
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RT8293A
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Functional Pin Description Pin No. Pin Name Pin Function
1 BOOT Bootstrap for high side gate driver. Connect a 0.1mF or greater ceramic capacitor from BOOT to SW pins.
2 VIN Input Supply Voltage, 4.5V to 23V. Must bypass with a suitably large ceramic capacitor. 3 SW Phase Node. Connect to external L-C filter. 4,
9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation.
5 FB
Feedback Input pin. This pin is connected to the converter output. It is used to set the output of the converter to regulate to the desired value via an internal resistive voltage divider. For an adjustable output, an external resistive voltage divider is connected to this pin.
6 COMP Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required.
7 EN Enable Input Pin. A logic high enables the converter; a logic low forces the RT8293A into shutdown mode reducing the supply current to less than 3mA. Attach this pin to VIN with a 100kW pull up resistor for automatic startup.
8 SS Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. A 0.1mF capacitor sets the soft-start period to 13.5ms.
VOUT (V) R1 (kW) R2 (kW) RC (kW) CC (nF) L (mH) COUT (mF) 8 27 3 33 3.3 22 22 x 2 5 62 11.8 20 3.3 15 22 x 2
3.3 75 24 13 3.3 10 22 x 2 2.5 25.5 12 9.1 3.3 6.8 22 x 2 1.5 10.5 12 5.6 3.3 3.6 22 x 2 1.2 12 24 4.3 3.3 3.6 22 x 2 1 3 12 3.6 3.3 2 22 x 2
Table 1. Recommended Component Selection
Typical Application Circuit
VIN
EN
GND
BOOT
SW
7
2
3
1L
10H100nF
22F x 2
R175k
R224k
VOUT3.3V/3A
10F x 2
VIN4.5V to 23V
RT8293A
SS8
CSS4, 9 (Exposed Pad)
CBOOTCIN
0.1F
COUT
REN 100k
COMP
CC3.3nF
RC13k
CPOpen
6
FB 5
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RT8293A
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Function Block Diagram
VA+-
+-
+-UV
Comparator
Oscillator
Foldback Control
0.4V
Internal Regulator
+-
2.7V
Shutdown Comparator
Current Sense Amplifier
BOOT
VIN
GND
SW
FB
EN
COMP
3V
5k
VA VCC
6A
Slope Comp
Current Comparator
+-
EA0.8V
S
R
Q
Q
SS
+-
1.2V
Lockout Comparator
VCC
+
85mW
85mW
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RT8293A
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Electrical Characteristics(VIN = 12V, TA = 25C, unless otherwise specified)
Absolute Maximum Ratings (Note 1)l Supply Voltage, VIN ---------------------------------------------------------------------------------------- -0.3V to 25Vl Input Voltage, SW ------------------------------------------------------------------------------------------ -0.3V to (VIN + 0.3V)l VBOOT - VSW ------------------------------------------------------------------------------------------------- -0.3V to 6Vl Other Pins Voltage ------------------------------------------------------------------------------------------ -0.3V to 6Vl Power Dissipation, PD @ TA = 25C
SOP-8 (Exposed Pad) ------------------------------------------------------------------------------------- 1.333Wl Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), qJA -------------------------------------------------------------------------------- 75C/WSOP-8 (Exposed Pad), qJC ------------------------------------------------------------------------------- 15C/W
l Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------- 260Cl Junction Temperature -------------------------------------------------------------------------------------- 150Cl Storage Temperature Range ------------------------------------------------------------------------------ -65C to 150Cl ESD Susceptibility (Note 3)
HBM (Human Body Mode) -------------------------------------------------------------------------------- 2kVMM (Machine Mode) --------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)l Supply Voltage, VIN ---------------------------------------------------------------------------------------- 4.5V to 23Vl Junction Temperature Range ----------------------------------------------------------------------------- -40C to 125Cl Ambient Temperature Range ----------------------------------------------------------------------------- -40C to 85C
Parameter Symbol Test Conditions Min Typ Max Unit
Shutdown Supply Current VEN = 0V -- 0.5 3 mA
Supply Current VEN = 3 V, VFB = 0.9V -- 0.8 1.2 mA
Feedback Voltage VFB 4.5V VIN 23V 0.788 0.8 0.812 V Error Amplifier Transconductance GEA DIC = 10mA -- 940 -- mA/V
High Side Switch On-Resistance RDS(ON)1 -- 85 -- mW
Low Side Switch On-Resistance RDS(ON)2 -- 85 -- mW
High Side Switch Leakage Current VEN = 0V, VSW = 0V -- 0 10 mA
Upper Switch Current Limit Min. Duty Cycle, VBOOT- VSW = 4.8V -- 5.1 -- A
Lower Switch Current Limit From Drain to Source -- 1.5 -- A COMP to Current Sense Transconductance GCS -- 5.4 -- A/V
Oscillation Frequency fOSC1 300 340 380 kHz Short Circuit Oscillation Frequency fOSC2 VFB = 0V -- 100 -- kHz
Maximum Duty Cycle DMAX VFB = 0.7V -- 93 -- % Minimum On Time tON -- 100 -- ns
To be continued
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Parameter Symbol Test Conditions Min Typ Max Unit
Logic-High VIH 2.7 -- 5.5 EN Input Threshold Voltage Logic-Low VIL -- -- 0.4
V
Input Under Voltage Lockout Threshold VUVLO VIN Rising 3.8 4.2 4.5 V
Input Under Voltage Lockout Threshold Hysteresis DVUVLO -- 320 -- mV
Soft-Start Current ISS VSS = 0V -- 6 -- mA
Soft-Start Period tSS CSS = 0.1mF -- 13.5 -- ms
Thermal Shutdown TSD -- 150 -- C
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are forstress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. qJA is measured in natural convection at TA = 25C on a high effective thermal conductivity four-layer test board ofJEDEC 51-7 thermal measurement standard. The measurement case position of qJC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.Note 4. The device is not guaranteed to function outside its operating conditions.
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Reference Voltage vs. Temperature
0.780
0.785
0.790
0.795
0.800
0.805
0.810
0.815
0.820
-50 -25 0 25 50 75 100 125Temperature (C)
Ref
eren
ce V
olta
ge (V
)
Output Voltage vs. Output Current
3.243.253.263.273.283.293.303.313.323.333.343.353.36
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
Output Current (A)
Out
put V
olta
ge (V
)
Typical Operating Characteristics
Frequency vs. Temperature
300
310
320
330
340
350
360
370
380
-50 -25 0 25 50 75 100 125Temperature (C)
Fre
quen
cy (k
Hz)
1
VIN = 12V, VOUT = 3.3V, IOUT = 0A
Frequency vs. Input Voltage
300
310
320
330
340
350
360
370
380
4 6 8 10 12 14 16 18 20 22 24Input Voltage (V)
Fre
quen
cy (k
Hz)
1
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0 0.5 1 1.5 2 2.5 3Output Current (A)
Effi
cien
cy (%
)
VOUT = 3.3V
VIN = 4.5VVIN = 12VVIN = 23V
Reference Voltage vs. Input Voltage
0.780
0.785
0.790
0.795
0.800
0.805
0.810
0.815
0.820
4 6 8 10 12 14 16 18 20 22 24
Input Voltage (V)
Ref
eren
ce V
olta
ge (V
)
VOUT = 3.3V, IOUT = 0A
VOUT = 3.3V
VIN = 4.5VVIN = 12VVIN = 23V
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RT8293A
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Current Limit vs. Temperature
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
-50 -25 0 25 50 75 100 125
Temperature (C)
Cur
rent
Lim
it (A
)
Switching
Time (1s/Div)
VOUT(10mV/Div)
IL(2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A
VSW(10V/Div)
Load Transient Response
Time (100s/Div)
VOUT(200mV/Div)
IOUT(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 3A to 1.5A
Load Transient Response
Time (100s/Div)
VOUT(200mV/Div)
IOUT(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 0A to 3A
Power On from VIN
Time (10ms/Div)
VOUT(2V/Div)
IL(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VIN(5V/Div)
Power Off from VIN
Time (10ms/Div)
VOUT(2V/Div)
IL(2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A
VIN(5V/Div)
VIN = 12V, VOUT = 3.3V
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RT8293A
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Power On from EN
Time (5ms/Div)
VOUT(2V/Div)
IL(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VEN(5V/Div)
Power Off from EN
Time (5ms/Div)
VOUT(2V/Div)
IL(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VEN(5V/Div)
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Application InformationThe RT8293A is a synchronous high voltage buck converterthat can support the input voltage range from 4.5V to 23Vand the output current can be up to 3A.
Output Voltage SettingThe resistive divider allows the FB pin to sense the outputvoltage as shown in Figure 1.
Figure 1. Output Voltage Setting
The output voltage is set by an external resistive voltagedivider according to the following equation :
+
OUT FBR1V = V 1R2
where VFB is the feedback reference voltage (0.8V typ.).
External Bootstrap DiodeConnect a 100nF low ESR ceramic capacitor betweenthe BOOT pin and SW pin. This capacitor provides thegate driver voltage for the high side MOSFET.
It is recommended to add an external bootstrap diodebetween an external 5V and BOOT pin for efficiencyimprovement when input voltage is lower than 5.5V or dutyratio is higher than 65% .The bootstrap diode can be alow cost one such as IN4148 or BAT54. The external 5Vcan be a 5V fixed input from system or a 5V output of theRT8293A. Note that the external boot voltage must belower than 5.5V.
Figure 2. External Bootstrap Diode
Soft-StartThe RT8293A contains an external soft-start clamp thatgradually raises the output voltage. The soft-start timingcan be programmed by the external capacitor betweenSS pin and GND. The chip provides a 6mA charge currentfor the external capacitor. If 0.1mF capacitor is used toset the soft-start, the period will be 13.5ms(typ.).
Chip Enable OperationThe EN pin is the chip enable input. Pulling the EN pinlow (2.7V, < 5.5V) will turn onthe device again. For external timing control (e.g.RC),the EN pin can also be externally pulled high by adding aREN* resistor and CEN* capacitor from the VIN pin (seeFigure 5).
An external MOSFET can be added to implement digitalcontrol on the EN pin when no system voltage above 2.5Vis available, as shown in Figure 3. In this case, a 100kWpull-up resistor, REN, is connected between VIN and theEN pin. MOSFET Q1 will be under logic control to pulldown the EN pin.
Figure 3. Enable Control Circuit for Logic Control withLow Voltage
To prevent enabling circuit when VIN is smaller than theVOUT target value, a resistive voltage divider can be placedbetween the input voltage and ground and connected tothe EN pin to adjust IC lockout threshold, as shown inFigure 4. For example, if an 8V output voltage is regulatedfrom a 12V input voltage, the resistor, REN2, can beselected to set input lockout threshold larger than 8V.
RT8293A
GND
FB
R1
R2
VOUT
SW
BOOT
5V
RT8293A 100nF
VIN
EN
GND
BOOT
FB
SW7
5
2
3
1
L
R1
R2
VOUT
Chip Enable
VINRT8293A
SS8CSS
COMPCC RC
CP
64,9 (Exposed Pad)
CBOOT
COUT
CINREN
Q1
100k
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RT8293A
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OUT INRMS OUT(MAX)IN OUT
V VI = I 1V V
-
This formula has a maximum at VIN = 2VOUT, whereIRMS = IOUT / 2. This simple worst-case condition iscommonly used for design because even significantdeviations do not offer much relief.
Choose a capacitor rated at a higher temperature thanrequired. Several capacitors may also be paralleled tomeet size or height requirements in the design.
For the input capacitor,two 10mF low ESR ceramiccapacitors are recommended. For the recommendedcapacitor, please refer to table 3 for more detail.
The selection of COUT is determined by the required ESRto minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a keyfor COUT selection to ensure that the control loop is stable.Loop stability can be checked by viewing the load transientresponse as described in a later section.
CIN and COUT SelectionThe input capacitance, CIN, is needed to filter thetrapezoidal current at the source of the high side MOSFET.To prevent large ripple current, a low ESR input capacitorsized for the maximum RMS current should be used. TheRMS current is given by :
Table 2. Suggested Inductors for TypicalApplication Circuit
Component Supplier Series
Dimensions (mm)
TDK VLF10045 10 x 9.7 x 4.5 TDK SLF12565 12.5 x 12.5 x 6.5
TAIYO YUDEN NR8040 8 x 8 x 4
Having a lower ripple current reduces not only the ESRlosses in the output capacitors but also the output voltageripple. High frequency with small ripple current can achievehighest efficiency operation. However, it requires a largeinductor to achieve this goal.
For the ripple current selection, the value of DIL = 0.24(IMAX)will be a reasonable starting point. The largest ripplecurrent occurs at the highest VIN. To guarantee that the
OUT OUTL(MAX) IN(MAX)
V VL = 1f I V
- D
The inductor's current rating (caused a 40C temperaturerising from 25C ambient) should be greater than themaximum load current and its saturation current shouldbe greater than the short circuit peak current limit. Pleasesee Table 2 for the inductor selection reference.
OUT OUTL
INV VI = 1f L V
D -
Under Voltage Protection
Hiccup ModeFor the RT8293AH, Hiccup Mode Under Voltage Protection(UVP) is provided. When the FB voltage drops below halfof the feedback reference voltage, VFB, the UVP functionwill be triggered and the RT8293AH will shut down for aperiod of time and then recover automatically. The HiccupMode UVP can reduce input current in short-circuitconditions.
Latch-Off ModeFor the RT8293AL, Latch-Off Mode Under VoltageProtection (UVP) is provided. When the FB voltage dropsbelow half of the feedback reference voltage, VFB, UVPwill be triggered and the RT8293AL will shutdown in Latch-Off Mode. In shutdown condition, the RT8293AL can bereset via the EN pin or power input VIN.
Inductor SelectionThe inductor value and operating frequency determine theripple current according to a specific input and outputvoltage. The ripple current DIL increases with higher VINand decreases with higher inductance.
Figure 4. The Resistors can be Selected to Set ICLockout Threshold
ripple current stays below the specified maximum, theinductor value should be chosen according to the followingequation :
VIN
EN
GND
BOOT
FB
SW7
5
2
3
1
L
R1
R2
VOUTVIN
RT8293A
SS8CSS
COMPCC RC
CP
64,9 (Exposed Pad)
CBOOT
COUT
CIN
100k8V
12V
REN2
REN1 10F
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OUT LOUT1V I ESR
8fC D D +
The output ripple will be highest at the maximum input
voltage since DIL increases with input voltage. Multiplecapacitors placed in parallel may be needed to meet theESR and RMS current handling requirement. Dry tantalum,special polymer, aluminum electrolytic and ceramiccapacitors are all available in surface mount packages.Special polymer capacitors offer very low ESR value.However, it provides lower capacitance density than othertypes. Although Tantalum capacitors have the highestcapacitance density, it is important to only use types thatpass the surge test for use in switching power supplies.Aluminum electrolytic capacitors have significantly higherESR. However, it can be used in cost-sensitive applicationsfor ripple current rating and long term reliabil ityconsiderations. Ceramic capacitors have excellent lowESR characteristics but can have a high voltage coefficientand audible piezoelectric effects. The high Q of ceramiccapacitors with trace inductance can also lead to significantringing.
Higher values, lower cost ceramic capacitors are nowbecoming available in smaller case sizes. Their high ripplecurrent, high voltage rating and low ESR make them idealfor switching regulator applications. However, care mustbe taken when these capacitors are used at input andoutput. When a ceramic capacitor is used at the inputand the power is supplied by a wall adapter through longwires, a load step at the output can induce ringing at theinput, VIN. At best, this ringing can couple to the outputand be mistaken as loop instability. At worst, a sudden
The output ripple, DVOUT , is determined by : inrush of current through the long wires can potentiallycause a voltage spike at VIN large enough to damage thepart.
Checking Transient ResponseThe regulator loop response can be checked by lookingat the load transient response. Switching regulators takeseveral cycles to respond to a step in load current. Whena load step occurs, VOUT immediately shifts by an amountequal to DILOAD (ESR) and COUT also begins to be chargedor discharged to generate a feedback error signal for theregulator to return VOUT to its steady-state value. Duringthis recovery time, VOUT can be monitored for overshoot orringing that would indicate a stability problem.
EMI ConsiderationSince parasitic inductance and capacitance effects in PCBcircuitry would cause a spike voltage on SW pin whenhigh side MOSFET is turned-on/off, this spike voltage onSW may impact on EMI performance in the system. Inorder to enhance EMI performance, there are two methodsto suppress the spike voltage. One way is to by placingan R-C snubber between SW and GND and locating themas close as possible to the SW pin (see Figure 5). Anothermethod is by adding a resistor in series with the bootstrapcapacitor, CBOOT, but this method will decrease the drivingcapability to the high side MOSFET. It is stronglyrecommended to reserve the R-C snubber during PCBlayout for EMI improvement. Moreover, reducing the SWtrace area and keeping the main power in a small loop willbe helpful on EMI performance. For detailed PCB layoutguide, please refer to the section Layout Considerations.
Figure 5. Reference Circuit with Snubber and Enable Timing Control
VIN
EN
GND
BOOT
FB
SW7
5
2
3
1
L10H100nF
22Fx2R175k
R224k
VOUT3.3V/3A
10F x 2
Chip Enable
VIN4.5V to 23V
RT8293A
SS8CSS0.1F
COMP
CC3.3nF RC13k
CPNC
6
4, 9 (Exposed Pad)
CBOOT
COUT
CIN
RBOOT*
RS*
CS*
REN*
CEN*
* : Optional
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RT8293A
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(a) Copper Area = (2.3 x 2.3) mm2, qJA = 75C/W
(b) Copper Area = 10mm2, qJA = 64C/W
(c) Copper Area = 30mm2 , qJA = 54C/W
Figure 7. Derating Curves for RT8293A Package
Thermal ConsiderationsFor continuous operation, do not exceed the maximumoperation junction temperature 125C. The maximumpower dissipation depends on the thermal resistance ofIC package, PCB layout, the rate of surroundings airflowand temperature difference between junction to ambient.The maximum power dissipation can be calculated byfollowing formula :
PD(MAX) = (TJ(MAX) - TA ) / qJA
where TJ(MAX) is the maximum operation junctiontemperature , TA is the ambient temperature and the qJA isthe junction to ambient thermal resistance.
For recommended operating conditions specification ofRT8293A, the maximum junction temperature is 125C.The junction to ambient thermal resistance qJA is layoutdependent. For SOP-8 (Exposed Pad) package, thethermal resistance qJA is 75C/W on the standard JEDEC51-7 four-layers thermal test board. The maximum powerdissipation at TA = 25C can be calculated by followingformula :
PD(MAX) = (125C - 25C) / (75C/W) = 1.333W(min.copper area PCB layout)
PD(MAX) = (125C - 25C) / (49C/W ) = 2.04W(70mm2copper area PCB layout)
The thermal resistance qJA of SOP-8 (Exposed Pad) isdetermined by the package architecture design and thePCB layout design. However, the package architecturedesign had been designed. If possible, it's useful toincrease thermal performance by the PCB layout copperdesign. The thermal resistance qJA can be decreased byadding copper area under the exposed pad of SOP-8(Exposed Pad) package.
As shown in Figure 6, the amount of copper area to whichthe SOP-8 (Exposed Pad) is mounted affects thermalperformance. When mounted to the standardSOP-8 (Exposed Pad) pad (Figure 6.a), qJA is 75C/W.Adding copper area of pad under the SOP-8 (ExposedPad) (Figure 6.b) reduces the qJA to 64C/W. Even furtherincreasing the copper area of pad to 70mm2 (Figure 6.e)reduces the qJA to 49C/W.
The maximum power dissipation depends on operatingambient temperature for fixed TJ(MAX) and thermal
resistance qJA. For RT8293A packages, the derating curvesin Figure 7 allow the designer to see the effect of risingambient temperature on the maximum power dissipation.
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
0 25 50 75 100 125Ambient Temperature(C)
Pow
er D
issi
patio
n (W
)
Copper Area 70mm2
50mm2
30mm2
10mm2
Min.Layout
Four Layer PCB
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(d) Copper Area = 50mm2 , qJA = 51C/W
(e) Copper Area = 70mm2 , qJA = 49C/W
Figure 6. Themal Resistance vs. Copper Area LayoutDesign
Layout ConsiderationFollow the PCB layout guidelines for optimal performanceof the RT8293A.
} Keep the traces of the main current paths as short andwide as possible.
} Put the input capacitor as close as possible to the devicepins (VIN and GND).
} SW node is with high frequency voltage swing and shouldbe kept at small area. Keep analog components awayfrom the SW node to prevent stray capacitive noise pick-up.
} Connect feedback network behind the output capacitors.Keep the loop area small. Place the feedbackcomponents near the RT8293A.
} Connect all analog grounds to a command node andthen connect the command node to the power groundbehind the output capacitors.
} An example of PCB layout guide is shown in Figure 8 forreference.
Figure 8. PCB Layout Guide
VIN
VOUT
GND
CIN
GND
CP
CC
RC
SW
VOUT
COUT
L1
R1
R2
Input capacitor must be placed as close to the IC as possible.
SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace.
The feedback components must be connected as close to the device as possible.
BOOTVINSW
GND
SSEN
FBCOMP
GND2
3
4 5
6
7
8
9
CS
RS*
CS*
GND VIN
REN
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Table 3. Suggested Capacitors for CIN and COUTLocation Component Supplier Part No. Capacitance (mF) Case Size
CIN MURATA GRM31CR61E106K 10 1206
CIN TDK C3225X5R1E106K 10 1206
CIN TAIYO YUDEN TMK316BJ106ML 10 1206
COUT MURATA GRM31CR60J476M 47 1206
COUT TDK C3225X5R0J476M 47 1210
COUT MURATA GRM32ER71C226M 22 1210
COUT TDK C3225X5R1C22M 22 1210
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Richtek Technology CorporationHeadquarter5F, No. 20, Taiyuen Street, Chupei CityHsinchu, Taiwan, R.O.C.Tel: (8863)5526789 Fax: (8863)5526611
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology CorporationTaipei Office (Marketing)5F, No. 95, Minchiuan Road, Hsintien CityTaipei County, Taiwan, R.O.C.Tel: (8862)86672399 Fax: (8862)86672377Email: [email protected]
Outline Dimension
A
BJ
F
H
M
C
D
I
Y
X
EXPOSED THERMAL PAD(Bottom of Package)
8-Lead SOP (Exposed Pad) Plastic Package
Dimensions In Millimeters Dimensions In Inches Symbol
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091 Option 1
Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098 Option 2
Y 3.000 3.500 0.118 0.138