Sampling, Digital Devices, and Data Acquisition

2141-375 Measurement and Instrumentation

Basic Data Acquisition System

Advantages of Data Acquisition SystemEfficient in managing a large amount of dataRapid and intelligent data processing using

digital computer

SensorPhysicalvarialble

Signalconditioning

Analog toDigital

Converter

DisplayAnalogForm

AnalogForm

DigitalForm

Storage

Computer

Numbering System: Binary Code

The digital signals are formed by only two voltage values HI and LOW, or level 1 and level 0 and it is called binary digital signal. Therefore, the information contained in the digital signal is represented by the combination of the numbers 1 and 0.

Binary numbers are comprised of the digits 0 and 1 and are based on powers of 2.Each digit of a binary number, 0 or 1, is called a bit. Four bits together is a nibble, 8 bits is called a byte. (8, 16, 32, 64 bit arrangements are also called words)

The left most bit is called the Least Significant Bit (LSB) The right most bit is called the Most Significant Bit (MSB).

1010 1101 0110 1010

nibble

byte

word

MSB LSB

Numbering Conversion

Binary to Decimal ConversionThe conversion of a binary number to a decimal number may be accomplished by taking the successive powers of 2 and summing for the result.

0

0x23

0

1

1x22

4

0

0x21

0

1

1x20

1

+ + +

+ + + = 510

Numbering Conversion

Decimal to Binary ConversionThe conversion of a decimal number to a binary number is accomplished by successively dividing the decimal number by 2 and recording the remainder as 0 or 1

622

= 31 + 0

312

= 15 + 1

152

= 7 + 1

72

= 3 + 1

32

= 1 + 1

12

= 0 + 1

Remainder

LSB

MSB

0011 11102

Logic Level

In most digital systems, the state 1 corresponds to a voltage range from 2 V to 5 V while the state 0 corresponds to a voltage range from a fraction of a volt to 1 volts.

5 V

0

"1" generatedoutput

"0" generatedoutput

2 V

Sampling Concepts

0 1 2 3 4 5 6 7 8 9 10

05

1015

-5-10-15

Time (s)

Am

plitu

de (V

)

δt

12 3

4

5

67 8

9

N = 10

Ν δt

0 1 2 3 4 5 6 7 8 9 10

05

1015

-5-10-15

Time (s)

Am

plitu

de (V

)

Sampling is a process that generate a discrete time or digital signal from a continuous time signal

Analog signal Discrete time signal

The fundamental question therefore is how to sample a continuous time signal so that the resulting sampled signal retains the information of the

original signal.

Discrete Fourier Transform

Discrete Fourier Transform (DFT) of yr

∑=

−=N

r

Nrkik etryNfY

1

/2)(2)( πδ 2,...,2,1 Nk =

)( tryyr δ= Nr ,...,2,1=

where fkfk δ= and Nf

tNf s==

δδ 1

Example: Estimate the amplitude spectrum or frequency content of the discrete data taken from y(t) = 10 sin 2πt using a time increment of 0.125 s for the duration of 1 s.

Known: δt = 0.125 s or fs = 8 Hz

Solution:

Discrete Fourier Transform

Discrete Data Set for y(t) = 10 sin2πt

Discrete Fourier Transform

r y(r δt )1 7.0712 10.0003 7.0714 0.0005 -7.0716 -10.0007 -7.0718 0.000

0 1 2 3 4Frequency HHzL0

5

10

15

20edutilp

mAHVL

k f k (Hz) Y (f k ) |Y (f k )|1 1 -10i 102 2 0 03 3 0 04 4 0 0

Discrete Fourier Transform of y(t)

Sample Rate

In order to be able to reconstruct the original signal from the sampled signal the following two related constraints must be satisfied.

1. The original signal must be band-limited (i.e. must have a finite frequency content)

2. The samples must be taken with a sampling frequency which is higher than twice the highest frequency present in the original signal. (Sampling Theorem or the Nyquist-Shannon Sampling Theorem)

tfs δ/1=Sampling rate:

ms ff 2≥The sampling rate requires

Or in terms of the sample time increment

mft

21

≤δ

where fm is the maximum frequency in the analog signal

Sample Rate: Alias Frequency

When the sampling frequency is less than twice the bandwidth of a signal the time continues signal can not reconstructed from the samples.

Original 10-Hz sine wave fs = 100 Hz

fs = 12 Hzfs = 27 Hz

Amplitude Ambiguity

Another problem appears when Nδt is not coincident with an integer multiple of the fundamental period of y(t). The problem occur by the truncation of a complete cycle of the signal.

8TΝ = 256δt = 0.3125 sδf =12.5 Hz

Ν = 1024δt = 0.1 msδf = 9.8 Hz

10T

Digital to Analog Conversion (D/A)

The digital to analog converter (D/A) is an M-bit digital device tht converts a digital binary word into an analog voltage.

R

2R

4R

8R

16R

Vref

-

+

A

D

C

B

Vout

An example of D/A converter

Digital input

In case of A = 1 and B,C and D = 0, Vo = Vi /16B = 1 and A,C and D = 0, Vo = Vi /8C = 1 and A,B and D = 0, Vo = Vi /4D = 1 and A,B and C = 0, Vo = Vi /2

Here Vi = Vref;

Digital to Analog Conversion (D/A)

0Vi/16

2(Vi/16)3(Vi/16) 4(Vi/16) 5(Vi/16) 6(Vi/16) 7(Vi/16) 8(Vi/16) 9(Vi/16) 10(Vi/16) 11(Vi/16) 12(Vi/16) 13(Vi/16) 14(Vi/16) 15(Vi/16)

0 0 0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 0 1

Analog output

Digital inputs D C B A

Full scale

Summary:

Vref = k × 2N

Vfull scale = k × (2N-1)

Summary:

Analog to Digital Converter (A/D)

The analog to digital converter (A/D) is a device that receives as its input the analog signal along with instructions regarding the sampling rate and scaling parameters corresponding to the desired resolution of he system. The output of the A/D is a binary number at each sampling time.

8-bit ADC

D7 D6 D5 D4 D3 D2 D1 D0Sampling

Signal

AnalogSignal

ReferenceVoltage

MSB LSB

Signal (V)

Time (s)1 2 3 4 5 6 7 8 9

0011

001

1

0101

111

1

0111

100

0

1010

000

1

1100

101

0

1100

101

0

1000

001

0

0101

101

0

0100

100

0

Analog to Digital Converter (ADC)

The resolution of A/D converter is defined in terms of the smallest voltage increment that will cause a bit change (LSB).

Resolution

N2 voltageReferenceResolution =

N – the number of the output bit

Quantization error

Conversion error

The limited resolution of A/D converter brings about the possibility of an error between the actual input analog value and the binary value assigned by the A/D converter

The total error can be calculated from all elementary errors occurring during the conversion, e.g. hysteresis, linearity, sensitivity etc.

000

001

010

011

100

101110

111

0 1 2 3 4 5 6 7 8

Bin

ary

outp

ut

Analog input (V)

idealconvesion

2 3

Analog to Digital Converter (ADC)

000

001

010

011

100

101110

111

0 1 2 3 4 5 6 7 8

Bin

ary

outp

ut

Analog input (V)

idealconvesion

A/D will give 010 digital code.

1.5 2.5

A/D will give 010 digital code.

Absolute Quantization error = 1 resolution Absolute Quantization error = ±1/2 resolution

resolution resolution

Example: The A/D converter with the following specifications listed to be used in an environment in which the A/D converter temperature may change by ±10oC. Estimate the contribution of conversion and quantization errors to the uncertainty in the digital representation of an analog voltage by the converter.

A/D converterReference voltage 0 – 10 VThe number of bits 12 bitsLinearity ±3 bitsTemperature drift 1 bit/5oC

Solution:

Analog to Digital Converter (ADC)

220/ cDA uuu +=

0u cu

½ Resolution = ½ Q22Tl ee +

Comparator V+>V-; Vo = V(1) Logic high

Vo

Vin

V(1)

V(0)Vref

VrefVin

VoV(1)

V(0)

+Vref

Vin Vo

+VrefVin

Vo

V+

Ex. To determine a number between 0 – 511 (9 bit binary), given, the number to be determined is 301

987654321

No.

Finished 1 0010 1101300+1 = 3011 0010 1100296+4 = 300>1 0010 1000288+8 = 2961 0010 0000256+32 = 288

Comp.

D/A

SuccesiveApproximation

Register

Control circuit

Vin +-

VAX

Digital output

Clock

•The most common A/D for general applications

•Conversion time is fixed (not depend on the signal magnitude) and relatively fast

period ClockNTC ×=

D/A

out

put

Clock period

VAX

Vin

Fullscale

14

Fullscale

12

Fullscale

34

Fullscale

1 2 3 4 5 6 7 8

Compare the input voltage to the internally generated voltage

Block diagram

where N is the number of bits

Successive Approximation A/D

Successive approximation method

Successive Approximation A/D

Vin

Vref

Vout-+

R

C

Vin

Vref

Vout-+

R

C

Phase 1: charging C with the unknown input for a given time.

Phase 2: discharging C with the reference voltage until the output voltage goes to zero.

RCTVV inout1 −=

where T is the charging time find Tx at which Vout becomes zero

ref

inx V

TVT =

Vout

timeCharge Discharge

Phase 1 Phase 2

Assume Vc(0) = 0

out1xref

out VRCTV

V +=

Dual Slope A/D

Dual-slope Digital Voltmeter

Vout

timeSmall input voltage

Large input voltage

0DischargeCharge

Conversion time

variableconstC TT T +=

•Accuracy does not depend on R C and Clock(high accuracy)•Relatively slow•Capable to reject noise

Vin -+

R

C

Counter

Clockgenerator

Display

Control logic

Vrefcount

Vin -+

R

C

Counter

Clockgenerator

Display

Control logic

Vrefreset

count-+

VoutVout

Zerocrossingdetector

Ex A dual slope A/D has R= 100 kΩ and C = 0.01 µF . The reference voltage is 10 volts and the fixed integration time is 10 ms. Find the conversion time for a 6.8 volt input.

ms 6.8 V)(10

ms) V)(10(6.8V

TVTref

inx ===

The total conversion time is then 10 ms + 6.8 ms = 16.8 ms Ans

Ex Find the successive approximation A/D output for a 4-bit converter to a 3.217 volt input if the reference is 5 volts.

(1) Set D3 = 1 VAX = 5/2 = 2.5 VoltsVin > VAX leave D3 = 1

(2) Set D2 = 1 VAX = 5/2 + 5/4 = 3.75 VoltsVin < VAX reset D2 = 0

(3) Set D1 = 1 VAX = 5/2 +5/8= 3.125 VoltsVin > VAX leave D1 = 1

(4) Set D0 = 1 VAX = 5/2+5/8+5/16 = 3.4375 VoltsVin < VAX reset D0 = 0

By this procedure, we find the output is a binary word of 10102 Ans