sec 01: logisim - cornell university · 2010. 2. 3. · sec 01: logisim author: kevin walsh created...
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![Page 1: Sec 01: Logisim - Cornell University · 2010. 2. 3. · Sec 01: Logisim Author: Kevin Walsh Created Date: 2/3/2010 6:39:37 PM](https://reader035.vdocument.in/reader035/viewer/2022071413/610aa0f454477f45b50f5512/html5/thumbnails/1.jpg)
Sec 01: Logisim
![Page 2: Sec 01: Logisim - Cornell University · 2010. 2. 3. · Sec 01: Logisim Author: Kevin Walsh Created Date: 2/3/2010 6:39:37 PM](https://reader035.vdocument.in/reader035/viewer/2022071413/610aa0f454477f45b50f5512/html5/thumbnails/2.jpg)
Why Logisim?
Most real-world hardware design is done using a text-based hardware description language –VHDL, AHDL, etc. ◦ Schematics can be "compiled" into a text description
◦ Can use a simulator to test the circuit
◦ Other back-end tools optimize, perform layout and wire routing, floorplan, etc.
◦ Final spec is either downloaded onto a programmable device, or etched into silicon
We will be using Logisim for all hardware design◦ interactive, graphical schematic editor
◦ educational use mainly (makes it user-friendly)
![Page 3: Sec 01: Logisim - Cornell University · 2010. 2. 3. · Sec 01: Logisim Author: Kevin Walsh Created Date: 2/3/2010 6:39:37 PM](https://reader035.vdocument.in/reader035/viewer/2022071413/610aa0f454477f45b50f5512/html5/thumbnails/3.jpg)
VHDL Example: Signed Adder
![Page 4: Sec 01: Logisim - Cornell University · 2010. 2. 3. · Sec 01: Logisim Author: Kevin Walsh Created Date: 2/3/2010 6:39:37 PM](https://reader035.vdocument.in/reader035/viewer/2022071413/610aa0f454477f45b50f5512/html5/thumbnails/4.jpg)
Why Logisim?
Most real-world hardware design is done using a text-based hardware description language –VHDL, AHDL, etc. ◦ Schematics can be "compiled" into a text description
◦ Can use a simulator to test the circuit
◦ Other back-end tools optimize, perform layout and wire routing, floorplan, etc.
◦ Final spec is either downloaded onto a programmable device, or etched into silicon
We will be using Logisim for all hardware design◦ interactive, graphical schematic editor
◦ educational use mainly (makes it user-friendly)
![Page 5: Sec 01: Logisim - Cornell University · 2010. 2. 3. · Sec 01: Logisim Author: Kevin Walsh Created Date: 2/3/2010 6:39:37 PM](https://reader035.vdocument.in/reader035/viewer/2022071413/610aa0f454477f45b50f5512/html5/thumbnails/5.jpg)
What are we going to talk about?
Using Logisim:◦ pins and subcircuits
◦ probes for debugging
◦ bundles/splitters (with labels!)
◦ logging
◦ test vectors
Example Circuits: 1-bit & 32-bit 2:1 Mux
Using Subcircuits: 2:1 Mux and Controller
Logging & Test Vectors
Logisim Don’ts
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Example Circuit: 1-bit 2:1 Mux
S = P if R == 0
S = Q if R == 1
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Example Circuit: 32-bit 2:1 Mux
![Page 8: Sec 01: Logisim - Cornell University · 2010. 2. 3. · Sec 01: Logisim Author: Kevin Walsh Created Date: 2/3/2010 6:39:37 PM](https://reader035.vdocument.in/reader035/viewer/2022071413/610aa0f454477f45b50f5512/html5/thumbnails/8.jpg)
Using Subcircuits: 2:1 Mux and Controller
S = Q if R == 010
S = P otherwise
![Page 9: Sec 01: Logisim - Cornell University · 2010. 2. 3. · Sec 01: Logisim Author: Kevin Walsh Created Date: 2/3/2010 6:39:37 PM](https://reader035.vdocument.in/reader035/viewer/2022071413/610aa0f454477f45b50f5512/html5/thumbnails/9.jpg)
Logging & Test Vectors
Log File
Test Vector Truth Table
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Logisim Don’ts
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Logisim Don’ts
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Logisim Don’ts
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Logisim Don’ts
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Logisim Don’ts
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Logisim Don’ts
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Some more information
MIPS Assignments:
◦ 32-bit ALU
◦ 32-bit Processor
◦ 32-bit Pipelined Processor
Webpage: http://www.cs.cornell.edu/courses/cs3410/2010sp/