segmentation faults, page faults, processes, threads, and tasks
DESCRIPTION
University of Virginia cs4414: Operating Systems http://rust-class.org Segmentation Faults, Page Faults, Processes, Threads, and TasksTRANSCRIPT
cs4414 Fall 2013University of VirginiaDavid Evans
Class 7
Segmentation Faults, Page Faults, Processes,
Threads, and Tasks
2
Plan for TodayRecap: Virtualizing MemorySegmentation FaultsPage Faults: Challenge winner!Processes, Threads, Tasks
PS2 is Due Sunday
Exam 1 is out after class Tuesday (Feb 11) due 11:59pm Thursday (Feb 13) – open resources, most questions will be taken from notes
3
PS2 DemosEveryone should be signed up
If you can’t find a time that works for your team, let me know by tomorrow
At the scheduled start time and place:Your full team should be presentOne of you should have:
– Your code ready to show in your favorite editor
– Your gash ready to run
PS2 autograder and submission will be posted by Friday (if I forget, but no one reminds me, there won’t be an extension like for PS1!)
If your team is not ready to go at your scheduled time (no grace period!), your demo is cancelled and you need to schedule a new one with me.
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386 CheckupDir Page Offset
CR3
Page Directory Page Table
Physical Memory
20 bits addr / 12 bits flags
Page + Offset
12 bits(4K pages)
10 bits(1K tables)
10 bits(1K entries)
32-bit linear address
How big is the page table on my MacBook Pro?
1024 entries × 4 bytes/entry = 4096 bytes = 1 page
222 < 4.3M
5
Intel 386386 introduced in 1985:1 MB $500
Original Macintosh (Jan 1984)$2495
128KB RAM(later in 1984: 512K version)
Windows 1.0 (Nov 1985)required 192 KB of RAM
6
386 Design Checkup
CR3
Page Directory Page Table
Physical Memory
20 bits addr / 12 bits flags
Page + Offset
7
386 Design Fail!
CR3
Page Directory Page Table
Physical Memory
20 bits addr / 12 bits flags
Page + Offset
264 addressable locations/ 212 locations/page= 252 pages
Page table would require 254 bytes $17B (eBay annual revenues) worth of RAM!
8
Solution?
Page Table
Physical Memory
20 bits addr / 12 bits flags
Page + Offset
9
Page + Offsetbase basebasebase
Multi-Level (Hierarchical) Page Tables
Unused L1 Page Offset
12 bits16 bits 9 bits
64 (-16)-bit x86 linear address
L2 Page L3 Page
9 bits 9 bits
L4 Page
9 bitsCR3
L1 Page Table
+ L1 IndexL2 Page
Table+ L2 Index
L3 Page Table
+ L3 Index
L4 Page Table
+ L4 Index Physical Memory
Page + Offset
10
Do we still need segmentation?
Logical Address
Segmentation Unit
Linear Address
PagingUnit
Physical Address
Mem
ory
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Page + Offsetbase basebasebase
Unused L1 Page Offset
12 bits16 bits 9 bits
L2 Page L3 Page
9 bits 9 bits
L4 Page
9 bitsCR3
L1 Page Table
+ L1 IndexL2 Page
Table+ L2 Index
L3 Page Table
+ L3 Index
L4 Page Table
+ L4 Index Physical Memory
Page + Offset
Where are all the L2, L3, and L4 page tables?
12
Page + Offsetbase basebasebase
Unused L1 Page Offset
12 bits16 bits 9 bits
L2 Page L3 Page
9 bits 9 bits
L4 Page
9 bitsCR3
L1 Page Table
+ L1 IndexL2 Page
Table+ L2 Index
L3 Page Table
+ L3 Index
L4 Page Table
+ L4 Index Physical Memory
Page + Offset
Why is each page 512 entries instead of 1024?
13
Page + Offsetbase basebasebase
Unused L1 Page Offset
12 bits16 bits 9 bits
L2 Page L3 Page
9 bits 9 bits
L4 Page
9 bitsCR3
L1 Page Table
+ L1 IndexL2 Page
Table+ L2 Index
L3 Page Table
+ L3 Index
L4 Page Table
+ L4 Index Physical Memory
Page + Offset
Why is the page size still 4K? (x86 can support 2MB pages)
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Page + Offsetbase basebasebase
Unused L1 Page Offset
12 bits16 bits 9 bits
L2 Page L3 Page
9 bits 9 bits
L4 Page
9 bitsCR3
L1 Page Table
+ L1 IndexL2 Page
Table+ L2 Index
L3 Page Table
+ L3 Index
L4 Page Table
+ L4 Index Physical Memory
Page + Offset
What would you do instead if you cared about saving energy more than saving silicon?
15
All x86 all the time?
16
17
Dave: “Don’t buy bitcoins!”
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ARMv8-A 64-bit processor(ISA licensed by ARM, designed by Apple, manufactured by Samsung)
iPhone 5s
(Sept 2013)
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Is 256TB enough?
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Is 256TB enough? “This design gives us a 256TB address space, which should be enough for a while. If memory prices continue to fall so that the cost of memory halves every year (a bit faster than it has been doing historically), handheld computers will come with 256TB in about 20 years. By then, I expect ARMv9 to be released.”David Chisnall, A Look at the 64-
Bit ARMv8 Architecture
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#include <stdio.h>#include <stdlib.h>
int main(int argc, char **argv) { char *s = (char *) malloc (1); int i = 0; while (1) { printf("%d: %lx / %d\n", i, s + i, i[s]); i += 1; }}
What will this program do?
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int main(int argc, char **argv) { char *s = (char *) malloc (1); int i = 0; while (1) { printf("%d: %lx / %d\n", i, s + i, i[s]); i += 1; }} gash> gcc -Wall segfault.c
segfault.c: In function ‘main’:segfault.c:8: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 3 has type ‘char *’segfault.c:8: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 3 has type ‘char *’
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What causes a segmentation fault?
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What causes a segmentation fault?
Page + Offsetbase basebasebase
12 bits16 bits 9 bits 9 bits 9 bits 9 bitsCR3
L1 Page Table
+ L1 IndexL2 Page
Table+ L2 Index
L3 Page Table
+ L3 Index
L4 Page Table
+ L4 Index Physical Memory
Page + Offset
Unused L1 Page OffsetL2 Page L3 Page L4 Page
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#include <stdio.h>#include <stdlib.h>
int main(int argc, char **argv) { char *s = (char *) malloc (1); int i = 0; while (1) { printf("%d: %lx / %d\n", i, s + i, i[s]); i += 1; }}
> ./a.out 0: 7ff7004039a0 / 01: 7ff7004039a1 / 02: 7ff7004039a2 / 0…95: 7ff7004039ff / 0…1033819: 7ff7004ffffb / 01033820: 7ff7004ffffc / 01033821: 7ff7004ffffd / 01033822: 7ff7004ffffe / 01033823: 7ff7004fffff / 0Segmentation fault: 11
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What causes a page fault?
Page + Offsetbase basebasebase
12 bits16 bits 9 bits 9 bits 9 bits 9 bitsCR3
L1 Page Table
+ L1 IndexL2 Page
Table+ L2 Index
L3 Page Table
+ L3 Index
L4 Page Table
+ L4 Index Physical Memory
Page + Offset
Unused L1 Page OffsetL2 Page L3 Page L4 Page
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What causes a page fault?
base
Page Table
+ L1 Index
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Challenge from Last Class
Challenge: Write a program that takes N as an input and produces (nearly) exactly N page faults. A good solution is worth a USS Hopper patch (even cooler than a Rust sticker!) or an exemption from Exam 1 or Exam 2.
Winner:Michael Recachinas
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Faults SummarySegmentation Fault:
Process attempts to access memory that is not in its memory space (or write to memory that is read-only) Should never happen
Page Fault:Process attempts to access memory that is not currently available.
Happens hundreds of times before your code even starts running!
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Processes, Threads, and Tasks
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ProcessOriginally: abstraction for owning the whole machine
Thread(Illusion or reality of) independent sequence of instructions
Wha
t do
you
need
:
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Own program counterOwn stack, registersOwn memory space
Own program counterOwn stack, registersShares memory space
ProcessOriginally: abstraction for owning the whole machine
Thread(Illusion or reality of) independent sequence of instructions
Wha
t do
you
need
:
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Tasks in Rust
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TasksThread
Own PCOwn stack, registers
Safely shared immutable memorySafely independent own memory
fn spawn(f: proc ())
spawn( proc() { println(“Get to work!”); });
Task = Thread – unsafe memory sharingor
Task = Process + safe memory sharing – cost of OS process
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How can we take advantage of more cores to find Collatz results faster?
fn collatz_steps(n: int) -> int { if n == 1 { 0 } else {
1 + collatz_steps(if n % 2 == 0 { n / 2 } else { 3 * n + 1 }) }}
fn find_collatz(k: int) -> int { // Returns the minimum value, n, with Collatz steps >= k. let mut n = 1; while collatz_steps(n) < k { n += 1; } n}
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fn find_collatz(k: int) -> int { let mut n = 1;
loop { let val = n;
spawn(proc() { if collatz_steps(val) > k { println!("Result: {}", val); } });
n += 1; }}
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Channels
let (port, chan) : (Port<T>, Chan<T>) = Chan::new();
chan.send(T); T = port.recv();
Asynchronous Synchronous
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fn find_collatz(k: int) -> int { let mut n = 1; let (port, chan) : (Port<int>, Chan<int>) = Chan::new();
spawn(proc() { loop { let val = n;
spawn(proc() { if collatz_steps(val) > k { chan.send(val); } });
n += 1; }
let n = port.recv(); n}
Not going to work…
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fn find_collatz(k: int) -> int { let mut n = 1; let max_tasks = 7; // keep all my cores busy
let mut found_result = false; let mut result = -1; // need to initialize
while !found_result { let mut ports = ~[];
for i in range(0, max_tasks) { let val = n + i; let (port, chan) : (Port<int>, Chan<int>) = Chan::new(); ports.push(port);
spawn(proc() { let steps = collatz_steps(val); println!("Result for {}: {}", val, steps); chan.send(steps); }); }
for i in range(0, max_tasks) { let port = ports.pop(); let steps = port.recv(); if steps > k { found_result = true; result = n + i; } } n += max_tasks; }
assert!(result != -1); result}
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Charge
PS2 is Due Sunday
Exam 1 is out after class Tuesday (Feb 11) due 11:59pm Thursday (Feb 13) – open resources, most questions will be taken from notes
Everyone should have scheduled PS2 demo!
or…Challenge: make a good multi-tasking find_collatz (at least 6x speedup)