selecting n-channel mosfets for high-side hot-swap control

38 Power Electronics Technology | November 2010 www.powerelectronics.com

T YPICAL HIGH-SIDE, n-channel, hot-swap soft-

switch systems use a charge pump to drive the

gate of an external MOSFET above the voltage

of the supply being controlled (Fig. 1). When the

gate voltage is high, the current flows downstream to the

load. This load current is measured as a voltage developed

across a known resistance in series with the MOSFET

switch. By limiting inrush current through the MOSFET,

the system protects the supplys upstream circuitry against

overloads and short circuits on the load side.

The circuit in Fig. 1 shows a typical hot-swap or soft-

switch circuit with a high-side n-channel MOSFET. This

circuit is placed between an always-on power supply and

a load. The load may be removable for service, or may

require controlled application of power for other reasons,

such as energy efficiency or fault isolation.

An integrated-circuit hot-swap controller as shown in

the diagram provides a gate-drive potential higher than the

supply voltage to enhance the external MOSFET switch.

A current-sense amplifier converts the differential voltage

across the sense resistor into a single-ended signal that can

be compared to one or more overcurrent protection or

warning thresholds. The overcurrent comparator discharg-

es the gate of the MOSFET if the load current exceeds the

protection threshold, isolating the common supply from a

faulty load. This allows other loads connected to the sup-

ply to continue operating, even if one or more individual

load devices fail.

Other functions that may be integrated in the hot-swap

controller are status outputs such as fault or power-good

signals, and enable inputs. Additionally, the current-sense

signal may be made available to other monitoring devices

through a buffered output. Some details of the application

circuit may vary, such as placing the current-sense resis-

tor before the MOSFET, or eliminating the sense resis-

tor entirely, but the fundamental principles of operation

remain the same as long as an n-channel MOSFET is used

for the switching element.

Selection of this external MOSFET switch is critical to

the cost, footprint, performance, and reliability of any hot-

swap system. The steady-state requirements are straight-

forward and readily understood, but the dynamic electrical

and thermal requirements are less so.

STEADY-STATE REQUIREMENTS

One of the first parameters to be established for a hot-

swap system is the voltage range of the supply to be con-

trolled. Most systems have a fairly stable supply voltage,

but somesuch as Firewire and telecom applications - must

tolerate a wide range of input voltage.

Typical and maximum load currents must also be

determined early in the design. Most applications have

fixed maximums for load current, but newer controllers

(MAX5961 and MAX5967 from Maxim or the ADM1275

Most hot-swap-control integrated circuits ar e Most hot-swap-control integrated circuits ar e Mosthot-swap-controlintegratedcircuitsare

sophisticated and capable; they relieve the board- sophisticated and capable; they relieve the board- sophisticated and capable; they relieve the board-

level engineer of a great deal of work that used t o level engineer of a great deal of work that used t o levelengineerofagreatdealofworkthatusedto

be associated with designing reliable and robus t be associated with designing reliable and robus t beassociatedwithdesigningreliableandrobust

systems. The designer must still contend wit h systems. The designer must still contend wit h systems.Thedesignermuststillcontendwith

choosing a cost-e ff ective switch element. Thus, th e choosing a cost-e ff ective switch element. Thus, th e choosingacost-effectiveswitchelement.Thus,the

designer must optimize the selected MOSFET for th e designer must optimize the selected MOSFET for th e designermustoptimizetheselectedMOSFETforthe

specific application. specific application. specific application.

DWIGHT LARSON, Senior Member of the Technical Staff,

Maxim Integrated Products Inc., Austin, TX

PETinnovations

Selecting N-channel MOSFETs

for High-Side Hot-Swap Control

Supply Load

Sense Resistor

Current-SenseAmp

OvercurrentComparator

GA

TE

SE

NS

E+

SE

NS

E

RegulatorCharge

Pump

ENABLE

FAULT

PG

Logic

COMP THRESHOLD

CSA

Hot-Swap

Controller

N-ChannelMOSFET

Fig, 1, A basic hot-swap circuit employing an n-channel MOSFET uses the MOSFET

to protect the upstream circuitry against overloads and short circuits on the

load side.

011PETinnoLarson.indd 38 11/3/10 2:22:45 PM

www.powerelectronics.com November 2010 | Power Electronics Technology 39

from Analog Devices, for instance) let you adjust the

maximum current dynamically, using a two-wire serial-

communications interface. Because the n-channel pass

device chosen for a hot-swap system must obviously with-

stand the maximum anticipated supply voltage and load

current, those parameters make a reasonable starting point

in selecting the FET.

Choose a FET whose breakdown voltage (VDS) is

adequate for the voltage being controlled, because the full

supply voltage will appear across the FET whenever the

hot-swap controller shuts down the controlled voltage by

pulling the FETs gate to ground. Its wise to incorporate

a safety margin in the VDS rating, to allow for overvoltage

transients and inductive spikes that may be present at the

drain during shutdown. A margin of 20% to 50% is rea-

sonable. More wont hurt, but a higher VDS rating can add

cost, size, and gate charge to the FET, all of which harm

performance.

You must ensure that the chosen FET is rated for the

maximum gate-drive voltage that will be delivered by the

hot-swap controller. Most low-voltage high-side control-

lers (such as the dual-channel MAX5956) deliver about

5V gate-to-source when fully enhanced, which works

well with logic-level n-channel devices. Other hot-swap

controllers (such as the MAX5947) may deliver a higher

voltage to drive FETs rated for higher-voltage applications.

The engineer must ensure that the anticipated gate drive

from the controller is sufficient to achieve an optimum

on-resistance (RDS(on)), but not so high that it exceeds the

maximum rated gate-to-source voltage.

ON-RESISTANCE

The gate-to-source voltage and on-resis-

tance specified for the FET are closely

related. The maximum permissible on-

resistance can be quickly established

for the hot-swap FET by determining

the maximum forward voltage drop

(VDROP) that can be tolerated by the

load. For example, if the load must

receive 12V 5%, then the total voltage

drop incurred by the hot-swap system

under normal operating conditions must

be less than 5% of 12V, or 600mV.

Note that VDROP must include the

voltage drop across the sense resistor,

and also the parasitic (copper) losses.

The actual drop across the MOSFET

must be considerably less than VDROP,

to allow for factors such as tolerance

in the power-supply regulation, voltage

across the current-sensing resistor, and

resistive losses in the copper traces and

cabling.

For normal operation, the largest voltage drop in the hot-

swap system occurs at full load current. Although full load

current is less than the intended trip current for the circuit

breaker (ICB), the circuit breaker threshold voltage can

serve as a worst-case approximation for voltage across the

sense resistor. So, to find the maximum permissible RDS(on),

subtract the circuit breaker threshold voltage (VCB = ICB

RSENSE) and copper resistive losses VLOSS from VDROP, and

then divide this number by the anticipated maximum load

current:

( )

( )DROP CB(typ) LOSSDS on ,max

LOAD

R(1)

V V V

I

If efficiency and power dissipation are critical, consider

using a hot-swap controller that can operate without a sense

resistor. The MAX5924-MAX5926 controllers, for example,

use the on-resistance of the MOSFET itself to monitor load

current and provide overcurrent protection. (A load probe

provides protection before the MOSFET is fully enhanced.)

These devices also incorporate temperature compensation

to correct for the increase in RDS(ON) as temperature rises,

which provides accurate protection across a wide range of

load current and ambient temperature.

Steady-state current rating for a MOSFET seems straight-

forward, but its not enough to simply check the continuous

drain current rating (ID) on the first page of the FET data

sheet! For many FETs, the ID values are specified at opti-

mum VGS and at an industry-standard case temperature of

just 25C. In practice, however, the continuous current-han-

dling capability of a power MOSFET is determined by the

PETinnovations

VIN24 V

RSENSE0.025

Q1IRF530

R5

10

5%

D1

CMPZ5248B

R1 49.9 k

1%

R2 3.4 k

1%

R3 59 k

1%R7

24 k5%

R43.57 k

1%

R61 k5%

C1 10 nF

C20.68 F

0.1

F

PWRGDPWRGD

MAX5933A

CL

VCC

ON

TIMER

SENSE GATE

FB

GND

GND

3

2

678

1

5

4

Fig. 2. High-voltage hot-swap controllers like the MAX5933 use active current-limiting to limit startup inrush

current.



combination of ambient temperature,

maximum operating junction tempera-

ture TJ, resistive power dissipation PDin the FET, and its junction-to-ambient

thermal resistance RJA, given in C/W.

The MOSFET steady-state power

dissipation PD is simply the product of

the square of the current and the RDS(on)at the hot-swap controllers typical gate-

drive voltage. The rise of junction tem-

perature above ambient is the product

of PD and RJA. Its wise to design

for worst-case conditions, by using the

maximum specified RDS(on) at the hot-

swap controllers minimum specified

fully-enhanced gate drive.

To find the maximum allowable PD,

its easiest to work backwards from the

maximum operating junction temperature, TJ, as specified

in the FET data sheet. To find the maximum allowable tem-

perature rise in the FET, you then subtract the anticipated

maximum ambient temperature from TJ:

(2)J A(max ) J AT T T =

The maximum allowable power dissipation in the FET

is the temperature rise divided by the junction-to-ambient

thermal resistance:

(3)D(max )

J A(max)

JA

P T

R

=

Finally, the maximum load current is the square root of

maximum power dissipation divided by the MOSFET on-

resistance:

(4)D(max )DS(max)

DS(on)

P I

R

=

For most applications, you should select a FET whose

calculated IDS(max) is 20% to 50% higher than the required

maximum load current. To ensure that the worst-case con-

tinuous current never exceeds IDS(max), you should set the

hot-swap controllers circuit-breaker trip point at or below

IDS(max), by selecting a current-sense resistor according to:

(5)CB(max)SENSE

DS(max)

VR

I

where VCB(max) is the maximum trip-threshold voltage spec-

ified for the circuit breaker, from the hot-swap controllers

data sheet. To increase IDS(max), choose a FET with lower

RDS(on), lower RJA, or higher TJ.

Note that RJA can vary widely with airflow and with the

PCB layout and construction. Where two or more thermal-

resistance values are specified for a FET, it is important to

distinguish between RJA and the smaller junction-to-case

thermal resistance, RJC. The junction-to-case value is usual-

ly relevant only for short-lived transient events, because the

heat capacity of the device package is small. For steady-state

operation, the larger case-to-ambient thermal resistance is

almost always a bottleneck in the thermal design.

Careful board layout and the use of convective or

forced-air cooling can greatly reduce an actual RJA value.

For this purpose, the MOSFET data sheet may include

valuable recommendations regarding the PCB footprint and

heatsink. Many improvements in MOSFET packaging have

been introduced in the last few years. Excellent thermal

performance is now available with device packages such as

International Rectifiers DirectFET, Vishays PowerPAK,

and other thermally-enhanced packages from other power

MOSFET suppliers.

DYNAMIC REQUIREMENTS

Three different operating conditions can subject the

MOSFET switch to substantial stress: startup, shutdown,

and normal operation. Weve already discussed the power

dissipation requirements for normal operation, which the

FET must be able to sustain indefinitely. Startup and shut-

down can impose significantly higher power dissipation on

the FET, but we take a different approach to specify the

MOSFET for these short-duration conditions.

Two techniques are commonly used to limit inrush cur-

rent during startup of a hot-swap system. The first controls

the outputs voltage slew rate (dV/dt), either open-loop or

closed-loop. The second actively limits the output current

during startup, making the hot-swap system appear to the

load as a constant-current source. The MAX5933 (Fig. 2)

is an example of a hot-swap controller that employs active

current limiting with a foldback characteristic to limit

MOSFET power dissipation during startup.

PETinnovations

Therm

al R

esp

onse

(Z t

hJA

) C

/W1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100 1000

D =0.50D =0.50

0.200.20

0.100.10

0.050.05

0.020.02

0.010.01

SINGLE PULSE

(THERMAL RESPONSE)

SINGLE PULSE

(THERMAL RESPONSE)

R1 R2 R3 R4

t1tj tat2 t3 t4

Ci = ti/Ri

Ri( C/W)

1.6431

4.6179

16.903

16.855

I (sec)

0.000308

0.017766

0.9436

40.8

Notes:1. Duty Factor D = t1/t22. Peak Tj = P dm Zthja + Tj

t1, Rectangular Pulse Duration (sec)

Maximum Effective Transient Thermal Impedance , Junction-to-Ambient

100

10

1

0.1

0.01

Fig. 3. After converting the typically triangular power pulse seen by a MOSFET to an equivalent rectangular

pulse, one uses the duration of that pulse with this graph to obtain the corresponding thermal impedance.



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Pa rtPa rtPart

Number Number Number

Vdss Vdss Vdss

(V) (V) (V)

ID ID ID

(A) (A) (A)

RDS(on) RDS(on) RDS(on)

(m (m (m )))

Ciss Ciss Ciss

(nF) (nF) (nF)

Qg Qg Qg

(nC) (nC) (nC)

Trr Trr Trr

(ns) (ns) (ns)

RthJC RthJC RthJC

(((C/W) C/W) C/W)

PD PD PD

(W) (W) (W)

Packag ePackag ePackage

Type Type Type

GigaMOS TrenchT2TM

Power MOSFET in Ultra-Low

Prole DE475 Package

Gig aMOS Tr enchT2 TM

Po wer MOSFET in Ultra-Low

SIZE MATTERS

FEATURESUltra-low package prole

(3.17mm height x 40.6mm

length x 19.5mm width)

package dimensions

Very high current capability

Low Rds(on)

Fast intrinsic diode

175 C max operatng

temperature

Avalanche Rated

Silicon chip on direct-copper

bond (DCB) substrate

Excellent thermal transfer

characteristcs

Increased temperature and

power cycling capability

High isolaton (2500V~)

APPLICATIONSDC-DC converters

O-line UPS

Primary-side switch

High speed power switching

applicatons

ADVANTAGESEasy to mount

Space savings

High power density

Hot-swap controllers for telecommunications (such as

the MAX5921 and MAX5939), must contend with large

step changes in input voltage. They therefore employ

active current-limiting to control the inrush current to load

capacitance during these transients. Low-voltage hot-swap

controllers that do not have to handle step input changes

typically control the MOSFET gate and source dV/dt,

thereby providing a simple means for controlling the startup

inrush current to load capacitance without incurring a large

power-dissipation penalty during a load fault.

A notable exception to this generalization is the

MAX5946, which employs active current-limiting to ensure

that expansion card slots never exceed the maximum cur-

rent specified by the PCI Express specification. Similarly,

the MAX5943 and MAX5944 mid-voltage controllers are

available in versions with and without active current-limit-

ing, to accommodate the wide range of operating conditions

permissible in FireWire ports.

VOLTAGE SLEW-RATE CONTROL

To implement dV/dt control at startup in a high-side

n-channel hot-swap system, the gate of the FET is slowly

enhanced at constant dV/dt, and when this voltage exceeds

the gate threshold, the source rises at the same slew rate.

The dV/dt of the gate can be controlled open-loop by

driving the gate with a fixed pull-up current. A capacitor

between gate and ground then sets a constant gate-voltage

slew rate:

(6)PU

GATE

IdV

dt C=

where

IPU = Constant gate-pull-up current

CGATE = Total gate-to-ground capacitance

(In a closed-loop dV/dt control scheme, the FET source

voltage is compared to a voltage ramp, and the gate pull-

up current is varied to force the source dV/dt to track this

ramp.)

Load-inrush current is the product of the FET source

dV/dt and the total load capacitance, combined with the

any resistive current drawn by the load:

(7)INRUSH LOAD LOADdV

I C Idt

= +

The value of ILOAD during startup is not well-defined,

but you can minimize it by holding downstream power sup-

plies and circuits in reset until the hot-swap control system

asserts a power good signal. In many cases the capacitive

charging current dominates load current, and constitutes the

majority of the total inrush. When using dV/dt to control

inrush current, the system designer must assess startup load

current and determine whether it can be ignored.

To select an appropriate FET, the designer must estimate

PETinnovations

011PETinnoLarson.indd 41 11/4/10 10:57:59 AM


the transient power dissipated in the FET during startup.

For dV/dt control, current is relatively constant and the

voltage drop across the FET ramps down at a fixed rate (as

the output ramps up to the input voltage). Because power is

the product of voltage and current, we can see that startup

power dissipation in the FET is a decreasing triangular pulse,

starting at:

(8)2LOAD DS(on )I RVIN IINRUSH, and ending at

The duration of the startup pulse is the time required to

charge the load capacitance:

(9)( )

( )

LOAD IN

START

INRUSH LOAD

C Vt

I I

=

Because the power pulse is triangular in shape, the peak

power divided by two yields the equivalent average square

pulse startup power:

(10)( )IN INRUSH

START

V IP

2

=

To determine the FETs rise in junction temperature

during startup, use the transient thermal impedance chart

from the FET data sheet to look up the transient thermal

impedance, ZJA, for a square pulse with duration tSTART. A

transient thermal impedance chart for an SO-8 n-channel

device is shown in Fig. 3.

Shown in red on this chart is a hypothetical tSTART = 2ms,

and the corresponding transient ZJA value of 2.1C/W. If

the inrush current on a 12V supply is 6A, we have a junction

temperature rise above ambient of about 75.6C.

For startup temperature-rise calculations, the single-pulse

thermal-response curve is usually appropriate, with the

exception of hot-swap controllers that automatically retry

after a fault. For auto-retry, the effective duty cycle is the

ratio of startup time to the sum of startup time and retry-

time delay:

(11)( )

START

START RETRY

t

t t+

This duty cycle is then used to select the appropriate

thermal response curve. As the duty cycle approaches 1, or

as the power pulse-width becomes large, note that the tran-

sient thermal impedance ZJA approaches the steady-state

value of RJA, which was used to determine the temperature

rise during normal operation.

If the junction temperature rise during startup is exces-

sive, it may be necessary to reduce inrush current by

decreasing dV/dt, or by decreasing the load capacitance. As

mentioned before, limiting the load-current contribution

to inrush during startup is also helpful. Adding an external

heatsink to the FET can help bring the case temperature

closer to ambient. The junction-to-case thermal resistance

RJC is usually much lower than RJA, so establishing a

lower case temperature may allow use of the ZJC chart for

junction-to-case transient thermal impedance.

Some cases offer no alternative to a larger FET or a pack-

age with lower RJA. The designer must therefore select a

MOSFET whose thermal impedance is sufficiently low that

its maximum junction temperature rating is not exceeded.

ACTIVE CURRENT LIMITING

As described before, some hot-swap controllers employ an

external current-sense resistance and a closed-loop control

system to actively limit current during startup and normal

operation. These hot-swap controllers drive the gate of the

FET to achieve a fixed maximum voltage drop across the

sense resistance, and thereby achieve a constant maximum

output current. To protect against fault conditions, the

active-current-limit hot-swap controller turns off the FET

when voltage across the sense resistor remains at or above

the current-limit threshold for a fixed time-out period

tFAULT.

The startup thermal analysis for FETs used with these

controllers is similar to the analysis for dV/dt control of

inrush current. Its actually simpler, because the maximum

startup time is known - it equals the controllers specified

time-out value for faults.

The maximum current is the current-limit threshold

voltage divided by the sense resistance:

(12)LIMLIMITSENSE

VI

R=

Of course, the system must be designed such that tFAULT

is greater than tSTART, or the system will never start up!

(13)( )

( )LOAD IN

FAULT

LIMIT LOAD

C Vt

I I

>

For a normal startup, we again assume the triangular

power pulse is equivalent to a square pulse of duration less

than or equal to tFAULT, and magnitude (VIN ILIMIT).

The thermal analysis then proceeds as described for dV/dt

control.

Thermal analysis during a FET turn-off other than a fault

can be considered as the reverse of the startup condition,

PETinnovations

FET

Power

PD1

PD2

PD3

tSTART

tFAULT

tOFF

Time

Fig. 4. This graph depicts a MOSFET power profile for three consecutive events:

turn-on, short-circuited load, and shut down.



PETinnovations

but the duration of the turn-off event is determined differ-

ently. As the hot-swap controller pulls down on the gate of

the FET with a known pull-down current, the source slews

down from VIN to ground at a rate determined by the pull-

down current and the gate capacitance:

(14)PULLDOWN

GATE

IdV

dt C=

This also means that the FETs drain-to-source voltage

slews up to VIN at the same rate. The time required to turn

off the FET is the gate charge (including added capacitance)

divided by the pull-down current:

(15)( )GATE IN

OFF

PULLDOWN

C Vt

I

=

A worst-case assumption is that ILOAD, max continues to

flow through the FET during this time. We then analyze

turn-off power dissipation in the FET as equivalent to a

square power pulse of magnitude (VIN ILOAD) and dura-

tion tOFF. The transient thermal impedance chart can then

be used to determine the FET junction rise during the turn-

off event, in the same manner as was done for startup.

SHORT-CIRCUIT FAULT CONDITIONS

A hot-swap controller can take one of two actions in the

event of a short-circuited load or other overcurrent event.

Some hot-swap controllers function as electronic circuit

breakers, pulling the gate of the FET to ground after a finite

response time. Other controllers control the FET gate volt-

age to maintain a fixed voltage across a current-sense resis-

tor, making the hot-swap output appear as a current source

for a finite time before disconnecting the load by pulling the

gate to ground.

Of these two fault-protection schemes, active current-

limiting places more stress on the FET, particularly in the

event of a low-resistance short circuit of the load. When

that occurs, the entire input voltage appears across the FET,

and current is fixed at the current-limit value (i.e., set by the

sense threshold and sense resistance).

Hot-swap controllers that function as electronic circuit

breakers allow higher peak currents during a fault, but

power dissipation in the FET is generally less, because

the FET gate remains fully enhanced until the fault timer

expires. At that time the gate is pulled quickly to ground,

which minimizes the width of the switching power pulse.

For hot-swap controllers that employ active-current-

limiting fault protection, the hot-swap FET must withstand

power pulses with duration tFAULT and magnitude VIN

ILIMIT. The designer should set ILIMIT as close to the antici-

pated full-load current as possible. A margin of 5% to 10%

is adequate for well behaved loads, but to accommodate

fast load transients without invoking active current limit-

ing, other systems may require margins as high as 50% to



PETinnovations

100%.

The value of tFAULT is usually programmable. It should be

set as short as possible, but large enough for the hot-swap

system to ride through spurious overcurrent transients.

The value of tFAULT is tied to the startup timer in some

active-current-limiting controllers, so its value must also be

sized to allow successful startup, as described earlier.

After selecting a suitable value of tFAULT, you can deter-

mine the temperature rise of the FET for a worst-case zero-

Ohm short-circuit, which applies to the MOSFET a square

power pulse of magnitude VIN ILIMIT and duration tFAULT.

To determine worst-case power, be sure to use the maxi-

mum value of current-limit threshold and the minimum

tolerance on the sense resistance.

Alternatively, you can determine the maximum allow-

able rise in junction temperature (in C) and divide it by the

pulse power magnitude VIN ILIMIT to find the minimum

acceptable value of ZJA. That value can then be found on

the y-axis of the transient thermal impedance chart, fol-

lowed horizontally to the single-pulse response curve, and

then down to the maximum allowable value of tFAULT.

ELECTRONIC CIRCUIT BREAKER

Hot-swap controllers that function as electronic circuit

breakers typically ignore a fault condition (defined as cur-

rent exceeding the trip threshold of the circuit breaker) for

a finite response time tRESPONSE. If the fault persists longer

than the response time, the gate of the external FET is

Parameter Description

CGATE Capacitance connected between the gate of an external MOSFET and ground, to limit the gate dV/dt.

CLOAD Capacitance connected between the hot-swap output and ground, in parallel with the load

E Energy dissipated in an external FET during a given sequence of events.

Hot-Swap A system that connects or disconnects load devices to a power source without shutting down or removing the input power (also called Hot-Plug).

ICB The current at which the hot-swap system detects a fault condi-tion and turns off the external MOSFET switch.

ID Maximum-rated current flowing into the drain of the MOSFET switch.

IINRUSH For the purpose of this article, the average total current through the external FET during tSTART, including any load current and load capacitance charging current.

ILIMIT The hot-swap controllers active current-limit value (not applicable to controllers that do not implement active current limiting).

ILOAD Current that flows in the hot-swapped load, not including load-capacitance charging current.

IMAX Maximum output-current capability for the power supply.

Inrush Current

Current that flows through the switch element in response to enabling the hot-swap or soft switch, and only while the switch element is turning on. See IINRUSH.

IPU Gate-drive pullup current delivered by the hot-swap controller.

IPULLDOWN Gate pulldown current delivered by the hot-swap controller during turn-off.

ISHORT Current that flows trough the hot-swap system (specifically the MOSFET switch) during a short-circuited load event.

PD Resistive power dissipation in the external MOSFET switch.

PSHORT Power dissipation in the MOSFET switch during a supply-limited short-circuit event.

PSTART Power dissipation in the external FET during the startup event.

RDS(on) MOSFET on-resistance measured between source and drain. It varies with VGS, and is usually specified in the MOSFET data sheet for one or more VGS values.

RSENSE Current-sensing resistance, usually a precision resistor in the range hundreds of microOhms to hundreds of milliOhms. Some hot-swap control devices, however, use the MOSFET RDS(on) as a sense resistance

Parameter Description

RJA Junction-to-ambient thermal resistance for the external MOSFET

switch.

RJC Junction-to-case thermal resistance for the external MOSFET

switch.

Soft-Switch

Used to describe systems in which the inrush current must be managed and/or overcurrent protection must be provided, even though the load is not removable or swappable. Soft-switch systems are similar to hot-swap or hot-plug systems, but with a permanent installation of the load device.

tFAULT Glitch rejection time: either the hot-swap controllers response time for circuit breaker protection, or the duration of active cur-rent limiting before the hot-swap controller turns off the external FET.

TJ MOSFET maximum operating junction temperature.

TJ-A(max) Maximum-allowable rise in junction temperature above ambient, for the external FET switch.

tOFF Time required for the hot-swap controller to turn off the external MOSFET by discharging its gate below the gate threshold voltage.

tRESPONSE Response time for the hot-swap controllers circuit breaker.

tRETRY Time delay for auto-restart or auto-retry.

tSTART Time required for the hot-swap controller to charge the load capacitance.

VCB Product of the desired circuit-breaker trip current ICB and the sense resistance RSENSE.

VCB(typ) Typical circuit-breaker threshold voltage for the hot-swap control device, and the voltage across the sense resistance at which the hot-swap controller shuts down the output. (For many hot-swap controllers, this value is adjustable.)

VDROP Total allowable voltage drop between the input power supply (at minimum tolerance) and the load. It includes voltage drops across the MOSFET, sense resistor, copper traces, and cabling.

VDS MOSFET drain-to-source breakdown voltage.

VGS MOSFET gate-to-source voltage. Used in context as either gate-to-source maximum rating, or specified gate-drive voltage for full enhancement.

VIN Voltage of the power supply rail under hot-swap control (not nec-essarily the supply voltage for the hot-swap control device).

VLOSS Resistive voltage drop across cabling and copper traces in the hot-swap system.

ZJA Transient junction-to-ambient thermal impedance.

ZJC Transient junction-to-case thermal impedance.

GLOSSARY AND ABBREVIATIONS



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pulled quickly to ground. Before the FET turns off, however,

the current ISHORT is limited only by RDS(on) of the FET, the

sense resistance, and the resistance of the short itself:

(16)( )

INSHORT

SENSE DS(on ) SHORT

VI

R R R=

+ +

For worst-case analysis, we assume a perfect (zero-Ohm)

load short, RSENSE at minimum tolerance, and minimum

specified RDS(on).

The rise in the FETs junction temperature is determined

in the usual manner, for a square power pulse of magnitude

ISHORT2 RDS(on) and duration tRESPONSE. This method

determines the thermal response for an extremely severe

fault. Most failures exhibit a short-circuited load resistance

of several hundred milliohms. Also, if the upstream power

supply is capable of delivering only a maximum output cur-

rent IMAX, then that value can be used to determine short-

circuit power dissipation in the FET:

(17)2SHORT MAX DS(on)P I R =

What about a string of events? Assume that the hot-swap

circuit starts up for time tSTART, then immediately encoun-

ters a short-circuited load when the load is released from

reset by a power-good signal. The current-limiting hot-

swap controller holds the load current at ILIMIT for tFAULT,

then pulls down on the FET gate, disconnecting the load

during the interval tOFF. In Fig. 4, PD1 is the FET maximum

inrush dissipation VIN IINRUSH, PD2 is the normal operat-

ing dissipation ILOAD2 RDS(on), and PD3 is the short-circuit

dissipation ILIMIT VIN. This waveform can be approximated

as a rectangular duration pulse:

(18)TOTAL START FAULT OFFt t t t= + +

The total energy E dissipated in the FET is the time inte-

gral of power, which can be graphically approximated as:

(19)( )

( )

( )D1 D2 D3 OFF

START D3 FAULT

P P P tE t P t +

2 2

+

= +

The average power is then (E/tTOTAL), which can be used

to look up the transient thermal impedance.


selecting n-channel mosfets for high-side hot-swap control

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