semiconductor assembly: a failure analysis perspective · the impact of plated layer contamination...

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The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories, Inc. September 2016

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Page 1: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

TheImpactofPlatedLayerContaminationon

SemiconductorAssembly:AFailureAnalysisPerspective

Jonathan Harris, CMC Laboratories, Inc.September 2016

Page 2: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

OrganiccontaminationofplatedAupadsresultinginnon-stickAlwirebonds

• Issue:5%wirebondnon-sticks,AlwirebondedtoplatedAupads,HTCCceramicpackage

• Pad:Wmetalpad,4µmplatedNi(sulfamate),3µmplatedtypeIIIAu(forKAuCN bath)

Page 3: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

PlanViewSEMAnalysisofAuPads

Plated Au- Wirebond FA

Plated Au- Plated Au from New Plating Bath

Page 4: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

Micro-hardnessMeasurement

1.Preparecrosssectionofplatedlayers

2.Micro-hardnessmeasurementincrosssection

Page 5: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

Observations:PlatedAuforFailedvs.As-Plated(NewBath)

• AuGrainSize:– Failedlothadsub-microngrains– Newbathas-platedAuhadgrains>5µm

• Porosity– FailedlotAulayerwasporous– Newbathas-platedAuwasfullydense

• Hardness– FailedLotdeposithardness>85Hv– Newbathdeposithardness=70Hv

Page 6: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

AuBathDegradationwithUse=RootCauseofWirebondFailure

NewBath:LargeGrains,Soft,Dense

Organicadditives=longchainorganicmoleculestocontrolgrainssizeandpromoteuniformthickness(Brighteners,Levelers)

OldBath:SmallGrains,Hard,

Porous

Bath Use

LongChainOrganicMoleculesbreakdowntosmallchainfragments.Becomeencorporated inplatedlayer

Encorporation oforganics=smallgrainsandhard,porousdeposit

Page 7: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

Fresh Plating Bath

Bath after 30 days of use

Longchainorganicsinbath.Notencorporated inlayer.SoftAu,largegrainsNowirebondissues.

Bath after activated carbon treatment

Shortchainorganicsinbath.Encorporated inlayer.HardAu,porous,smallgrainsWirebondnon-sticks

Longchainorganicsinbath.Notencorporated inlayer.Nowirebondissues.

Page 8: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

MetallicImpurityInducedVoidinginAuAl Wirebonds

• Issue:AlwireonAupad,powerdevice,wirebondfailureafterburn-in

• FailureAnalysisApproach:crosssectionthroughwirebondadjacenttofailedbond(sameplatedlayer,samethermalhistoryasfailedbond)

• Augeranalysisforcontaminationonpad(awayfromwirebondarea)

Page 9: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,
Page 10: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

Observe:VoidingbetweenAuplatingandAu-richIMC

Page 11: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

AugerAnalysisofPad

HighlevelofNicontaminationonsurfaceofAupad(innon-bondedarea)

Page 12: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

SummaryofFindings

• ExtensivevoidingatinterfacebetweenplatedAuandAuAl IMC.

• NicontaminationonsurfaceoftheAupadpriortobonding

Page 13: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

RootCause- Horsting MechanismforWirebondFailure

• Horsting,C.W.,“PurplePlagueandGoldPurity,”10thAnnualProc.IEEEReliabilityPhysicsSymp.,LasVegas,Nevada,1972,pp.155-158.

• Contaminationacceleratedvoiding

xx x

xx x

xx

AlWire

x

Beforebond

xx x

xx x

xx

AlWire

x

Auwithimpurties

IMC

Justafterbond

x x xx

AlWire

Afterthermalexposure=IMCgrowsthicker=impuritiesconcentrateatIMC/Auinterface=promotesvoidformation

x x x x x x x x x

Page 14: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

Horsting Effect

Ni from Au layer concentrates at the Au/IMC interface => void formation at the interface=> Voiding leads to wirebond failure

Page 15: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

NiContaminationonAuPad-ContaminationMechanisms

• NicontaminationofAuplatingbaththrough”drag-out”

• NiatomgrainboundarydiffusionthroughtheAulayer

Page 16: Semiconductor Assembly: A Failure Analysis Perspective · The Impact of Plated Layer Contamination on Semiconductor Assembly: A Failure Analysis Perspective Jonathan Harris, CMC Laboratories,

AuSn DieAttachVoiding->CuNodules

• LEDdevicecolorshiftassociatedwithdieheating

• Dieattachlayer=AuSn• Crosssectionshowsdieattachvoids• ThickCudieattachpadplatedwithNiandAg• RoughCulayerisobserved->CunodulesonsurfaceplatedoverwithNiandAu